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0001 /*
0002  * Copyright IBM Corp. 1999, 2010
0003  *
0004  *   Author(s): Hartmut Penner <hp@de.ibm.com>
0005  *      Martin Schwidefsky <schwidefsky@de.ibm.com>
0006  *      Rob van der Heij <rvdhei@iae.nl>
0007  *      Heiko Carstens <heiko.carstens@de.ibm.com>
0008  *
0009  */
0010 
0011 #include <linux/init.h>
0012 #include <linux/linkage.h>
0013 #include <asm/asm-offsets.h>
0014 #include <asm/thread_info.h>
0015 #include <asm/page.h>
0016 
0017 __HEAD
0018 ENTRY(startup_continue)
0019     tm  __LC_STFLE_FAC_LIST+5,0x80  # LPP available ?
0020     jz  0f
0021     xc  __LC_LPP+1(7,0),__LC_LPP+1  # clear lpp and current_pid
0022     mvi __LC_LPP,0x80           #   and set LPP_MAGIC
0023     .insn   s,0xb2800000,__LC_LPP       # load program parameter
0024 0:  larl    %r1,sched_clock_base_cc
0025     mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
0026     larl    %r13,.LPG1      # get base
0027     lctlg   %c0,%c15,.Lctl-.LPG1(%r13)  # load control registers
0028     lg  %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
0029                     # move IPL device to lowcore
0030     lghi    %r0,__LC_PASTE
0031     stg %r0,__LC_VDSO_PER_CPU
0032 #
0033 # Setup stack
0034 #
0035     larl    %r14,init_task
0036     stg %r14,__LC_CURRENT
0037     larl    %r15,init_thread_union
0038     aghi    %r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER) # init_task_union + THREAD_SIZE
0039     stg %r15,__LC_KERNEL_STACK  # set end of kernel stack
0040     aghi    %r15,-160
0041 #
0042 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
0043 # and create a kernel NSS if the SAVESYS= parm is defined
0044 #
0045     brasl   %r14,startup_init
0046     lpswe   .Lentry-.LPG1(13)   # jump to _stext in primary-space,
0047                     # virtual and never return ...
0048     .align  16
0049 .LPG1:
0050 .Lentry:.quad   0x0000000180000000,_stext
0051 .Lctl:  .quad   0x04040000      # cr0: AFP registers & secondary space
0052     .quad   0           # cr1: primary space segment table
0053     .quad   .Lduct          # cr2: dispatchable unit control table
0054     .quad   0           # cr3: instruction authorization
0055     .quad   0           # cr4: instruction authorization
0056     .quad   .Lduct          # cr5: primary-aste origin
0057     .quad   0           # cr6:  I/O interrupts
0058     .quad   0           # cr7:  secondary space segment table
0059     .quad   0           # cr8:  access registers translation
0060     .quad   0           # cr9:  tracing off
0061     .quad   0           # cr10: tracing off
0062     .quad   0           # cr11: tracing off
0063     .quad   0           # cr12: tracing off
0064     .quad   0           # cr13: home space segment table
0065     .quad   0xc0000000      # cr14: machine check handling off
0066     .quad   .Llinkage_stack     # cr15: linkage stack operations
0067 .Lpcmsk:.quad   0x0000000180000000
0068 .L4malign:.quad 0xffffffffffc00000
0069 .Lscan2g:.quad  0x80000000 + 0x20000 - 8    # 2GB + 128K - 8
0070 .Lnop:  .long   0x07000700
0071 .Lparmaddr:
0072     .quad   PARMAREA
0073     .align  64
0074 .Lduct: .long   0,.Laste,.Laste,0,.Lduald,0,0,0
0075     .long   0,0,0,0,0,0,0,0
0076 .Laste: .quad   0,0xffffffffffffffff,0,0,0,0,0,0
0077     .align  128
0078 .Lduald:.rept   8
0079     .long   0x80000000,0,0,0    # invalid access-list entries
0080     .endr
0081 .Llinkage_stack:
0082     .long   0,0,0x89000000,0,0,0,0x8a000000,0
0083 
0084 ENTRY(_ehead)
0085 
0086     .org    0x100000 - 0x11000  # head.o ends at 0x11000
0087 #
0088 # startup-code, running in absolute addressing mode
0089 #
0090 ENTRY(_stext)
0091     basr    %r13,0          # get base
0092 .LPG3:
0093 # check control registers
0094     stctg   %c0,%c15,0(%r15)
0095     oi  6(%r15),0x60        # enable sigp emergency & external call
0096     oi  4(%r15),0x10        # switch on low address proctection
0097     lctlg   %c0,%c15,0(%r15)
0098 
0099     lam 0,15,.Laregs-.LPG3(%r13)    # load acrs needed by uaccess
0100     brasl   %r14,start_kernel   # go to C code
0101 #
0102 # We returned from start_kernel ?!? PANIK
0103 #
0104     basr    %r13,0
0105     lpswe   .Ldw-.(%r13)        # load disabled wait psw
0106 
0107     .align  8
0108 .Ldw:   .quad   0x0002000180000000,0x0000000000000000
0109 .Laregs:.long   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0