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0001 /* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation
0002  *
0003  * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
0004  * Written by David Howells (dhowells@redhat.com)
0005  *
0006  * This program is free software; you can redistribute it and/or
0007  * modify it under the terms of the GNU General Public License
0008  * as published by the Free Software Foundation; either version
0009  * 2 of the License, or (at your option) any later version.
0010  */
0011 
0012 #include <linux/init.h>
0013 #include <linux/threads.h>
0014 #include <linux/linkage.h>
0015 #include <asm/ptrace.h>
0016 #include <asm/page.h>
0017 #include <asm/spr-regs.h>
0018 #include <asm/mb86943a.h>
0019 #include "head.inc"
0020 
0021 
0022 #define __400_DBR0  0xfe000e00
0023 #define __400_DBR1  0xfe000e08
0024 #define __400_DBR2  0xfe000e10
0025 #define __400_DBR3  0xfe000e18
0026 #define __400_DAM0  0xfe000f00
0027 #define __400_DAM1  0xfe000f08
0028 #define __400_DAM2  0xfe000f10
0029 #define __400_DAM3  0xfe000f18
0030 #define __400_LGCR  0xfe000010
0031 #define __400_LCR   0xfe000100
0032 #define __400_LSBR  0xfe000c00
0033 
0034     __INIT
0035     .balign     4
0036 
0037 ###############################################################################
0038 #
0039 # set the protection map with the I/DAMPR registers
0040 #
0041 #   ENTRY:          EXIT:
0042 # GR25  SDRAM size      [saved]
0043 # GR26  &__head_reference   [saved]
0044 # GR30  LED address     [saved]
0045 #
0046 ###############################################################################
0047     .globl      __head_fr451_set_protection
0048 __head_fr451_set_protection:
0049     movsg       lr,gr27
0050 
0051     movgs       gr0,dampr10
0052     movgs       gr0,damlr10
0053     movgs       gr0,dampr9
0054     movgs       gr0,damlr9
0055     movgs       gr0,dampr8
0056     movgs       gr0,damlr8
0057 
0058     # set the I/O region protection registers for FR401/3/5
0059     sethi.p     %hi(__region_IO),gr5
0060     setlo       %lo(__region_IO),gr5
0061     sethi.p     %hi(0x1fffffff),gr7
0062     setlo       %lo(0x1fffffff),gr7
0063     ori     gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5
0064     movgs       gr5,dampr11         ; General I/O tile
0065     movgs       gr7,damlr11
0066 
0067     # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
0068     # - start with the highest numbered registers
0069     sethi.p     %hi(__kernel_image_end),gr8
0070     setlo       %lo(__kernel_image_end),gr8
0071     sethi.p     %hi(32768),gr4          ; allow for a maximal allocator bitmap
0072     setlo       %lo(32768),gr4
0073     add     gr8,gr4,gr8
0074     sethi.p     %hi(1024*2048-1),gr4        ; round up to nearest 2MiB
0075     setlo       %lo(1024*2048-1),gr4
0076     add.p       gr8,gr4,gr8
0077     not     gr4,gr4
0078     and     gr8,gr4,gr8
0079 
0080     sethi.p     %hi(__page_offset),gr9
0081     setlo       %lo(__page_offset),gr9
0082     add     gr9,gr25,gr9
0083 
0084     sethi.p     %hi(0xffffc000),gr11
0085     setlo       %lo(0xffffc000),gr11
0086 
0087     # GR8 = base of uncovered RAM
0088     # GR9 = top of uncovered RAM
0089     # GR11 = xAMLR mask
0090     LEDS        0x3317
0091     call        __head_split_region
0092     movgs       gr4,iampr7
0093     movgs       gr6,iamlr7
0094     movgs       gr5,dampr7
0095     movgs       gr7,damlr7
0096 
0097     LEDS        0x3316
0098     call        __head_split_region
0099     movgs       gr4,iampr6
0100     movgs       gr6,iamlr6
0101     movgs       gr5,dampr6
0102     movgs       gr7,damlr6
0103 
0104     LEDS        0x3315
0105     call        __head_split_region
0106     movgs       gr4,iampr5
0107     movgs       gr6,iamlr5
0108     movgs       gr5,dampr5
0109     movgs       gr7,damlr5
0110 
0111     LEDS        0x3314
0112     call        __head_split_region
0113     movgs       gr4,iampr4
0114     movgs       gr6,iamlr4
0115     movgs       gr5,dampr4
0116     movgs       gr7,damlr4
0117 
0118     LEDS        0x3313
0119     call        __head_split_region
0120     movgs       gr4,iampr3
0121     movgs       gr6,iamlr3
0122     movgs       gr5,dampr3
0123     movgs       gr7,damlr3
0124 
0125     LEDS        0x3312
0126     call        __head_split_region
0127     movgs       gr4,iampr2
0128     movgs       gr6,iamlr2
0129     movgs       gr5,dampr2
0130     movgs       gr7,damlr2
0131 
0132     LEDS        0x3311
0133     call        __head_split_region
0134     movgs       gr4,iampr1
0135     movgs       gr6,iamlr1
0136     movgs       gr5,dampr1
0137     movgs       gr7,damlr1
0138 
0139     # cover kernel core image with kernel-only segment
0140     LEDS        0x3310
0141     sethi.p     %hi(__page_offset),gr8
0142     setlo       %lo(__page_offset),gr8
0143     call        __head_split_region
0144 
0145 #ifdef CONFIG_PROTECT_KERNEL
0146     ori.p       gr4,#xAMPRx_S_KERNEL,gr4
0147     ori     gr5,#xAMPRx_S_KERNEL,gr5
0148 #endif
0149 
0150     movgs       gr4,iampr0
0151     movgs       gr6,iamlr0
0152     movgs       gr5,dampr0
0153     movgs       gr7,damlr0
0154 
0155     # start in TLB context 0 with no page tables
0156     movgs       gr0,cxnr
0157     movgs       gr0,ttbr
0158 
0159     # the FR451 also has an extra trap base register
0160     movsg       tbr,gr4
0161     movgs       gr4,btbr
0162 
0163     # turn on the timers as appropriate
0164     movgs       gr0,timerh
0165     movgs       gr0,timerl
0166     movgs       gr0,timerd
0167     movsg       hsr0,gr4
0168     sethi.p     %hi(HSR0_ETMI),gr5
0169     setlo       %lo(HSR0_ETMI),gr5
0170     or      gr4,gr5,gr4
0171     movgs       gr4,hsr0
0172 
0173     LEDS        0x3300
0174     jmpl        @(gr27,gr0)