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0001 #ifndef ASMARM_DMA_MAPPING_H
0002 #define ASMARM_DMA_MAPPING_H
0003 
0004 #ifdef __KERNEL__
0005 
0006 #include <linux/mm_types.h>
0007 #include <linux/scatterlist.h>
0008 #include <linux/dma-debug.h>
0009 
0010 #include <asm/memory.h>
0011 
0012 #include <xen/xen.h>
0013 #include <asm/xen/hypervisor.h>
0014 
0015 #define DMA_ERROR_CODE  (~(dma_addr_t)0x0)
0016 extern struct dma_map_ops arm_dma_ops;
0017 extern struct dma_map_ops arm_coherent_dma_ops;
0018 
0019 static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
0020 {
0021     if (dev && dev->archdata.dma_ops)
0022         return dev->archdata.dma_ops;
0023     return &arm_dma_ops;
0024 }
0025 
0026 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
0027 {
0028     if (xen_initial_domain())
0029         return xen_dma_ops;
0030     else
0031         return __generic_dma_ops(dev);
0032 }
0033 
0034 static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
0035 {
0036     BUG_ON(!dev);
0037     dev->archdata.dma_ops = ops;
0038 }
0039 
0040 #define HAVE_ARCH_DMA_SUPPORTED 1
0041 extern int dma_supported(struct device *dev, u64 mask);
0042 
0043 #ifdef __arch_page_to_dma
0044 #error Please update to __arch_pfn_to_dma
0045 #endif
0046 
0047 /*
0048  * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
0049  * functions used internally by the DMA-mapping API to provide DMA
0050  * addresses. They must not be used by drivers.
0051  */
0052 #ifndef __arch_pfn_to_dma
0053 static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
0054 {
0055     if (dev)
0056         pfn -= dev->dma_pfn_offset;
0057     return (dma_addr_t)__pfn_to_bus(pfn);
0058 }
0059 
0060 static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
0061 {
0062     unsigned long pfn = __bus_to_pfn(addr);
0063 
0064     if (dev)
0065         pfn += dev->dma_pfn_offset;
0066 
0067     return pfn;
0068 }
0069 
0070 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
0071 {
0072     if (dev) {
0073         unsigned long pfn = dma_to_pfn(dev, addr);
0074 
0075         return phys_to_virt(__pfn_to_phys(pfn));
0076     }
0077 
0078     return (void *)__bus_to_virt((unsigned long)addr);
0079 }
0080 
0081 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
0082 {
0083     if (dev)
0084         return pfn_to_dma(dev, virt_to_pfn(addr));
0085 
0086     return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
0087 }
0088 
0089 #else
0090 static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
0091 {
0092     return __arch_pfn_to_dma(dev, pfn);
0093 }
0094 
0095 static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
0096 {
0097     return __arch_dma_to_pfn(dev, addr);
0098 }
0099 
0100 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
0101 {
0102     return __arch_dma_to_virt(dev, addr);
0103 }
0104 
0105 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
0106 {
0107     return __arch_virt_to_dma(dev, addr);
0108 }
0109 #endif
0110 
0111 /* The ARM override for dma_max_pfn() */
0112 static inline unsigned long dma_max_pfn(struct device *dev)
0113 {
0114     return dma_to_pfn(dev, *dev->dma_mask);
0115 }
0116 #define dma_max_pfn(dev) dma_max_pfn(dev)
0117 
0118 #define arch_setup_dma_ops arch_setup_dma_ops
0119 extern void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
0120                    const struct iommu_ops *iommu, bool coherent);
0121 
0122 #define arch_teardown_dma_ops arch_teardown_dma_ops
0123 extern void arch_teardown_dma_ops(struct device *dev);
0124 
0125 /* do not use this function in a driver */
0126 static inline bool is_device_dma_coherent(struct device *dev)
0127 {
0128     return dev->archdata.dma_coherent;
0129 }
0130 
0131 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
0132 {
0133     unsigned int offset = paddr & ~PAGE_MASK;
0134     return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
0135 }
0136 
0137 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
0138 {
0139     unsigned int offset = dev_addr & ~PAGE_MASK;
0140     return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
0141 }
0142 
0143 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
0144 {
0145     u64 limit, mask;
0146 
0147     if (!dev->dma_mask)
0148         return 0;
0149 
0150     mask = *dev->dma_mask;
0151 
0152     limit = (mask + 1) & ~mask;
0153     if (limit && size > limit)
0154         return 0;
0155 
0156     if ((addr | (addr + size - 1)) & ~mask)
0157         return 0;
0158 
0159     return 1;
0160 }
0161 
0162 static inline void dma_mark_clean(void *addr, size_t size) { }
0163 
0164 /**
0165  * arm_dma_alloc - allocate consistent memory for DMA
0166  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
0167  * @size: required memory size
0168  * @handle: bus-specific DMA address
0169  * @attrs: optinal attributes that specific mapping properties
0170  *
0171  * Allocate some memory for a device for performing DMA.  This function
0172  * allocates pages, and will return the CPU-viewed address, and sets @handle
0173  * to be the device-viewed address.
0174  */
0175 extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
0176                gfp_t gfp, unsigned long attrs);
0177 
0178 /**
0179  * arm_dma_free - free memory allocated by arm_dma_alloc
0180  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
0181  * @size: size of memory originally requested in dma_alloc_coherent
0182  * @cpu_addr: CPU-view address returned from dma_alloc_coherent
0183  * @handle: device-view address returned from dma_alloc_coherent
0184  * @attrs: optinal attributes that specific mapping properties
0185  *
0186  * Free (and unmap) a DMA buffer previously allocated by
0187  * arm_dma_alloc().
0188  *
0189  * References to memory and mappings associated with cpu_addr/handle
0190  * during and after this call executing are illegal.
0191  */
0192 extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
0193              dma_addr_t handle, unsigned long attrs);
0194 
0195 /**
0196  * arm_dma_mmap - map a coherent DMA allocation into user space
0197  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
0198  * @vma: vm_area_struct describing requested user mapping
0199  * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
0200  * @handle: device-view address returned from dma_alloc_coherent
0201  * @size: size of memory originally requested in dma_alloc_coherent
0202  * @attrs: optinal attributes that specific mapping properties
0203  *
0204  * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
0205  * into user space.  The coherent DMA buffer must not be freed by the
0206  * driver until the user space mapping has been released.
0207  */
0208 extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
0209             void *cpu_addr, dma_addr_t dma_addr, size_t size,
0210             unsigned long attrs);
0211 
0212 /*
0213  * This can be called during early boot to increase the size of the atomic
0214  * coherent DMA pool above the default value of 256KiB. It must be called
0215  * before postcore_initcall.
0216  */
0217 extern void __init init_dma_coherent_pool_size(unsigned long size);
0218 
0219 /*
0220  * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"
0221  * and utilize bounce buffers as needed to work around limited DMA windows.
0222  *
0223  * On the SA-1111, a bug limits DMA to only certain regions of RAM.
0224  * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
0225  * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
0226  *
0227  * The following are helper functions used by the dmabounce subystem
0228  *
0229  */
0230 
0231 /**
0232  * dmabounce_register_dev
0233  *
0234  * @dev: valid struct device pointer
0235  * @small_buf_size: size of buffers to use with small buffer pool
0236  * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
0237  * @needs_bounce_fn: called to determine whether buffer needs bouncing
0238  *
0239  * This function should be called by low-level platform code to register
0240  * a device as requireing DMA buffer bouncing. The function will allocate
0241  * appropriate DMA pools for the device.
0242  */
0243 extern int dmabounce_register_dev(struct device *, unsigned long,
0244         unsigned long, int (*)(struct device *, dma_addr_t, size_t));
0245 
0246 /**
0247  * dmabounce_unregister_dev
0248  *
0249  * @dev: valid struct device pointer
0250  *
0251  * This function should be called by low-level platform code when device
0252  * that was previously registered with dmabounce_register_dev is removed
0253  * from the system.
0254  *
0255  */
0256 extern void dmabounce_unregister_dev(struct device *);
0257 
0258 
0259 
0260 /*
0261  * The scatter list versions of the above methods.
0262  */
0263 extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
0264         enum dma_data_direction, unsigned long attrs);
0265 extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
0266         enum dma_data_direction, unsigned long attrs);
0267 extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
0268         enum dma_data_direction);
0269 extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
0270         enum dma_data_direction);
0271 extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
0272         void *cpu_addr, dma_addr_t dma_addr, size_t size,
0273         unsigned long attrs);
0274 
0275 #endif /* __KERNEL__ */
0276 #endif