selftests/resctrl/cmt_test.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Cache Monitoring Technology (CMT) test
0004  *
0005  * Copyright (C) 2018 Intel Corporation
0006  *
0007  * Authors:
0008  *    Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>,
0009  *    Fenghua Yu <fenghua.yu@intel.com>
0010  */
0011 #include "resctrl.h"
0012 #include <unistd.h>
0013
0014 #define RESULT_FILE_NAME    "result_cmt"
0015 #define NUM_OF_RUNS     5
0016 #define MAX_DIFF        2000000
0017 #define MAX_DIFF_PERCENT    15
0018
0019 static int count_of_bits;
0020 static char cbm_mask[256];
0021 static unsigned long long_mask;
0022 static unsigned long cache_size;
0023
0024 static int cmt_setup(int num, ...)
0025 {
0026     struct resctrl_val_param *p;
0027     va_list param;
0028
0029     va_start(param, num);
0030     p = va_arg(param, struct resctrl_val_param *);
0031     va_end(param);
0032
0033     /* Run NUM_OF_RUNS times */
0034     if (p->num_of_runs >= NUM_OF_RUNS)
0035         return -1;
0036
0037     p->num_of_runs++;
0038
0039     return 0;
0040 }
0041
0042 static int check_results(struct resctrl_val_param *param, int no_of_bits)
0043 {
0044     char *token_array[8], temp[512];
0045     unsigned long sum_llc_occu_resc = 0;
0046     int runs = 0;
0047     FILE *fp;
0048
0049     ksft_print_msg("Checking for pass/fail\n");
0050     fp = fopen(param->filename, "r");
0051     if (!fp) {
0052         perror("# Error in opening file\n");
0053
0054         return errno;
0055     }
0056
0057     while (fgets(temp, sizeof(temp), fp)) {
0058         char *token = strtok(temp, ":\t");
0059         int fields = 0;
0060
0061         while (token) {
0062             token_array[fields++] = token;
0063             token = strtok(NULL, ":\t");
0064         }
0065
0066         /* Field 3 is llc occ resc value */
0067         if (runs > 0)
0068             sum_llc_occu_resc += strtoul(token_array[3], NULL, 0);
0069         runs++;
0070     }
0071     fclose(fp);
0072
0073     return show_cache_info(sum_llc_occu_resc, no_of_bits, param->span,
0074                    MAX_DIFF, MAX_DIFF_PERCENT, NUM_OF_RUNS,
0075                    true, true);
0076 }
0077
0078 void cmt_test_cleanup(void)
0079 {
0080     remove(RESULT_FILE_NAME);
0081 }
0082
0083 int cmt_resctrl_val(int cpu_no, int n, char **benchmark_cmd)
0084 {
0085     int ret, mum_resctrlfs;
0086
0087     cache_size = 0;
0088     mum_resctrlfs = 1;
0089
0090     ret = remount_resctrlfs(mum_resctrlfs);
0091     if (ret)
0092         return ret;
0093
0094     if (!validate_resctrl_feature_request(CMT_STR))
0095         return -1;
0096
0097     ret = get_cbm_mask("L3", cbm_mask);
0098     if (ret)
0099         return ret;
0100
0101     long_mask = strtoul(cbm_mask, NULL, 16);
0102
0103     ret = get_cache_size(cpu_no, "L3", &cache_size);
0104     if (ret)
0105         return ret;
0106     ksft_print_msg("Cache size :%lu\n", cache_size);
0107
0108     count_of_bits = count_bits(long_mask);
0109
0110     if (n < 1 || n > count_of_bits) {
0111         ksft_print_msg("Invalid input value for numbr_of_bits n!\n");
0112         ksft_print_msg("Please enter value in range 1 to %d\n", count_of_bits);
0113         return -1;
0114     }
0115
0116     struct resctrl_val_param param = {
0117         .resctrl_val    = CMT_STR,
0118         .ctrlgrp    = "c1",
0119         .mongrp     = "m1",
0120         .cpu_no     = cpu_no,
0121         .mum_resctrlfs  = 0,
0122         .filename   = RESULT_FILE_NAME,
0123         .mask       = ~(long_mask << n) & long_mask,
0124         .span       = cache_size * n / count_of_bits,
0125         .num_of_runs    = 0,
0126         .setup      = cmt_setup,
0127     };
0128
0129     if (strcmp(benchmark_cmd[0], "fill_buf") == 0)
0130         sprintf(benchmark_cmd[1], "%lu", param.span);
0131
0132     remove(RESULT_FILE_NAME);
0133
0134     ret = resctrl_val(benchmark_cmd, &param);
0135     if (ret)
0136         return ret;
0137
0138     ret = check_results(&param, n);
0139     if (ret)
0140         return ret;
0141
0142     cmt_test_cleanup();
0143
0144     return 0;
0145 }