powerpc/tm/tm-signal-context-chk-vsx.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2016, Cyril Bur, IBM Corp.
0004  *
0005  * Test the kernel's signal frame code.
0006  *
0007  * The kernel sets up two sets of ucontexts if the signal was to be
0008  * delivered while the thread was in a transaction (referred too as
0009  * first and second contexts).
0010  * Expected behaviour is that the checkpointed state is in the user
0011  * context passed to the signal handler (first context). The speculated
0012  * state can be accessed with the uc_link pointer (second context).
0013  *
0014  * The rationale for this is that if TM unaware code (which linked
0015  * against TM libs) installs a signal handler it will not know of the
0016  * speculative nature of the 'live' registers and may infer the wrong
0017  * thing.
0018  */
0019
0020 #include <stdlib.h>
0021 #include <stdio.h>
0022 #include <string.h>
0023 #include <signal.h>
0024 #include <unistd.h>
0025
0026 #include <altivec.h>
0027
0028 #include "utils.h"
0029 #include "tm.h"
0030
0031 #define MAX_ATTEMPT 500000
0032
0033 #define NV_VSX_REGS 12 /* Number of VSX registers to check. */
0034 #define VSX20 20 /* First VSX register to check in vsr20-vsr31 subset */
0035 #define FPR20 20 /* FPR20 overlaps VSX20 most significant doubleword */
0036
0037 long tm_signal_self_context_load(pid_t pid, long *gprs, double *fps, vector int *vms, vector int *vss);
0038
0039 static sig_atomic_t fail, broken;
0040
0041 /* Test only 12 vsx registers from vsr20 to vsr31 */
0042 vector int vsxs[] = {
0043     /* First context will be set with these values, i.e. non-speculative */
0044     /* VSX20     ,  VSX21      , ... */
0045     { 1, 2, 3, 4},{ 5, 6, 7, 8},{ 9,10,11,12},
0046     {13,14,15,16},{17,18,19,20},{21,22,23,24},
0047     {25,26,27,28},{29,30,31,32},{33,34,35,36},
0048     {37,38,39,40},{41,42,43,44},{45,46,47,48},
0049     /* Second context will be set with these values, i.e. speculative */
0050     /* VSX20         ,  VSX21          , ... */
0051     {-1, -2, -3, -4 },{-5, -6, -7, -8 },{-9, -10,-11,-12},
0052     {-13,-14,-15,-16},{-17,-18,-19,-20},{-21,-22,-23,-24},
0053     {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
0054     {-37,-38,-39,-40},{-41,-42,-43,-44},{-45,-46,-47,-48}
0055 };
0056
0057 static void signal_usr1(int signum, siginfo_t *info, void *uc)
0058 {
0059     int i, j;
0060     uint8_t vsx[sizeof(vector int)];
0061     uint8_t vsx_tm[sizeof(vector int)];
0062     ucontext_t *ucp = uc;
0063     ucontext_t *tm_ucp = ucp->uc_link;
0064
0065     /*
0066      * FP registers and VMX registers overlap the VSX registers.
0067      *
0068      * FP registers (f0-31) overlap the most significant 64 bits of VSX
0069      * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like
0070      * the VSX registers, overlap fully the other half of VSX registers,
0071      * i.e. vr0-31 overlaps fully vsr32-63.
0072      *
0073      * Due to compatibility and historical reasons (VMX/Altivec support
0074      * appeared first on the architecture), VMX registers vr0-31 (so VSX
0075      * half vsr32-63 too) are stored right after the v_regs pointer, in an
0076      * area allocated for 'vmx_reverse' array (please see
0077      * arch/powerpc/include/uapi/asm/sigcontext.h for details about the
0078      * mcontext_t structure on Power).
0079      *
0080      * The other VSX half (vsr0-31) is hence stored below vr0-31/vsr32-63
0081      * registers, but only the least significant 64 bits of vsr0-31. The
0082      * most significant 64 bits of vsr0-31 (f0-31), as it overlaps the FP
0083      * registers, is kept in fp_regs.
0084      *
0085      * v_regs is a 16 byte aligned pointer at the start of vmx_reserve
0086      * (vmx_reserve may or may not be 16 aligned) where the v_regs structure
0087      * exists, so v_regs points to where vr0-31 / vsr32-63 registers are
0088      * fully stored. Since v_regs type is elf_vrregset_t, v_regs + 1
0089      * skips all the slots used to store vr0-31 / vsr32-64 and points to
0090      * part of one VSX half, i.e. v_regs + 1 points to the least significant
0091      * 64 bits of vsr0-31. The other part of this half (the most significant
0092      * part of vsr0-31) is stored in fp_regs.
0093      *
0094      */
0095     /* Get pointer to least significant doubleword of vsr0-31 */
0096     long *vsx_ptr = (long *)(ucp->uc_mcontext.v_regs + 1);
0097     long *tm_vsx_ptr = (long *)(tm_ucp->uc_mcontext.v_regs + 1);
0098
0099     /* Check first context. Print all mismatches. */
0100     for (i = 0; i < NV_VSX_REGS; i++) {
0101         /*
0102          * Copy VSX most significant doubleword from fp_regs and
0103          * copy VSX least significant one from 64-bit slots below
0104          * saved VMX registers.
0105          */
0106         memcpy(vsx, &ucp->uc_mcontext.fp_regs[FPR20 + i], 8);
0107         memcpy(vsx + 8, &vsx_ptr[VSX20 + i], 8);
0108
0109         fail = memcmp(vsx, &vsxs[i], sizeof(vector int));
0110
0111         if (fail) {
0112             broken = 1;
0113             printf("VSX%d (1st context) == 0x", VSX20 + i);
0114             for (j = 0; j < 16; j++)
0115                 printf("%02x", vsx[j]);
0116             printf(" instead of 0x");
0117             for (j = 0; j < 4; j++)
0118                 printf("%08x", vsxs[i][j]);
0119             printf(" (expected)\n");
0120         }
0121     }
0122
0123     /* Check second context. Print all mismatches. */
0124     for (i = 0; i < NV_VSX_REGS; i++) {
0125         /*
0126          * Copy VSX most significant doubleword from fp_regs and
0127          * copy VSX least significant one from 64-bit slots below
0128          * saved VMX registers.
0129          */
0130         memcpy(vsx_tm, &tm_ucp->uc_mcontext.fp_regs[FPR20 + i], 8);
0131         memcpy(vsx_tm + 8, &tm_vsx_ptr[VSX20 + i], 8);
0132
0133         fail = memcmp(vsx_tm, &vsxs[NV_VSX_REGS + i], sizeof(vector int));
0134
0135         if (fail) {
0136             broken = 1;
0137             printf("VSX%d (2nd context) == 0x", VSX20 + i);
0138             for (j = 0; j < 16; j++)
0139                 printf("%02x", vsx_tm[j]);
0140             printf(" instead of 0x");
0141             for (j = 0; j < 4; j++)
0142                 printf("%08x", vsxs[NV_VSX_REGS + i][j]);
0143             printf("(expected)\n");
0144         }
0145     }
0146 }
0147
0148 static int tm_signal_context_chk()
0149 {
0150     struct sigaction act;
0151     int i;
0152     long rc;
0153     pid_t pid = getpid();
0154
0155     SKIP_IF(!have_htm());
0156     SKIP_IF(htm_is_synthetic());
0157
0158     act.sa_sigaction = signal_usr1;
0159     sigemptyset(&act.sa_mask);
0160     act.sa_flags = SA_SIGINFO;
0161     if (sigaction(SIGUSR1, &act, NULL) < 0) {
0162         perror("sigaction sigusr1");
0163         exit(1);
0164     }
0165
0166     i = 0;
0167     while (i < MAX_ATTEMPT && !broken) {
0168                /*
0169                 * tm_signal_self_context_load will set both first and second
0170                 * contexts accordingly to the values passed through non-NULL
0171                 * array pointers to it, in that case 'vsxs', and invoke the
0172                 * signal handler installed for SIGUSR1.
0173                 */
0174         rc = tm_signal_self_context_load(pid, NULL, NULL, NULL, vsxs);
0175         FAIL_IF(rc != pid);
0176         i++;
0177     }
0178
0179     return (broken);
0180 }
0181
0182 int main(void)
0183 {
0184     return test_harness(tm_signal_context_chk, "tm_signal_context_chk_vsx");
0185 }