pmu/sampling_tests/misc.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright 2022, Athira Rajeev, IBM Corp.
0004  * Copyright 2022, Madhavan Srinivasan, IBM Corp.
0005  * Copyright 2022, Kajol Jain, IBM Corp.
0006  */
0007
0008 #include <sys/stat.h>
0009 #include "../event.h"
0010
0011 #define POWER10 0x80
0012 #define POWER9  0x4e
0013 #define PERF_POWER9_MASK        0x7f8ffffffffffff
0014 #define PERF_POWER10_MASK       0x7ffffffffffffff
0015
0016 #define MMCR0_FC56      0x00000010UL /* freeze counters 5 and 6 */
0017 #define MMCR0_PMCCEXT   0x00000200UL /* PMCCEXT control */
0018 #define MMCR1_RSQ       0x200000000000ULL /* radix scope qual field */
0019 #define BHRB_DISABLE    0x2000000000ULL /* MMCRA BHRB DISABLE bit */
0020
0021 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
0022
0023 extern int ev_mask_pmcxsel, ev_shift_pmcxsel;
0024 extern int ev_mask_marked, ev_shift_marked;
0025 extern int ev_mask_comb, ev_shift_comb;
0026 extern int ev_mask_unit, ev_shift_unit;
0027 extern int ev_mask_pmc, ev_shift_pmc;
0028 extern int ev_mask_cache, ev_shift_cache;
0029 extern int ev_mask_sample, ev_shift_sample;
0030 extern int ev_mask_thd_sel, ev_shift_thd_sel;
0031 extern int ev_mask_thd_start, ev_shift_thd_start;
0032 extern int ev_mask_thd_stop, ev_shift_thd_stop;
0033 extern int ev_mask_thd_cmp, ev_shift_thd_cmp;
0034 extern int ev_mask_sm, ev_shift_sm;
0035 extern int ev_mask_rsq, ev_shift_rsq;
0036 extern int ev_mask_l2l3, ev_shift_l2l3;
0037 extern int ev_mask_mmcr3_src, ev_shift_mmcr3_src;
0038 extern int pvr;
0039 extern u64 platform_extended_mask;
0040 extern int check_pvr_for_sampling_tests(void);
0041 extern int platform_check_for_tests(void);
0042
0043 /*
0044  * Event code field extraction macro.
0045  * Raw event code is combination of multiple
0046  * fields. Macro to extract individual fields
0047  *
0048  * x - Raw event code value
0049  * y - Field to extract
0050  */
0051 #define EV_CODE_EXTRACT(x, y)   \
0052     ((x >> ev_shift_##y) & ev_mask_##y)
0053
0054 void *event_sample_buf_mmap(int fd, int mmap_pages);
0055 void *__event_read_samples(void *sample_buff, size_t *size, u64 *sample_count);
0056 int collect_samples(void *sample_buff);
0057 u64 *get_intr_regs(struct event *event, void *sample_buff);
0058 u64 get_reg_value(u64 *intr_regs, char *register_name);
0059 int get_thresh_cmp_val(struct event event);
0060 bool check_for_generic_compat_pmu(void);
0061 bool check_for_compat_mode(void);
0062
0063 static inline int get_mmcr0_fc56(u64 mmcr0, int pmc)
0064 {
0065     return (mmcr0 & MMCR0_FC56);
0066 }
0067
0068 static inline int get_mmcr0_pmccext(u64 mmcr0, int pmc)
0069 {
0070     return (mmcr0 & MMCR0_PMCCEXT);
0071 }
0072
0073 static inline int get_mmcr0_pmao(u64 mmcr0, int pmc)
0074 {
0075     return ((mmcr0 >> 7) & 0x1);
0076 }
0077
0078 static inline int get_mmcr0_cc56run(u64 mmcr0, int pmc)
0079 {
0080     return ((mmcr0 >> 8) & 0x1);
0081 }
0082
0083 static inline int get_mmcr0_pmcjce(u64 mmcr0, int pmc)
0084 {
0085     return ((mmcr0 >> 14) & 0x1);
0086 }
0087
0088 static inline int get_mmcr0_pmc1ce(u64 mmcr0, int pmc)
0089 {
0090     return ((mmcr0 >> 15) & 0x1);
0091 }
0092
0093 static inline int get_mmcr0_pmae(u64 mmcr0, int pmc)
0094 {
0095     return ((mmcr0 >> 27) & 0x1);
0096 }
0097
0098 static inline int get_mmcr1_pmcxsel(u64 mmcr1, int pmc)
0099 {
0100     return ((mmcr1 >> ((24 - (((pmc) - 1) * 8))) & 0xff));
0101 }
0102
0103 static inline int get_mmcr1_unit(u64 mmcr1, int pmc)
0104 {
0105     return ((mmcr1 >> ((60 - (4 * ((pmc) - 1))))) & 0xf);
0106 }
0107
0108 static inline int get_mmcr1_comb(u64 mmcr1, int pmc)
0109 {
0110     return ((mmcr1 >> (38 - ((pmc - 1) * 2))) & 0x3);
0111 }
0112
0113 static inline int get_mmcr1_cache(u64 mmcr1, int pmc)
0114 {
0115     return ((mmcr1 >> 46) & 0x3);
0116 }
0117
0118 static inline int get_mmcr1_rsq(u64 mmcr1, int pmc)
0119 {
0120     return mmcr1 & MMCR1_RSQ;
0121 }
0122
0123 static inline int get_mmcr2_fcs(u64 mmcr2, int pmc)
0124 {
0125     return ((mmcr2 & (1ull << (63 - (((pmc) - 1) * 9)))) >> (63 - (((pmc) - 1) * 9)));
0126 }
0127
0128 static inline int get_mmcr2_fcp(u64 mmcr2, int pmc)
0129 {
0130     return ((mmcr2 & (1ull << (62 - (((pmc) - 1) * 9)))) >> (62 - (((pmc) - 1) * 9)));
0131 }
0132
0133 static inline int get_mmcr2_fcpc(u64 mmcr2, int pmc)
0134 {
0135     return ((mmcr2 & (1ull << (61 - (((pmc) - 1) * 9)))) >> (61 - (((pmc) - 1) * 9)));
0136 }
0137
0138 static inline int get_mmcr2_fcm1(u64 mmcr2, int pmc)
0139 {
0140     return ((mmcr2 & (1ull << (60 - (((pmc) - 1) * 9)))) >> (60 - (((pmc) - 1) * 9)));
0141 }
0142
0143 static inline int get_mmcr2_fcm0(u64 mmcr2, int pmc)
0144 {
0145     return ((mmcr2 & (1ull << (59 - (((pmc) - 1) * 9)))) >> (59 - (((pmc) - 1) * 9)));
0146 }
0147
0148 static inline int get_mmcr2_fcwait(u64 mmcr2, int pmc)
0149 {
0150     return ((mmcr2 & (1ull << (58 - (((pmc) - 1) * 9)))) >> (58 - (((pmc) - 1) * 9)));
0151 }
0152
0153 static inline int get_mmcr2_fch(u64 mmcr2, int pmc)
0154 {
0155     return ((mmcr2 & (1ull << (57 - (((pmc) - 1) * 9)))) >> (57 - (((pmc) - 1) * 9)));
0156 }
0157
0158 static inline int get_mmcr2_fcti(u64 mmcr2, int pmc)
0159 {
0160     return ((mmcr2 & (1ull << (56 - (((pmc) - 1) * 9)))) >> (56 - (((pmc) - 1) * 9)));
0161 }
0162
0163 static inline int get_mmcr2_fcta(u64 mmcr2, int pmc)
0164 {
0165     return ((mmcr2 & (1ull << (55 - (((pmc) - 1) * 9)))) >> (55 - (((pmc) - 1) * 9)));
0166 }
0167
0168 static inline int get_mmcr2_l2l3(u64 mmcr2, int pmc)
0169 {
0170     if (pvr == POWER10)
0171         return ((mmcr2 & 0xf8) >> 3);
0172     return 0;
0173 }
0174
0175 static inline int get_mmcr3_src(u64 mmcr3, int pmc)
0176 {
0177     if (pvr != POWER10)
0178         return 0;
0179     return ((mmcr3 >> ((49 - (15 * ((pmc) - 1))))) & 0x7fff);
0180 }
0181
0182 static inline int get_mmcra_thd_cmp(u64 mmcra, int pmc)
0183 {
0184     if (pvr == POWER10)
0185         return ((mmcra >> 45) & 0x7ff);
0186     return ((mmcra >> 45) & 0x3ff);
0187 }
0188
0189 static inline int get_mmcra_sm(u64 mmcra, int pmc)
0190 {
0191     return ((mmcra >> 42) & 0x3);
0192 }
0193
0194 static inline u64 get_mmcra_bhrb_disable(u64 mmcra, int pmc)
0195 {
0196     if (pvr == POWER10)
0197         return mmcra & BHRB_DISABLE;
0198     return 0;
0199 }
0200
0201 static inline int get_mmcra_ifm(u64 mmcra, int pmc)
0202 {
0203     return ((mmcra >> 30) & 0x3);
0204 }
0205
0206 static inline int get_mmcra_thd_sel(u64 mmcra, int pmc)
0207 {
0208     return ((mmcra >> 16) & 0x7);
0209 }
0210
0211 static inline int get_mmcra_thd_start(u64 mmcra, int pmc)
0212 {
0213     return ((mmcra >> 12) & 0xf);
0214 }
0215
0216 static inline int get_mmcra_thd_stop(u64 mmcra, int pmc)
0217 {
0218     return ((mmcra >> 8) & 0xf);
0219 }
0220
0221 static inline int get_mmcra_rand_samp_elig(u64 mmcra, int pmc)
0222 {
0223     return ((mmcra >> 4) & 0x7);
0224 }
0225
0226 static inline int get_mmcra_sample_mode(u64 mmcra, int pmc)
0227 {
0228     return ((mmcra >> 1) & 0x3);
0229 }
0230
0231 static inline int get_mmcra_marked(u64 mmcra, int pmc)
0232 {
0233     return mmcra & 0x1;
0234 }