nx-gzip/include/crb.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 #ifndef __CRB_H
0003 #define __CRB_H
0004 #include <linux/types.h>
0005 #include "nx.h"
0006
0007 /* CCW 842 CI/FC masks
0008  * NX P8 workbook, section 4.3.1, figure 4-6
0009  * "CI/FC Boundary by NX CT type"
0010  */
0011 #define CCW_CI_842              (0x00003ff8)
0012 #define CCW_FC_842              (0x00000007)
0013
0014 /* Chapter 6.5.8 Coprocessor-Completion Block (CCB) */
0015
0016 #define CCB_VALUE       (0x3fffffffffffffff)
0017 #define CCB_ADDRESS     (0xfffffffffffffff8)
0018 #define CCB_CM          (0x0000000000000007)
0019 #define CCB_CM0         (0x0000000000000004)
0020 #define CCB_CM12        (0x0000000000000003)
0021
0022 #define CCB_CM0_ALL_COMPLETIONS (0x0)
0023 #define CCB_CM0_LAST_IN_CHAIN   (0x4)
0024 #define CCB_CM12_STORE      (0x0)
0025 #define CCB_CM12_INTERRUPT  (0x1)
0026
0027 #define CCB_SIZE        (0x10)
0028 #define CCB_ALIGN       CCB_SIZE
0029
0030 struct coprocessor_completion_block {
0031     __be64 value;
0032     __be64 address;
0033 } __aligned(CCB_ALIGN);
0034
0035
0036 /* Chapter 6.5.7 Coprocessor-Status Block (CSB) */
0037
0038 #define CSB_V           (0x80)
0039 #define CSB_F           (0x04)
0040 #define CSB_CH          (0x03)
0041 #define CSB_CE_INCOMPLETE   (0x80)
0042 #define CSB_CE_TERMINATION  (0x40)
0043 #define CSB_CE_TPBC     (0x20)
0044
0045 #define CSB_CC_SUCCESS      (0)
0046 #define CSB_CC_INVALID_ALIGN    (1)
0047 #define CSB_CC_OPERAND_OVERLAP  (2)
0048 #define CSB_CC_DATA_LENGTH  (3)
0049 #define CSB_CC_TRANSLATION  (5)
0050 #define CSB_CC_PROTECTION   (6)
0051 #define CSB_CC_RD_EXTERNAL  (7)
0052 #define CSB_CC_INVALID_OPERAND  (8)
0053 #define CSB_CC_PRIVILEGE    (9)
0054 #define CSB_CC_INTERNAL     (10)
0055 #define CSB_CC_WR_EXTERNAL  (12)
0056 #define CSB_CC_NOSPC        (13)
0057 #define CSB_CC_EXCESSIVE_DDE    (14)
0058 #define CSB_CC_WR_TRANSLATION   (15)
0059 #define CSB_CC_WR_PROTECTION    (16)
0060 #define CSB_CC_UNKNOWN_CODE (17)
0061 #define CSB_CC_ABORT        (18)
0062 #define CSB_CC_TRANSPORT    (20)
0063 #define CSB_CC_SEGMENTED_DDL    (31)
0064 #define CSB_CC_PROGRESS_POINT   (32)
0065 #define CSB_CC_DDE_OVERFLOW (33)
0066 #define CSB_CC_SESSION      (34)
0067 #define CSB_CC_PROVISION    (36)
0068 #define CSB_CC_CHAIN        (37)
0069 #define CSB_CC_SEQUENCE     (38)
0070 #define CSB_CC_HW       (39)
0071
0072 #define CSB_SIZE        (0x10)
0073 #define CSB_ALIGN       CSB_SIZE
0074
0075 struct coprocessor_status_block {
0076     __u8 flags;
0077     __u8 cs;
0078     __u8 cc;
0079     __u8 ce;
0080     __be32 count;
0081     __be64 address;
0082 } __aligned(CSB_ALIGN);
0083
0084
0085 /* Chapter 6.5.10 Data-Descriptor List (DDL)
0086  * each list contains one or more Data-Descriptor Entries (DDE)
0087  */
0088
0089 #define DDE_P           (0x8000)
0090
0091 #define DDE_SIZE        (0x10)
0092 #define DDE_ALIGN       DDE_SIZE
0093
0094 struct data_descriptor_entry {
0095     __be16 flags;
0096     __u8 count;
0097     __u8 index;
0098     __be32 length;
0099     __be64 address;
0100 } __aligned(DDE_ALIGN);
0101
0102
0103 /* Chapter 6.5.2 Coprocessor-Request Block (CRB) */
0104
0105 #define CRB_SIZE        (0x80)
0106 #define CRB_ALIGN       (0x100) /* Errata: requires 256 alignment */
0107
0108
0109 /* Coprocessor Status Block field
0110  *   ADDRESS    address of CSB
0111  *   C      CCB is valid
0112  *   AT     0 = addrs are virtual, 1 = addrs are phys
0113  *   M      enable perf monitor
0114  */
0115 #define CRB_CSB_ADDRESS     (0xfffffffffffffff0)
0116 #define CRB_CSB_C       (0x0000000000000008)
0117 #define CRB_CSB_AT      (0x0000000000000002)
0118 #define CRB_CSB_M       (0x0000000000000001)
0119
0120 struct coprocessor_request_block {
0121     __be32 ccw;
0122     __be32 flags;
0123     __be64 csb_addr;
0124
0125     struct data_descriptor_entry source;
0126     struct data_descriptor_entry target;
0127
0128     struct coprocessor_completion_block ccb;
0129
0130     __u8 reserved[48];
0131
0132     struct coprocessor_status_block csb;
0133 } __aligned(CRB_ALIGN);
0134
0135 #define crb_csb_addr(c)         __be64_to_cpu(c->csb_addr)
0136 #define crb_nx_fault_addr(c)    __be64_to_cpu(c->stamp.nx.fault_storage_addr)
0137 #define crb_nx_flags(c)         c->stamp.nx.flags
0138 #define crb_nx_fault_status(c)  c->stamp.nx.fault_status
0139 #define crb_nx_pswid(c)     c->stamp.nx.pswid
0140
0141
0142 /* RFC02167 Initiate Coprocessor Instructions document
0143  * Chapter 8.2.1.1.1 RS
0144  * Chapter 8.2.3 Coprocessor Directive
0145  * Chapter 8.2.4 Execution
0146  *
0147  * The CCW must be converted to BE before passing to icswx()
0148  */
0149
0150 #define CCW_PS                  (0xff000000)
0151 #define CCW_CT                  (0x00ff0000)
0152 #define CCW_CD                  (0x0000ffff)
0153 #define CCW_CL                  (0x0000c000)
0154
0155 #endif