powerpc/include/gpr_asm.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright 2016, Cyril Bur, IBM Corp.
0004  */
0005
0006 #ifndef _SELFTESTS_POWERPC_GPR_ASM_H
0007 #define _SELFTESTS_POWERPC_GPR_ASM_H
0008
0009 #include "basic_asm.h"
0010
0011 #define __PUSH_NVREGS(top_pos); \
0012     std r31,(top_pos)(%r1); \
0013     std r30,(top_pos - 8)(%r1); \
0014     std r29,(top_pos - 16)(%r1); \
0015     std r28,(top_pos - 24)(%r1); \
0016     std r27,(top_pos - 32)(%r1); \
0017     std r26,(top_pos - 40)(%r1); \
0018     std r25,(top_pos - 48)(%r1); \
0019     std r24,(top_pos - 56)(%r1); \
0020     std r23,(top_pos - 64)(%r1); \
0021     std r22,(top_pos - 72)(%r1); \
0022     std r21,(top_pos - 80)(%r1); \
0023     std r20,(top_pos - 88)(%r1); \
0024     std r19,(top_pos - 96)(%r1); \
0025     std r18,(top_pos - 104)(%r1); \
0026     std r17,(top_pos - 112)(%r1); \
0027     std r16,(top_pos - 120)(%r1); \
0028     std r15,(top_pos - 128)(%r1); \
0029     std r14,(top_pos - 136)(%r1)
0030
0031 #define __POP_NVREGS(top_pos); \
0032     ld r31,(top_pos)(%r1); \
0033     ld r30,(top_pos - 8)(%r1); \
0034     ld r29,(top_pos - 16)(%r1); \
0035     ld r28,(top_pos - 24)(%r1); \
0036     ld r27,(top_pos - 32)(%r1); \
0037     ld r26,(top_pos - 40)(%r1); \
0038     ld r25,(top_pos - 48)(%r1); \
0039     ld r24,(top_pos - 56)(%r1); \
0040     ld r23,(top_pos - 64)(%r1); \
0041     ld r22,(top_pos - 72)(%r1); \
0042     ld r21,(top_pos - 80)(%r1); \
0043     ld r20,(top_pos - 88)(%r1); \
0044     ld r19,(top_pos - 96)(%r1); \
0045     ld r18,(top_pos - 104)(%r1); \
0046     ld r17,(top_pos - 112)(%r1); \
0047     ld r16,(top_pos - 120)(%r1); \
0048     ld r15,(top_pos - 128)(%r1); \
0049     ld r14,(top_pos - 136)(%r1)
0050
0051 #define PUSH_NVREGS(stack_size) \
0052     __PUSH_NVREGS(stack_size + STACK_FRAME_MIN_SIZE)
0053
0054 /* 18 NV FPU REGS */
0055 #define PUSH_NVREGS_BELOW_FPU(stack_size) \
0056     __PUSH_NVREGS(stack_size + STACK_FRAME_MIN_SIZE - (18 * 8))
0057
0058 #define POP_NVREGS(stack_size) \
0059     __POP_NVREGS(stack_size + STACK_FRAME_MIN_SIZE)
0060
0061 /* 18 NV FPU REGS */
0062 #define POP_NVREGS_BELOW_FPU(stack_size) \
0063     __POP_NVREGS(stack_size + STACK_FRAME_MIN_SIZE - (18 * 8))
0064
0065 /*
0066  * Careful calling this, it will 'clobber' NVGPRs (by design)
0067  * Don't call this from C
0068  */
0069 FUNC_START(load_gpr)
0070     ld  r14,0(r3)
0071     ld  r15,8(r3)
0072     ld  r16,16(r3)
0073     ld  r17,24(r3)
0074     ld  r18,32(r3)
0075     ld  r19,40(r3)
0076     ld  r20,48(r3)
0077     ld  r21,56(r3)
0078     ld  r22,64(r3)
0079     ld  r23,72(r3)
0080     ld  r24,80(r3)
0081     ld  r25,88(r3)
0082     ld  r26,96(r3)
0083     ld  r27,104(r3)
0084     ld  r28,112(r3)
0085     ld  r29,120(r3)
0086     ld  r30,128(r3)
0087     ld  r31,136(r3)
0088     blr
0089 FUNC_END(load_gpr)
0090
0091
0092 #endif /* _SELFTESTS_POWERPC_GPR_ASM_H */