kvm/x86_64/vmx_pmu_caps_test.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Test for VMX-pmu perf capability msr
0004  *
0005  * Copyright (C) 2021 Intel Corporation
0006  *
0007  * Test to check the effect of various CPUID settings on
0008  * MSR_IA32_PERF_CAPABILITIES MSR, and check that what
0009  * we write with KVM_SET_MSR is _not_ modified by the guest
0010  * and check it can be retrieved with KVM_GET_MSR, also test
0011  * the invalid LBR formats are rejected.
0012  */
0013
0014 #define _GNU_SOURCE /* for program_invocation_short_name */
0015 #include <sys/ioctl.h>
0016
0017 #include "kvm_util.h"
0018 #include "vmx.h"
0019
0020 #define PMU_CAP_FW_WRITES   (1ULL << 13)
0021 #define PMU_CAP_LBR_FMT     0x3f
0022
0023 union cpuid10_eax {
0024     struct {
0025         unsigned int version_id:8;
0026         unsigned int num_counters:8;
0027         unsigned int bit_width:8;
0028         unsigned int mask_length:8;
0029     } split;
0030     unsigned int full;
0031 };
0032
0033 union perf_capabilities {
0034     struct {
0035         u64 lbr_format:6;
0036         u64 pebs_trap:1;
0037         u64 pebs_arch_reg:1;
0038         u64 pebs_format:4;
0039         u64 smm_freeze:1;
0040         u64 full_width_write:1;
0041         u64 pebs_baseline:1;
0042         u64 perf_metrics:1;
0043         u64 pebs_output_pt_available:1;
0044         u64 anythread_deprecated:1;
0045     };
0046     u64 capabilities;
0047 };
0048
0049 static void guest_code(void)
0050 {
0051     wrmsr(MSR_IA32_PERF_CAPABILITIES, PMU_CAP_LBR_FMT);
0052 }
0053
0054 int main(int argc, char *argv[])
0055 {
0056     const struct kvm_cpuid_entry2 *entry_a_0;
0057     struct kvm_vm *vm;
0058     struct kvm_vcpu *vcpu;
0059     int ret;
0060     union cpuid10_eax eax;
0061     union perf_capabilities host_cap;
0062     uint64_t val;
0063
0064     host_cap.capabilities = kvm_get_feature_msr(MSR_IA32_PERF_CAPABILITIES);
0065     host_cap.capabilities &= (PMU_CAP_FW_WRITES | PMU_CAP_LBR_FMT);
0066
0067     /* Create VM */
0068     vm = vm_create_with_one_vcpu(&vcpu, guest_code);
0069
0070     TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM));
0071
0072     TEST_REQUIRE(kvm_get_cpuid_max_basic() >= 0xa);
0073     entry_a_0 = kvm_get_supported_cpuid_entry(0xa);
0074
0075     eax.full = entry_a_0->eax;
0076     __TEST_REQUIRE(eax.split.version_id, "PMU is not supported by the vCPU");
0077
0078     /* testcase 1, set capabilities when we have PDCM bit */
0079     vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, PMU_CAP_FW_WRITES);
0080
0081     /* check capabilities can be retrieved with KVM_GET_MSR */
0082     ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), PMU_CAP_FW_WRITES);
0083
0084     /* check whatever we write with KVM_SET_MSR is _not_ modified */
0085     vcpu_run(vcpu);
0086     ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), PMU_CAP_FW_WRITES);
0087
0088     /* testcase 2, check valid LBR formats are accepted */
0089     vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
0090     ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), 0);
0091
0092     vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.lbr_format);
0093     ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), (u64)host_cap.lbr_format);
0094
0095     /*
0096      * Testcase 3, check that an "invalid" LBR format is rejected.  Only an
0097      * exact match of the host's format (and 0/disabled) is allowed.
0098      */
0099     for (val = 1; val <= PMU_CAP_LBR_FMT; val++) {
0100         if (val == (host_cap.capabilities & PMU_CAP_LBR_FMT))
0101             continue;
0102
0103         ret = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, val);
0104         TEST_ASSERT(!ret, "Bad LBR FMT = 0x%lx didn't fail", val);
0105     }
0106
0107     printf("Completed perf capability tests.\n");
0108     kvm_vm_free(vm);
0109 }