lib/aarch64/vgic.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ARM Generic Interrupt Controller (GIC) v3 host support
0004  */
0005
0006 #include <linux/kvm.h>
0007 #include <linux/sizes.h>
0008 #include <asm/kvm_para.h>
0009 #include <asm/kvm.h>
0010
0011 #include "kvm_util.h"
0012 #include "vgic.h"
0013 #include "gic.h"
0014 #include "gic_v3.h"
0015
0016 /*
0017  * vGIC-v3 default host setup
0018  *
0019  * Input args:
0020  *  vm - KVM VM
0021  *  nr_vcpus - Number of vCPUs supported by this VM
0022  *  gicd_base_gpa - Guest Physical Address of the Distributor region
0023  *  gicr_base_gpa - Guest Physical Address of the Redistributor region
0024  *
0025  * Output args: None
0026  *
0027  * Return: GIC file-descriptor or negative error code upon failure
0028  *
0029  * The function creates a vGIC-v3 device and maps the distributor and
0030  * redistributor regions of the guest. Since it depends on the number of
0031  * vCPUs for the VM, it must be called after all the vCPUs have been created.
0032  */
0033 int vgic_v3_setup(struct kvm_vm *vm, unsigned int nr_vcpus, uint32_t nr_irqs,
0034         uint64_t gicd_base_gpa, uint64_t gicr_base_gpa)
0035 {
0036     int gic_fd;
0037     uint64_t redist_attr;
0038     struct list_head *iter;
0039     unsigned int nr_gic_pages, nr_vcpus_created = 0;
0040
0041     TEST_ASSERT(nr_vcpus, "Number of vCPUs cannot be empty\n");
0042
0043     /*
0044      * Make sure that the caller is infact calling this
0045      * function after all the vCPUs are added.
0046      */
0047     list_for_each(iter, &vm->vcpus)
0048         nr_vcpus_created++;
0049     TEST_ASSERT(nr_vcpus == nr_vcpus_created,
0050             "Number of vCPUs requested (%u) doesn't match with the ones created for the VM (%u)\n",
0051             nr_vcpus, nr_vcpus_created);
0052
0053     /* Distributor setup */
0054     gic_fd = __kvm_create_device(vm, KVM_DEV_TYPE_ARM_VGIC_V3);
0055     if (gic_fd < 0)
0056         return gic_fd;
0057
0058     kvm_device_attr_set(gic_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 0, &nr_irqs);
0059
0060     kvm_device_attr_set(gic_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
0061                 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL);
0062
0063     kvm_device_attr_set(gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR,
0064                 KVM_VGIC_V3_ADDR_TYPE_DIST, &gicd_base_gpa);
0065     nr_gic_pages = vm_calc_num_guest_pages(vm->mode, KVM_VGIC_V3_DIST_SIZE);
0066     virt_map(vm, gicd_base_gpa, gicd_base_gpa,  nr_gic_pages);
0067
0068     /* Redistributor setup */
0069     redist_attr = REDIST_REGION_ATTR_ADDR(nr_vcpus, gicr_base_gpa, 0, 0);
0070     kvm_device_attr_set(gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR,
0071                 KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION, &redist_attr);
0072     nr_gic_pages = vm_calc_num_guest_pages(vm->mode,
0073                         KVM_VGIC_V3_REDIST_SIZE * nr_vcpus);
0074     virt_map(vm, gicr_base_gpa, gicr_base_gpa,  nr_gic_pages);
0075
0076     kvm_device_attr_set(gic_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
0077                 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL);
0078
0079     return gic_fd;
0080 }
0081
0082 /* should only work for level sensitive interrupts */
0083 int _kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level)
0084 {
0085     uint64_t attr = 32 * (intid / 32);
0086     uint64_t index = intid % 32;
0087     uint64_t val;
0088     int ret;
0089
0090     ret = __kvm_device_attr_get(gic_fd, KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO,
0091                     attr, &val);
0092     if (ret != 0)
0093         return ret;
0094
0095     val |= 1U << index;
0096     ret = __kvm_device_attr_set(gic_fd, KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO,
0097                     attr, &val);
0098     return ret;
0099 }
0100
0101 void kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level)
0102 {
0103     int ret = _kvm_irq_set_level_info(gic_fd, intid, level);
0104
0105     TEST_ASSERT(!ret, KVM_IOCTL_ERROR(KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO, ret));
0106 }
0107
0108 int _kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level)
0109 {
0110     uint32_t irq = intid & KVM_ARM_IRQ_NUM_MASK;
0111
0112     TEST_ASSERT(!INTID_IS_SGI(intid), "KVM_IRQ_LINE's interface itself "
0113         "doesn't allow injecting SGIs. There's no mask for it.");
0114
0115     if (INTID_IS_PPI(intid))
0116         irq |= KVM_ARM_IRQ_TYPE_PPI << KVM_ARM_IRQ_TYPE_SHIFT;
0117     else
0118         irq |= KVM_ARM_IRQ_TYPE_SPI << KVM_ARM_IRQ_TYPE_SHIFT;
0119
0120     return _kvm_irq_line(vm, irq, level);
0121 }
0122
0123 void kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level)
0124 {
0125     int ret = _kvm_arm_irq_line(vm, intid, level);
0126
0127     TEST_ASSERT(!ret, KVM_IOCTL_ERROR(KVM_IRQ_LINE, ret));
0128 }
0129
0130 static void vgic_poke_irq(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu,
0131               uint64_t reg_off)
0132 {
0133     uint64_t reg = intid / 32;
0134     uint64_t index = intid % 32;
0135     uint64_t attr = reg_off + reg * 4;
0136     uint64_t val;
0137     bool intid_is_private = INTID_IS_SGI(intid) || INTID_IS_PPI(intid);
0138
0139     uint32_t group = intid_is_private ? KVM_DEV_ARM_VGIC_GRP_REDIST_REGS
0140                       : KVM_DEV_ARM_VGIC_GRP_DIST_REGS;
0141
0142     if (intid_is_private) {
0143         /* TODO: only vcpu 0 implemented for now. */
0144         assert(vcpu->id == 0);
0145         attr += SZ_64K;
0146     }
0147
0148     /* Check that the addr part of the attr is within 32 bits. */
0149     assert((attr & ~KVM_DEV_ARM_VGIC_OFFSET_MASK) == 0);
0150
0151     /*
0152      * All calls will succeed, even with invalid intid's, as long as the
0153      * addr part of the attr is within 32 bits (checked above). An invalid
0154      * intid will just make the read/writes point to above the intended
0155      * register space (i.e., ICPENDR after ISPENDR).
0156      */
0157     kvm_device_attr_get(gic_fd, group, attr, &val);
0158     val |= 1ULL << index;
0159     kvm_device_attr_set(gic_fd, group, attr, &val);
0160 }
0161
0162 void kvm_irq_write_ispendr(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu)
0163 {
0164     vgic_poke_irq(gic_fd, intid, vcpu, GICD_ISPENDR);
0165 }
0166
0167 void kvm_irq_write_isactiver(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu)
0168 {
0169     vgic_poke_irq(gic_fd, intid, vcpu, GICD_ISACTIVER);
0170 }