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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * vgic_irq.c - Test userspace injection of IRQs
0004  *
0005  * This test validates the injection of IRQs from userspace using various
0006  * methods (e.g., KVM_IRQ_LINE) and modes (e.g., EOI). The guest "asks" the
0007  * host to inject a specific intid via a GUEST_SYNC call, and then checks that
0008  * it received it.
0009  */
0010 
0011 #include <asm/kvm.h>
0012 #include <asm/kvm_para.h>
0013 #include <sys/eventfd.h>
0014 #include <linux/sizes.h>
0015 
0016 #include "processor.h"
0017 #include "test_util.h"
0018 #include "kvm_util.h"
0019 #include "gic.h"
0020 #include "gic_v3.h"
0021 #include "vgic.h"
0022 
0023 #define GICD_BASE_GPA       0x08000000ULL
0024 #define GICR_BASE_GPA       0x080A0000ULL
0025 
0026 /*
0027  * Stores the user specified args; it's passed to the guest and to every test
0028  * function.
0029  */
0030 struct test_args {
0031     uint32_t nr_irqs; /* number of KVM supported IRQs. */
0032     bool eoi_split; /* 1 is eoir+dir, 0 is eoir only */
0033     bool level_sensitive; /* 1 is level, 0 is edge */
0034     int kvm_max_routes; /* output of KVM_CAP_IRQ_ROUTING */
0035     bool kvm_supports_irqfd; /* output of KVM_CAP_IRQFD */
0036 };
0037 
0038 /*
0039  * KVM implements 32 priority levels:
0040  * 0x00 (highest priority) - 0xF8 (lowest priority), in steps of 8
0041  *
0042  * Note that these macros will still be correct in the case that KVM implements
0043  * more priority levels. Also note that 32 is the minimum for GICv3 and GICv2.
0044  */
0045 #define KVM_NUM_PRIOS       32
0046 #define KVM_PRIO_SHIFT      3 /* steps of 8 = 1 << 3 */
0047 #define KVM_PRIO_STEPS      (1 << KVM_PRIO_SHIFT) /* 8 */
0048 #define LOWEST_PRIO     (KVM_NUM_PRIOS - 1)
0049 #define CPU_PRIO_MASK       (LOWEST_PRIO << KVM_PRIO_SHIFT) /* 0xf8 */
0050 #define IRQ_DEFAULT_PRIO    (LOWEST_PRIO - 1)
0051 #define IRQ_DEFAULT_PRIO_REG    (IRQ_DEFAULT_PRIO << KVM_PRIO_SHIFT) /* 0xf0 */
0052 
0053 static void *dist = (void *)GICD_BASE_GPA;
0054 static void *redist = (void *)GICR_BASE_GPA;
0055 
0056 /*
0057  * The kvm_inject_* utilities are used by the guest to ask the host to inject
0058  * interrupts (e.g., using the KVM_IRQ_LINE ioctl).
0059  */
0060 
0061 typedef enum {
0062     KVM_INJECT_EDGE_IRQ_LINE = 1,
0063     KVM_SET_IRQ_LINE,
0064     KVM_SET_IRQ_LINE_HIGH,
0065     KVM_SET_LEVEL_INFO_HIGH,
0066     KVM_INJECT_IRQFD,
0067     KVM_WRITE_ISPENDR,
0068     KVM_WRITE_ISACTIVER,
0069 } kvm_inject_cmd;
0070 
0071 struct kvm_inject_args {
0072     kvm_inject_cmd cmd;
0073     uint32_t first_intid;
0074     uint32_t num;
0075     int level;
0076     bool expect_failure;
0077 };
0078 
0079 /* Used on the guest side to perform the hypercall. */
0080 static void kvm_inject_call(kvm_inject_cmd cmd, uint32_t first_intid,
0081         uint32_t num, int level, bool expect_failure);
0082 
0083 /* Used on the host side to get the hypercall info. */
0084 static void kvm_inject_get_call(struct kvm_vm *vm, struct ucall *uc,
0085         struct kvm_inject_args *args);
0086 
0087 #define _KVM_INJECT_MULTI(cmd, intid, num, expect_failure)          \
0088     kvm_inject_call(cmd, intid, num, -1 /* not used */, expect_failure)
0089 
0090 #define KVM_INJECT_MULTI(cmd, intid, num)                   \
0091     _KVM_INJECT_MULTI(cmd, intid, num, false)
0092 
0093 #define _KVM_INJECT(cmd, intid, expect_failure)                 \
0094     _KVM_INJECT_MULTI(cmd, intid, 1, expect_failure)
0095 
0096 #define KVM_INJECT(cmd, intid)                          \
0097     _KVM_INJECT_MULTI(cmd, intid, 1, false)
0098 
0099 #define KVM_ACTIVATE(cmd, intid)                        \
0100     kvm_inject_call(cmd, intid, 1, 1, false);
0101 
0102 struct kvm_inject_desc {
0103     kvm_inject_cmd cmd;
0104     /* can inject PPIs, PPIs, and/or SPIs. */
0105     bool sgi, ppi, spi;
0106 };
0107 
0108 static struct kvm_inject_desc inject_edge_fns[] = {
0109     /*                                      sgi    ppi    spi */
0110     { KVM_INJECT_EDGE_IRQ_LINE,     false, false, true },
0111     { KVM_INJECT_IRQFD,         false, false, true },
0112     { KVM_WRITE_ISPENDR,            true,  false, true },
0113     { 0, },
0114 };
0115 
0116 static struct kvm_inject_desc inject_level_fns[] = {
0117     /*                                      sgi    ppi    spi */
0118     { KVM_SET_IRQ_LINE_HIGH,        false, true,  true },
0119     { KVM_SET_LEVEL_INFO_HIGH,      false, true,  true },
0120     { KVM_INJECT_IRQFD,         false, false, true },
0121     { KVM_WRITE_ISPENDR,            false, true,  true },
0122     { 0, },
0123 };
0124 
0125 static struct kvm_inject_desc set_active_fns[] = {
0126     /*                                      sgi    ppi    spi */
0127     { KVM_WRITE_ISACTIVER,          true,  true,  true },
0128     { 0, },
0129 };
0130 
0131 #define for_each_inject_fn(t, f)                        \
0132     for ((f) = (t); (f)->cmd; (f)++)
0133 
0134 #define for_each_supported_inject_fn(args, t, f)                \
0135     for_each_inject_fn(t, f)                        \
0136         if ((args)->kvm_supports_irqfd || (f)->cmd != KVM_INJECT_IRQFD)
0137 
0138 #define for_each_supported_activate_fn(args, t, f)              \
0139     for_each_supported_inject_fn((args), (t), (f))
0140 
0141 /* Shared between the guest main thread and the IRQ handlers. */
0142 volatile uint64_t irq_handled;
0143 volatile uint32_t irqnr_received[MAX_SPI + 1];
0144 
0145 static void reset_stats(void)
0146 {
0147     int i;
0148 
0149     irq_handled = 0;
0150     for (i = 0; i <= MAX_SPI; i++)
0151         irqnr_received[i] = 0;
0152 }
0153 
0154 static uint64_t gic_read_ap1r0(void)
0155 {
0156     uint64_t reg = read_sysreg_s(SYS_ICV_AP1R0_EL1);
0157 
0158     dsb(sy);
0159     return reg;
0160 }
0161 
0162 static void gic_write_ap1r0(uint64_t val)
0163 {
0164     write_sysreg_s(val, SYS_ICV_AP1R0_EL1);
0165     isb();
0166 }
0167 
0168 static void guest_set_irq_line(uint32_t intid, uint32_t level);
0169 
0170 static void guest_irq_generic_handler(bool eoi_split, bool level_sensitive)
0171 {
0172     uint32_t intid = gic_get_and_ack_irq();
0173 
0174     if (intid == IAR_SPURIOUS)
0175         return;
0176 
0177     GUEST_ASSERT(gic_irq_get_active(intid));
0178 
0179     if (!level_sensitive)
0180         GUEST_ASSERT(!gic_irq_get_pending(intid));
0181 
0182     if (level_sensitive)
0183         guest_set_irq_line(intid, 0);
0184 
0185     GUEST_ASSERT(intid < MAX_SPI);
0186     irqnr_received[intid] += 1;
0187     irq_handled += 1;
0188 
0189     gic_set_eoi(intid);
0190     GUEST_ASSERT_EQ(gic_read_ap1r0(), 0);
0191     if (eoi_split)
0192         gic_set_dir(intid);
0193 
0194     GUEST_ASSERT(!gic_irq_get_active(intid));
0195     GUEST_ASSERT(!gic_irq_get_pending(intid));
0196 }
0197 
0198 static void kvm_inject_call(kvm_inject_cmd cmd, uint32_t first_intid,
0199         uint32_t num, int level, bool expect_failure)
0200 {
0201     struct kvm_inject_args args = {
0202         .cmd = cmd,
0203         .first_intid = first_intid,
0204         .num = num,
0205         .level = level,
0206         .expect_failure = expect_failure,
0207     };
0208     GUEST_SYNC(&args);
0209 }
0210 
0211 #define GUEST_ASSERT_IAR_EMPTY()                        \
0212 do {                                        \
0213     uint32_t _intid;                            \
0214     _intid = gic_get_and_ack_irq();                     \
0215     GUEST_ASSERT(_intid == 0 || _intid == IAR_SPURIOUS);            \
0216 } while (0)
0217 
0218 #define CAT_HELPER(a, b) a ## b
0219 #define CAT(a, b) CAT_HELPER(a, b)
0220 #define PREFIX guest_irq_handler_
0221 #define GUEST_IRQ_HANDLER_NAME(split, lev) CAT(PREFIX, CAT(split, lev))
0222 #define GENERATE_GUEST_IRQ_HANDLER(split, lev)                  \
0223 static void CAT(PREFIX, CAT(split, lev))(struct ex_regs *regs)          \
0224 {                                       \
0225     guest_irq_generic_handler(split, lev);                  \
0226 }
0227 
0228 GENERATE_GUEST_IRQ_HANDLER(0, 0);
0229 GENERATE_GUEST_IRQ_HANDLER(0, 1);
0230 GENERATE_GUEST_IRQ_HANDLER(1, 0);
0231 GENERATE_GUEST_IRQ_HANDLER(1, 1);
0232 
0233 static void (*guest_irq_handlers[2][2])(struct ex_regs *) = {
0234     {GUEST_IRQ_HANDLER_NAME(0, 0), GUEST_IRQ_HANDLER_NAME(0, 1),},
0235     {GUEST_IRQ_HANDLER_NAME(1, 0), GUEST_IRQ_HANDLER_NAME(1, 1),},
0236 };
0237 
0238 static void reset_priorities(struct test_args *args)
0239 {
0240     int i;
0241 
0242     for (i = 0; i < args->nr_irqs; i++)
0243         gic_set_priority(i, IRQ_DEFAULT_PRIO_REG);
0244 }
0245 
0246 static void guest_set_irq_line(uint32_t intid, uint32_t level)
0247 {
0248     kvm_inject_call(KVM_SET_IRQ_LINE, intid, 1, level, false);
0249 }
0250 
0251 static void test_inject_fail(struct test_args *args,
0252         uint32_t intid, kvm_inject_cmd cmd)
0253 {
0254     reset_stats();
0255 
0256     _KVM_INJECT(cmd, intid, true);
0257     /* no IRQ to handle on entry */
0258 
0259     GUEST_ASSERT_EQ(irq_handled, 0);
0260     GUEST_ASSERT_IAR_EMPTY();
0261 }
0262 
0263 static void guest_inject(struct test_args *args,
0264         uint32_t first_intid, uint32_t num,
0265         kvm_inject_cmd cmd)
0266 {
0267     uint32_t i;
0268 
0269     reset_stats();
0270 
0271     /* Cycle over all priorities to make things more interesting. */
0272     for (i = first_intid; i < num + first_intid; i++)
0273         gic_set_priority(i, (i % (KVM_NUM_PRIOS - 1)) << 3);
0274 
0275     asm volatile("msr daifset, #2" : : : "memory");
0276     KVM_INJECT_MULTI(cmd, first_intid, num);
0277 
0278     while (irq_handled < num) {
0279         asm volatile("wfi\n"
0280                  "msr daifclr, #2\n"
0281                  /* handle IRQ */
0282                  "msr daifset, #2\n"
0283                  : : : "memory");
0284     }
0285     asm volatile("msr daifclr, #2" : : : "memory");
0286 
0287     GUEST_ASSERT_EQ(irq_handled, num);
0288     for (i = first_intid; i < num + first_intid; i++)
0289         GUEST_ASSERT_EQ(irqnr_received[i], 1);
0290     GUEST_ASSERT_IAR_EMPTY();
0291 
0292     reset_priorities(args);
0293 }
0294 
0295 /*
0296  * Restore the active state of multiple concurrent IRQs (given by
0297  * concurrent_irqs).  This does what a live-migration would do on the
0298  * destination side assuming there are some active IRQs that were not
0299  * deactivated yet.
0300  */
0301 static void guest_restore_active(struct test_args *args,
0302         uint32_t first_intid, uint32_t num,
0303         kvm_inject_cmd cmd)
0304 {
0305     uint32_t prio, intid, ap1r;
0306     int i;
0307 
0308     /*
0309      * Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs
0310      * in descending order, so intid+1 can preempt intid.
0311      */
0312     for (i = 0, prio = (num - 1) * 8; i < num; i++, prio -= 8) {
0313         GUEST_ASSERT(prio >= 0);
0314         intid = i + first_intid;
0315         gic_set_priority(intid, prio);
0316     }
0317 
0318     /*
0319      * In a real migration, KVM would restore all GIC state before running
0320      * guest code.
0321      */
0322     for (i = 0; i < num; i++) {
0323         intid = i + first_intid;
0324         KVM_ACTIVATE(cmd, intid);
0325         ap1r = gic_read_ap1r0();
0326         ap1r |= 1U << i;
0327         gic_write_ap1r0(ap1r);
0328     }
0329 
0330     /* This is where the "migration" would occur. */
0331 
0332     /* finish handling the IRQs starting with the highest priority one. */
0333     for (i = 0; i < num; i++) {
0334         intid = num - i - 1 + first_intid;
0335         gic_set_eoi(intid);
0336         if (args->eoi_split)
0337             gic_set_dir(intid);
0338     }
0339 
0340     for (i = 0; i < num; i++)
0341         GUEST_ASSERT(!gic_irq_get_active(i + first_intid));
0342     GUEST_ASSERT_EQ(gic_read_ap1r0(), 0);
0343     GUEST_ASSERT_IAR_EMPTY();
0344 }
0345 
0346 /*
0347  * Polls the IAR until it's not a spurious interrupt.
0348  *
0349  * This function should only be used in test_inject_preemption (with IRQs
0350  * masked).
0351  */
0352 static uint32_t wait_for_and_activate_irq(void)
0353 {
0354     uint32_t intid;
0355 
0356     do {
0357         asm volatile("wfi" : : : "memory");
0358         intid = gic_get_and_ack_irq();
0359     } while (intid == IAR_SPURIOUS);
0360 
0361     return intid;
0362 }
0363 
0364 /*
0365  * Inject multiple concurrent IRQs (num IRQs starting at first_intid) and
0366  * handle them without handling the actual exceptions.  This is done by masking
0367  * interrupts for the whole test.
0368  */
0369 static void test_inject_preemption(struct test_args *args,
0370         uint32_t first_intid, int num,
0371         kvm_inject_cmd cmd)
0372 {
0373     uint32_t intid, prio, step = KVM_PRIO_STEPS;
0374     int i;
0375 
0376     /* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs
0377      * in descending order, so intid+1 can preempt intid.
0378      */
0379     for (i = 0, prio = (num - 1) * step; i < num; i++, prio -= step) {
0380         GUEST_ASSERT(prio >= 0);
0381         intid = i + first_intid;
0382         gic_set_priority(intid, prio);
0383     }
0384 
0385     local_irq_disable();
0386 
0387     for (i = 0; i < num; i++) {
0388         uint32_t tmp;
0389         intid = i + first_intid;
0390         KVM_INJECT(cmd, intid);
0391         /* Each successive IRQ will preempt the previous one. */
0392         tmp = wait_for_and_activate_irq();
0393         GUEST_ASSERT_EQ(tmp, intid);
0394         if (args->level_sensitive)
0395             guest_set_irq_line(intid, 0);
0396     }
0397 
0398     /* finish handling the IRQs starting with the highest priority one. */
0399     for (i = 0; i < num; i++) {
0400         intid = num - i - 1 + first_intid;
0401         gic_set_eoi(intid);
0402         if (args->eoi_split)
0403             gic_set_dir(intid);
0404     }
0405 
0406     local_irq_enable();
0407 
0408     for (i = 0; i < num; i++)
0409         GUEST_ASSERT(!gic_irq_get_active(i + first_intid));
0410     GUEST_ASSERT_EQ(gic_read_ap1r0(), 0);
0411     GUEST_ASSERT_IAR_EMPTY();
0412 
0413     reset_priorities(args);
0414 }
0415 
0416 static void test_injection(struct test_args *args, struct kvm_inject_desc *f)
0417 {
0418     uint32_t nr_irqs = args->nr_irqs;
0419 
0420     if (f->sgi) {
0421         guest_inject(args, MIN_SGI, 1, f->cmd);
0422         guest_inject(args, 0, 16, f->cmd);
0423     }
0424 
0425     if (f->ppi)
0426         guest_inject(args, MIN_PPI, 1, f->cmd);
0427 
0428     if (f->spi) {
0429         guest_inject(args, MIN_SPI, 1, f->cmd);
0430         guest_inject(args, nr_irqs - 1, 1, f->cmd);
0431         guest_inject(args, MIN_SPI, nr_irqs - MIN_SPI, f->cmd);
0432     }
0433 }
0434 
0435 static void test_injection_failure(struct test_args *args,
0436         struct kvm_inject_desc *f)
0437 {
0438     uint32_t bad_intid[] = { args->nr_irqs, 1020, 1024, 1120, 5120, ~0U, };
0439     int i;
0440 
0441     for (i = 0; i < ARRAY_SIZE(bad_intid); i++)
0442         test_inject_fail(args, bad_intid[i], f->cmd);
0443 }
0444 
0445 static void test_preemption(struct test_args *args, struct kvm_inject_desc *f)
0446 {
0447     /*
0448      * Test up to 4 levels of preemption. The reason is that KVM doesn't
0449      * currently implement the ability to have more than the number-of-LRs
0450      * number of concurrently active IRQs. The number of LRs implemented is
0451      * IMPLEMENTATION DEFINED, however, it seems that most implement 4.
0452      */
0453     if (f->sgi)
0454         test_inject_preemption(args, MIN_SGI, 4, f->cmd);
0455 
0456     if (f->ppi)
0457         test_inject_preemption(args, MIN_PPI, 4, f->cmd);
0458 
0459     if (f->spi)
0460         test_inject_preemption(args, MIN_SPI, 4, f->cmd);
0461 }
0462 
0463 static void test_restore_active(struct test_args *args, struct kvm_inject_desc *f)
0464 {
0465     /* Test up to 4 active IRQs. Same reason as in test_preemption. */
0466     if (f->sgi)
0467         guest_restore_active(args, MIN_SGI, 4, f->cmd);
0468 
0469     if (f->ppi)
0470         guest_restore_active(args, MIN_PPI, 4, f->cmd);
0471 
0472     if (f->spi)
0473         guest_restore_active(args, MIN_SPI, 4, f->cmd);
0474 }
0475 
0476 static void guest_code(struct test_args *args)
0477 {
0478     uint32_t i, nr_irqs = args->nr_irqs;
0479     bool level_sensitive = args->level_sensitive;
0480     struct kvm_inject_desc *f, *inject_fns;
0481 
0482     gic_init(GIC_V3, 1, dist, redist);
0483 
0484     for (i = 0; i < nr_irqs; i++)
0485         gic_irq_enable(i);
0486 
0487     for (i = MIN_SPI; i < nr_irqs; i++)
0488         gic_irq_set_config(i, !level_sensitive);
0489 
0490     gic_set_eoi_split(args->eoi_split);
0491 
0492     reset_priorities(args);
0493     gic_set_priority_mask(CPU_PRIO_MASK);
0494 
0495     inject_fns  = level_sensitive ? inject_level_fns
0496                       : inject_edge_fns;
0497 
0498     local_irq_enable();
0499 
0500     /* Start the tests. */
0501     for_each_supported_inject_fn(args, inject_fns, f) {
0502         test_injection(args, f);
0503         test_preemption(args, f);
0504         test_injection_failure(args, f);
0505     }
0506 
0507     /*
0508      * Restore the active state of IRQs. This would happen when live
0509      * migrating IRQs in the middle of being handled.
0510      */
0511     for_each_supported_activate_fn(args, set_active_fns, f)
0512         test_restore_active(args, f);
0513 
0514     GUEST_DONE();
0515 }
0516 
0517 static void kvm_irq_line_check(struct kvm_vm *vm, uint32_t intid, int level,
0518             struct test_args *test_args, bool expect_failure)
0519 {
0520     int ret;
0521 
0522     if (!expect_failure) {
0523         kvm_arm_irq_line(vm, intid, level);
0524     } else {
0525         /* The interface doesn't allow larger intid's. */
0526         if (intid > KVM_ARM_IRQ_NUM_MASK)
0527             return;
0528 
0529         ret = _kvm_arm_irq_line(vm, intid, level);
0530         TEST_ASSERT(ret != 0 && errno == EINVAL,
0531                 "Bad intid %i did not cause KVM_IRQ_LINE "
0532                 "error: rc: %i errno: %i", intid, ret, errno);
0533     }
0534 }
0535 
0536 void kvm_irq_set_level_info_check(int gic_fd, uint32_t intid, int level,
0537             bool expect_failure)
0538 {
0539     if (!expect_failure) {
0540         kvm_irq_set_level_info(gic_fd, intid, level);
0541     } else {
0542         int ret = _kvm_irq_set_level_info(gic_fd, intid, level);
0543         /*
0544          * The kernel silently fails for invalid SPIs and SGIs (which
0545          * are not level-sensitive). It only checks for intid to not
0546          * spill over 1U << 10 (the max reserved SPI). Also, callers
0547          * are supposed to mask the intid with 0x3ff (1023).
0548          */
0549         if (intid > VGIC_MAX_RESERVED)
0550             TEST_ASSERT(ret != 0 && errno == EINVAL,
0551                 "Bad intid %i did not cause VGIC_GRP_LEVEL_INFO "
0552                 "error: rc: %i errno: %i", intid, ret, errno);
0553         else
0554             TEST_ASSERT(!ret, "KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO "
0555                 "for intid %i failed, rc: %i errno: %i",
0556                 intid, ret, errno);
0557     }
0558 }
0559 
0560 static void kvm_set_gsi_routing_irqchip_check(struct kvm_vm *vm,
0561         uint32_t intid, uint32_t num, uint32_t kvm_max_routes,
0562         bool expect_failure)
0563 {
0564     struct kvm_irq_routing *routing;
0565     int ret;
0566     uint64_t i;
0567 
0568     assert(num <= kvm_max_routes && kvm_max_routes <= KVM_MAX_IRQ_ROUTES);
0569 
0570     routing = kvm_gsi_routing_create();
0571     for (i = intid; i < (uint64_t)intid + num; i++)
0572         kvm_gsi_routing_irqchip_add(routing, i - MIN_SPI, i - MIN_SPI);
0573 
0574     if (!expect_failure) {
0575         kvm_gsi_routing_write(vm, routing);
0576     } else {
0577         ret = _kvm_gsi_routing_write(vm, routing);
0578         /* The kernel only checks e->irqchip.pin >= KVM_IRQCHIP_NUM_PINS */
0579         if (((uint64_t)intid + num - 1 - MIN_SPI) >= KVM_IRQCHIP_NUM_PINS)
0580             TEST_ASSERT(ret != 0 && errno == EINVAL,
0581                 "Bad intid %u did not cause KVM_SET_GSI_ROUTING "
0582                 "error: rc: %i errno: %i", intid, ret, errno);
0583         else
0584             TEST_ASSERT(ret == 0, "KVM_SET_GSI_ROUTING "
0585                 "for intid %i failed, rc: %i errno: %i",
0586                 intid, ret, errno);
0587     }
0588 }
0589 
0590 static void kvm_irq_write_ispendr_check(int gic_fd, uint32_t intid,
0591                     struct kvm_vcpu *vcpu,
0592                     bool expect_failure)
0593 {
0594     /*
0595      * Ignore this when expecting failure as invalid intids will lead to
0596      * either trying to inject SGIs when we configured the test to be
0597      * level_sensitive (or the reverse), or inject large intids which
0598      * will lead to writing above the ISPENDR register space (and we
0599      * don't want to do that either).
0600      */
0601     if (!expect_failure)
0602         kvm_irq_write_ispendr(gic_fd, intid, vcpu);
0603 }
0604 
0605 static void kvm_routing_and_irqfd_check(struct kvm_vm *vm,
0606         uint32_t intid, uint32_t num, uint32_t kvm_max_routes,
0607         bool expect_failure)
0608 {
0609     int fd[MAX_SPI];
0610     uint64_t val;
0611     int ret, f;
0612     uint64_t i;
0613 
0614     /*
0615      * There is no way to try injecting an SGI or PPI as the interface
0616      * starts counting from the first SPI (above the private ones), so just
0617      * exit.
0618      */
0619     if (INTID_IS_SGI(intid) || INTID_IS_PPI(intid))
0620         return;
0621 
0622     kvm_set_gsi_routing_irqchip_check(vm, intid, num,
0623             kvm_max_routes, expect_failure);
0624 
0625     /*
0626      * If expect_failure, then just to inject anyway. These
0627      * will silently fail. And in any case, the guest will check
0628      * that no actual interrupt was injected for those cases.
0629      */
0630 
0631     for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) {
0632         fd[f] = eventfd(0, 0);
0633         TEST_ASSERT(fd[f] != -1, __KVM_SYSCALL_ERROR("eventfd()", fd[f]));
0634     }
0635 
0636     for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) {
0637         struct kvm_irqfd irqfd = {
0638             .fd  = fd[f],
0639             .gsi = i - MIN_SPI,
0640         };
0641         assert(i <= (uint64_t)UINT_MAX);
0642         vm_ioctl(vm, KVM_IRQFD, &irqfd);
0643     }
0644 
0645     for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) {
0646         val = 1;
0647         ret = write(fd[f], &val, sizeof(uint64_t));
0648         TEST_ASSERT(ret == sizeof(uint64_t),
0649                 __KVM_SYSCALL_ERROR("write()", ret));
0650     }
0651 
0652     for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++)
0653         close(fd[f]);
0654 }
0655 
0656 /* handles the valid case: intid=0xffffffff num=1 */
0657 #define for_each_intid(first, num, tmp, i)                  \
0658     for ((tmp) = (i) = (first);                     \
0659         (tmp) < (uint64_t)(first) + (uint64_t)(num);            \
0660         (tmp)++, (i)++)
0661 
0662 static void run_guest_cmd(struct kvm_vcpu *vcpu, int gic_fd,
0663               struct kvm_inject_args *inject_args,
0664               struct test_args *test_args)
0665 {
0666     kvm_inject_cmd cmd = inject_args->cmd;
0667     uint32_t intid = inject_args->first_intid;
0668     uint32_t num = inject_args->num;
0669     int level = inject_args->level;
0670     bool expect_failure = inject_args->expect_failure;
0671     struct kvm_vm *vm = vcpu->vm;
0672     uint64_t tmp;
0673     uint32_t i;
0674 
0675     /* handles the valid case: intid=0xffffffff num=1 */
0676     assert(intid < UINT_MAX - num || num == 1);
0677 
0678     switch (cmd) {
0679     case KVM_INJECT_EDGE_IRQ_LINE:
0680         for_each_intid(intid, num, tmp, i)
0681             kvm_irq_line_check(vm, i, 1, test_args,
0682                     expect_failure);
0683         for_each_intid(intid, num, tmp, i)
0684             kvm_irq_line_check(vm, i, 0, test_args,
0685                     expect_failure);
0686         break;
0687     case KVM_SET_IRQ_LINE:
0688         for_each_intid(intid, num, tmp, i)
0689             kvm_irq_line_check(vm, i, level, test_args,
0690                     expect_failure);
0691         break;
0692     case KVM_SET_IRQ_LINE_HIGH:
0693         for_each_intid(intid, num, tmp, i)
0694             kvm_irq_line_check(vm, i, 1, test_args,
0695                     expect_failure);
0696         break;
0697     case KVM_SET_LEVEL_INFO_HIGH:
0698         for_each_intid(intid, num, tmp, i)
0699             kvm_irq_set_level_info_check(gic_fd, i, 1,
0700                     expect_failure);
0701         break;
0702     case KVM_INJECT_IRQFD:
0703         kvm_routing_and_irqfd_check(vm, intid, num,
0704                     test_args->kvm_max_routes,
0705                     expect_failure);
0706         break;
0707     case KVM_WRITE_ISPENDR:
0708         for (i = intid; i < intid + num; i++)
0709             kvm_irq_write_ispendr_check(gic_fd, i, vcpu,
0710                             expect_failure);
0711         break;
0712     case KVM_WRITE_ISACTIVER:
0713         for (i = intid; i < intid + num; i++)
0714             kvm_irq_write_isactiver(gic_fd, i, vcpu);
0715         break;
0716     default:
0717         break;
0718     }
0719 }
0720 
0721 static void kvm_inject_get_call(struct kvm_vm *vm, struct ucall *uc,
0722         struct kvm_inject_args *args)
0723 {
0724     struct kvm_inject_args *kvm_args_hva;
0725     vm_vaddr_t kvm_args_gva;
0726 
0727     kvm_args_gva = uc->args[1];
0728     kvm_args_hva = (struct kvm_inject_args *)addr_gva2hva(vm, kvm_args_gva);
0729     memcpy(args, kvm_args_hva, sizeof(struct kvm_inject_args));
0730 }
0731 
0732 static void print_args(struct test_args *args)
0733 {
0734     printf("nr-irqs=%d level-sensitive=%d eoi-split=%d\n",
0735             args->nr_irqs, args->level_sensitive,
0736             args->eoi_split);
0737 }
0738 
0739 static void test_vgic(uint32_t nr_irqs, bool level_sensitive, bool eoi_split)
0740 {
0741     struct ucall uc;
0742     int gic_fd;
0743     struct kvm_vcpu *vcpu;
0744     struct kvm_vm *vm;
0745     struct kvm_inject_args inject_args;
0746     vm_vaddr_t args_gva;
0747 
0748     struct test_args args = {
0749         .nr_irqs = nr_irqs,
0750         .level_sensitive = level_sensitive,
0751         .eoi_split = eoi_split,
0752         .kvm_max_routes = kvm_check_cap(KVM_CAP_IRQ_ROUTING),
0753         .kvm_supports_irqfd = kvm_check_cap(KVM_CAP_IRQFD),
0754     };
0755 
0756     print_args(&args);
0757 
0758     vm = vm_create_with_one_vcpu(&vcpu, guest_code);
0759     ucall_init(vm, NULL);
0760 
0761     vm_init_descriptor_tables(vm);
0762     vcpu_init_descriptor_tables(vcpu);
0763 
0764     /* Setup the guest args page (so it gets the args). */
0765     args_gva = vm_vaddr_alloc_page(vm);
0766     memcpy(addr_gva2hva(vm, args_gva), &args, sizeof(args));
0767     vcpu_args_set(vcpu, 1, args_gva);
0768 
0769     gic_fd = vgic_v3_setup(vm, 1, nr_irqs,
0770             GICD_BASE_GPA, GICR_BASE_GPA);
0771     __TEST_REQUIRE(gic_fd >= 0, "Failed to create vgic-v3, skipping");
0772 
0773     vm_install_exception_handler(vm, VECTOR_IRQ_CURRENT,
0774         guest_irq_handlers[args.eoi_split][args.level_sensitive]);
0775 
0776     while (1) {
0777         vcpu_run(vcpu);
0778 
0779         switch (get_ucall(vcpu, &uc)) {
0780         case UCALL_SYNC:
0781             kvm_inject_get_call(vm, &uc, &inject_args);
0782             run_guest_cmd(vcpu, gic_fd, &inject_args, &args);
0783             break;
0784         case UCALL_ABORT:
0785             REPORT_GUEST_ASSERT_2(uc, "values: %#lx, %#lx");
0786             break;
0787         case UCALL_DONE:
0788             goto done;
0789         default:
0790             TEST_FAIL("Unknown ucall %lu", uc.cmd);
0791         }
0792     }
0793 
0794 done:
0795     close(gic_fd);
0796     kvm_vm_free(vm);
0797 }
0798 
0799 static void help(const char *name)
0800 {
0801     printf(
0802     "\n"
0803     "usage: %s [-n num_irqs] [-e eoi_split] [-l level_sensitive]\n", name);
0804     printf(" -n: specify number of IRQs to setup the vgic with. "
0805         "It has to be a multiple of 32 and between 64 and 1024.\n");
0806     printf(" -e: if 1 then EOI is split into a write to DIR on top "
0807         "of writing EOI.\n");
0808     printf(" -l: specify whether the IRQs are level-sensitive (1) or not (0).");
0809     puts("");
0810     exit(1);
0811 }
0812 
0813 int main(int argc, char **argv)
0814 {
0815     uint32_t nr_irqs = 64;
0816     bool default_args = true;
0817     bool level_sensitive = false;
0818     int opt;
0819     bool eoi_split = false;
0820 
0821     /* Tell stdout not to buffer its content */
0822     setbuf(stdout, NULL);
0823 
0824     while ((opt = getopt(argc, argv, "hn:e:l:")) != -1) {
0825         switch (opt) {
0826         case 'n':
0827             nr_irqs = atoi(optarg);
0828             if (nr_irqs > 1024 || nr_irqs % 32)
0829                 help(argv[0]);
0830             break;
0831         case 'e':
0832             eoi_split = (bool)atoi(optarg);
0833             default_args = false;
0834             break;
0835         case 'l':
0836             level_sensitive = (bool)atoi(optarg);
0837             default_args = false;
0838             break;
0839         case 'h':
0840         default:
0841             help(argv[0]);
0842             break;
0843         }
0844     }
0845 
0846     /*
0847      * If the user just specified nr_irqs and/or gic_version, then run all
0848      * combinations.
0849      */
0850     if (default_args) {
0851         test_vgic(nr_irqs, false /* level */, false /* eoi_split */);
0852         test_vgic(nr_irqs, false /* level */, true /* eoi_split */);
0853         test_vgic(nr_irqs, true /* level */, false /* eoi_split */);
0854         test_vgic(nr_irqs, true /* level */, true /* eoi_split */);
0855     } else {
0856         test_vgic(nr_irqs, level_sensitive, eoi_split);
0857     }
0858 
0859     return 0;
0860 }
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