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OSCL-LXR
 
 

     

0001 /* This file contains sub-register zero extension checks for insns defining
0002  * sub-registers, meaning:
0003  *   - All insns under BPF_ALU class. Their BPF_ALU32 variants or narrow width
0004  *     forms (BPF_END) could define sub-registers.
0005  *   - Narrow direct loads, BPF_B/H/W | BPF_LDX.
0006  *   - BPF_LD is not exposed to JIT back-ends, so no need for testing.
0007  *
0008  * "get_prandom_u32" is used to initialize low 32-bit of some registers to
0009  * prevent potential optimizations done by verifier or JIT back-ends which could
0010  * optimize register back into constant when range info shows one register is a
0011  * constant.
0012  */
0013 {
0014     "add32 reg zero extend check",
0015     .insns = {
0016     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0017     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0018     BPF_LD_IMM64(BPF_REG_0, 0x100000000ULL),
0019     BPF_ALU32_REG(BPF_ADD, BPF_REG_0, BPF_REG_1),
0020     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0021     BPF_EXIT_INSN(),
0022     },
0023     .result = ACCEPT,
0024     .retval = 0,
0025 },
0026 {
0027     "add32 imm zero extend check",
0028     .insns = {
0029     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0030     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0031     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0032     /* An insn could have no effect on the low 32-bit, for example:
0033      *   a = a + 0
0034      *   a = a | 0
0035      *   a = a & -1
0036      * But, they should still zero high 32-bit.
0037      */
0038     BPF_ALU32_IMM(BPF_ADD, BPF_REG_0, 0),
0039     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0040     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0041     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0042     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0043     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0044     BPF_ALU32_IMM(BPF_ADD, BPF_REG_0, -2),
0045     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0046     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0047     BPF_EXIT_INSN(),
0048     },
0049     .result = ACCEPT,
0050     .retval = 0,
0051 },
0052 {
0053     "sub32 reg zero extend check",
0054     .insns = {
0055     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0056     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0057     BPF_LD_IMM64(BPF_REG_0, 0x1ffffffffULL),
0058     BPF_ALU32_REG(BPF_SUB, BPF_REG_0, BPF_REG_1),
0059     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0060     BPF_EXIT_INSN(),
0061     },
0062     .result = ACCEPT,
0063     .retval = 0,
0064 },
0065 {
0066     "sub32 imm zero extend check",
0067     .insns = {
0068     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0069     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0070     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0071     BPF_ALU32_IMM(BPF_SUB, BPF_REG_0, 0),
0072     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0073     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0074     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0075     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0076     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0077     BPF_ALU32_IMM(BPF_SUB, BPF_REG_0, 1),
0078     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0079     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0080     BPF_EXIT_INSN(),
0081     },
0082     .result = ACCEPT,
0083     .retval = 0,
0084 },
0085 {
0086     "mul32 reg zero extend check",
0087     .insns = {
0088     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0089     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0090     BPF_LD_IMM64(BPF_REG_0, 0x100000001ULL),
0091     BPF_ALU32_REG(BPF_MUL, BPF_REG_0, BPF_REG_1),
0092     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0093     BPF_EXIT_INSN(),
0094     },
0095     .result = ACCEPT,
0096     .retval = 0,
0097 },
0098 {
0099     "mul32 imm zero extend check",
0100     .insns = {
0101     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0102     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0103     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0104     BPF_ALU32_IMM(BPF_MUL, BPF_REG_0, 1),
0105     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0106     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0107     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0108     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0109     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0110     BPF_ALU32_IMM(BPF_MUL, BPF_REG_0, -1),
0111     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0112     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0113     BPF_EXIT_INSN(),
0114     },
0115     .result = ACCEPT,
0116     .retval = 0,
0117 },
0118 {
0119     "div32 reg zero extend check",
0120     .insns = {
0121     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0122     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0123     BPF_MOV64_IMM(BPF_REG_0, -1),
0124     BPF_ALU32_REG(BPF_DIV, BPF_REG_0, BPF_REG_1),
0125     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0126     BPF_EXIT_INSN(),
0127     },
0128     .result = ACCEPT,
0129     .retval = 0,
0130 },
0131 {
0132     "div32 imm zero extend check",
0133     .insns = {
0134     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0135     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0136     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0137     BPF_ALU32_IMM(BPF_DIV, BPF_REG_0, 1),
0138     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0139     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0140     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0141     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0142     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0143     BPF_ALU32_IMM(BPF_DIV, BPF_REG_0, 2),
0144     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0145     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0146     BPF_EXIT_INSN(),
0147     },
0148     .result = ACCEPT,
0149     .retval = 0,
0150 },
0151 {
0152     "or32 reg zero extend check",
0153     .insns = {
0154     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0155     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0156     BPF_LD_IMM64(BPF_REG_0, 0x100000001ULL),
0157     BPF_ALU32_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0158     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0159     BPF_EXIT_INSN(),
0160     },
0161     .result = ACCEPT,
0162     .retval = 0,
0163 },
0164 {
0165     "or32 imm zero extend check",
0166     .insns = {
0167     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0168     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0169     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0170     BPF_ALU32_IMM(BPF_OR, BPF_REG_0, 0),
0171     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0172     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0173     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0174     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0175     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0176     BPF_ALU32_IMM(BPF_OR, BPF_REG_0, 1),
0177     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0178     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0179     BPF_EXIT_INSN(),
0180     },
0181     .result = ACCEPT,
0182     .retval = 0,
0183 },
0184 {
0185     "and32 reg zero extend check",
0186     .insns = {
0187     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0188     BPF_LD_IMM64(BPF_REG_1, 0x100000000ULL),
0189     BPF_ALU64_REG(BPF_OR, BPF_REG_1, BPF_REG_0),
0190     BPF_LD_IMM64(BPF_REG_0, 0x1ffffffffULL),
0191     BPF_ALU32_REG(BPF_AND, BPF_REG_0, BPF_REG_1),
0192     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0193     BPF_EXIT_INSN(),
0194     },
0195     .result = ACCEPT,
0196     .retval = 0,
0197 },
0198 {
0199     "and32 imm zero extend check",
0200     .insns = {
0201     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0202     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0203     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0204     BPF_ALU32_IMM(BPF_AND, BPF_REG_0, -1),
0205     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0206     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0207     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0208     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0209     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0210     BPF_ALU32_IMM(BPF_AND, BPF_REG_0, -2),
0211     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0212     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0213     BPF_EXIT_INSN(),
0214     },
0215     .result = ACCEPT,
0216     .retval = 0,
0217 },
0218 {
0219     "lsh32 reg zero extend check",
0220     .insns = {
0221     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0222     BPF_LD_IMM64(BPF_REG_1, 0x100000000ULL),
0223     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0224     BPF_MOV64_IMM(BPF_REG_1, 1),
0225     BPF_ALU32_REG(BPF_LSH, BPF_REG_0, BPF_REG_1),
0226     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0227     BPF_EXIT_INSN(),
0228     },
0229     .result = ACCEPT,
0230     .retval = 0,
0231 },
0232 {
0233     "lsh32 imm zero extend check",
0234     .insns = {
0235     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0236     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0237     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0238     BPF_ALU32_IMM(BPF_LSH, BPF_REG_0, 0),
0239     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0240     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0241     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0242     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0243     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0244     BPF_ALU32_IMM(BPF_LSH, BPF_REG_0, 1),
0245     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0246     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0247     BPF_EXIT_INSN(),
0248     },
0249     .result = ACCEPT,
0250     .retval = 0,
0251 },
0252 {
0253     "rsh32 reg zero extend check",
0254     .insns = {
0255     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0256     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0257     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0258     BPF_MOV64_IMM(BPF_REG_1, 1),
0259     BPF_ALU32_REG(BPF_RSH, BPF_REG_0, BPF_REG_1),
0260     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0261     BPF_EXIT_INSN(),
0262     },
0263     .result = ACCEPT,
0264     .retval = 0,
0265 },
0266 {
0267     "rsh32 imm zero extend check",
0268     .insns = {
0269     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0270     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0271     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0272     BPF_ALU32_IMM(BPF_RSH, BPF_REG_0, 0),
0273     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0274     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0275     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0276     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0277     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0278     BPF_ALU32_IMM(BPF_RSH, BPF_REG_0, 1),
0279     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0280     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0281     BPF_EXIT_INSN(),
0282     },
0283     .result = ACCEPT,
0284     .retval = 0,
0285 },
0286 {
0287     "neg32 reg zero extend check",
0288     .insns = {
0289     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0290     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0291     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0292     BPF_ALU32_IMM(BPF_NEG, BPF_REG_0, 0),
0293     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0294     BPF_EXIT_INSN(),
0295     },
0296     .result = ACCEPT,
0297     .retval = 0,
0298 },
0299 {
0300     "mod32 reg zero extend check",
0301     .insns = {
0302     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0303     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0304     BPF_MOV64_IMM(BPF_REG_0, -1),
0305     BPF_ALU32_REG(BPF_MOD, BPF_REG_0, BPF_REG_1),
0306     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0307     BPF_EXIT_INSN(),
0308     },
0309     .result = ACCEPT,
0310     .retval = 0,
0311 },
0312 {
0313     "mod32 imm zero extend check",
0314     .insns = {
0315     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0316     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0317     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0318     BPF_ALU32_IMM(BPF_MOD, BPF_REG_0, 1),
0319     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0320     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0321     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0322     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0323     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0324     BPF_ALU32_IMM(BPF_MOD, BPF_REG_0, 2),
0325     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0326     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0327     BPF_EXIT_INSN(),
0328     },
0329     .result = ACCEPT,
0330     .retval = 0,
0331 },
0332 {
0333     "xor32 reg zero extend check",
0334     .insns = {
0335     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0336     BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
0337     BPF_LD_IMM64(BPF_REG_0, 0x100000000ULL),
0338     BPF_ALU32_REG(BPF_XOR, BPF_REG_0, BPF_REG_1),
0339     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0340     BPF_EXIT_INSN(),
0341     },
0342     .result = ACCEPT,
0343     .retval = 0,
0344 },
0345 {
0346     "xor32 imm zero extend check",
0347     .insns = {
0348     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0349     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0350     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0351     BPF_ALU32_IMM(BPF_XOR, BPF_REG_0, 1),
0352     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0353     BPF_EXIT_INSN(),
0354     },
0355     .result = ACCEPT,
0356     .retval = 0,
0357 },
0358 {
0359     "mov32 reg zero extend check",
0360     .insns = {
0361     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0362     BPF_LD_IMM64(BPF_REG_1, 0x100000000ULL),
0363     BPF_ALU64_REG(BPF_OR, BPF_REG_1, BPF_REG_0),
0364     BPF_LD_IMM64(BPF_REG_0, 0x100000000ULL),
0365     BPF_MOV32_REG(BPF_REG_0, BPF_REG_1),
0366     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0367     BPF_EXIT_INSN(),
0368     },
0369     .result = ACCEPT,
0370     .retval = 0,
0371 },
0372 {
0373     "mov32 imm zero extend check",
0374     .insns = {
0375     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0376     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0377     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0378     BPF_MOV32_IMM(BPF_REG_0, 0),
0379     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0380     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0381     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0382     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0383     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0384     BPF_MOV32_IMM(BPF_REG_0, 1),
0385     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0386     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0387     BPF_EXIT_INSN(),
0388     },
0389     .result = ACCEPT,
0390     .retval = 0,
0391 },
0392 {
0393     "arsh32 reg zero extend check",
0394     .insns = {
0395     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0396     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0397     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0398     BPF_MOV64_IMM(BPF_REG_1, 1),
0399     BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
0400     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0401     BPF_EXIT_INSN(),
0402     },
0403     .result = ACCEPT,
0404     .retval = 0,
0405 },
0406 {
0407     "arsh32 imm zero extend check",
0408     .insns = {
0409     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0410     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0411     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0412     BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 0),
0413     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0414     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0415     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0416     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0417     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0418     BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 1),
0419     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0420     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0421     BPF_EXIT_INSN(),
0422     },
0423     .result = ACCEPT,
0424     .retval = 0,
0425 },
0426 {
0427     "end16 (to_le) reg zero extend check",
0428     .insns = {
0429     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0430     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0431     BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
0432     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0433     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0434     BPF_ENDIAN(BPF_TO_LE, BPF_REG_0, 16),
0435     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0436     BPF_EXIT_INSN(),
0437     },
0438     .result = ACCEPT,
0439     .retval = 0,
0440 },
0441 {
0442     "end32 (to_le) reg zero extend check",
0443     .insns = {
0444     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0445     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0446     BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
0447     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0448     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0449     BPF_ENDIAN(BPF_TO_LE, BPF_REG_0, 32),
0450     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0451     BPF_EXIT_INSN(),
0452     },
0453     .result = ACCEPT,
0454     .retval = 0,
0455 },
0456 {
0457     "end16 (to_be) reg zero extend check",
0458     .insns = {
0459     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0460     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0461     BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
0462     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0463     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0464     BPF_ENDIAN(BPF_TO_BE, BPF_REG_0, 16),
0465     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0466     BPF_EXIT_INSN(),
0467     },
0468     .result = ACCEPT,
0469     .retval = 0,
0470 },
0471 {
0472     "end32 (to_be) reg zero extend check",
0473     .insns = {
0474     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0475     BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
0476     BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
0477     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0478     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_6),
0479     BPF_ENDIAN(BPF_TO_BE, BPF_REG_0, 32),
0480     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0481     BPF_EXIT_INSN(),
0482     },
0483     .result = ACCEPT,
0484     .retval = 0,
0485 },
0486 {
0487     "ldx_b zero extend check",
0488     .insns = {
0489     BPF_MOV64_REG(BPF_REG_6, BPF_REG_10),
0490     BPF_ALU64_IMM(BPF_ADD, BPF_REG_6, -4),
0491     BPF_ST_MEM(BPF_W, BPF_REG_6, 0, 0xfaceb00c),
0492     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0493     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0494     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0495     BPF_LDX_MEM(BPF_B, BPF_REG_0, BPF_REG_6, 0),
0496     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0497     BPF_EXIT_INSN(),
0498     },
0499     .result = ACCEPT,
0500     .retval = 0,
0501 },
0502 {
0503     "ldx_h zero extend check",
0504     .insns = {
0505     BPF_MOV64_REG(BPF_REG_6, BPF_REG_10),
0506     BPF_ALU64_IMM(BPF_ADD, BPF_REG_6, -4),
0507     BPF_ST_MEM(BPF_W, BPF_REG_6, 0, 0xfaceb00c),
0508     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0509     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0510     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0511     BPF_LDX_MEM(BPF_H, BPF_REG_0, BPF_REG_6, 0),
0512     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0513     BPF_EXIT_INSN(),
0514     },
0515     .result = ACCEPT,
0516     .retval = 0,
0517 },
0518 {
0519     "ldx_w zero extend check",
0520     .insns = {
0521     BPF_MOV64_REG(BPF_REG_6, BPF_REG_10),
0522     BPF_ALU64_IMM(BPF_ADD, BPF_REG_6, -4),
0523     BPF_ST_MEM(BPF_W, BPF_REG_6, 0, 0xfaceb00c),
0524     BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
0525     BPF_LD_IMM64(BPF_REG_1, 0x1000000000ULL),
0526     BPF_ALU64_REG(BPF_OR, BPF_REG_0, BPF_REG_1),
0527     BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_6, 0),
0528     BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
0529     BPF_EXIT_INSN(),
0530     },
0531     .result = ACCEPT,
0532     .retval = 0,
0533 },
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