Back to home page

OSCL-LXR
 
 

     

0001 {
0002     "masking, test out of bounds 1",
0003     .insns = {
0004     BPF_MOV32_IMM(BPF_REG_1, 5),
0005     BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
0006     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0007     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0008     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0009     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0010     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0011     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0012     BPF_EXIT_INSN(),
0013     },
0014     .result = ACCEPT,
0015     .retval = 0,
0016 },
0017 {
0018     "masking, test out of bounds 2",
0019     .insns = {
0020     BPF_MOV32_IMM(BPF_REG_1, 1),
0021     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0022     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0023     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0024     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0025     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0026     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0027     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0028     BPF_EXIT_INSN(),
0029     },
0030     .result = ACCEPT,
0031     .retval = 0,
0032 },
0033 {
0034     "masking, test out of bounds 3",
0035     .insns = {
0036     BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
0037     BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
0038     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0039     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0040     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0041     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0042     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0043     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0044     BPF_EXIT_INSN(),
0045     },
0046     .result = ACCEPT,
0047     .retval = 0,
0048 },
0049 {
0050     "masking, test out of bounds 4",
0051     .insns = {
0052     BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
0053     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0054     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0055     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0056     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0057     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0058     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0059     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0060     BPF_EXIT_INSN(),
0061     },
0062     .result = ACCEPT,
0063     .retval = 0,
0064 },
0065 {
0066     "masking, test out of bounds 5",
0067     .insns = {
0068     BPF_MOV32_IMM(BPF_REG_1, -1),
0069     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0070     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0071     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0072     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0073     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0074     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0075     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0076     BPF_EXIT_INSN(),
0077     },
0078     .result = ACCEPT,
0079     .retval = 0,
0080 },
0081 {
0082     "masking, test out of bounds 6",
0083     .insns = {
0084     BPF_MOV32_IMM(BPF_REG_1, -1),
0085     BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
0086     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0087     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0088     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0089     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0090     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0091     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0092     BPF_EXIT_INSN(),
0093     },
0094     .result = ACCEPT,
0095     .retval = 0,
0096 },
0097 {
0098     "masking, test out of bounds 7",
0099     .insns = {
0100     BPF_MOV64_IMM(BPF_REG_1, 5),
0101     BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
0102     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0103     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0104     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0105     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0106     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0107     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0108     BPF_EXIT_INSN(),
0109     },
0110     .result = ACCEPT,
0111     .retval = 0,
0112 },
0113 {
0114     "masking, test out of bounds 8",
0115     .insns = {
0116     BPF_MOV64_IMM(BPF_REG_1, 1),
0117     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0118     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0119     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0120     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0121     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0122     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0123     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0124     BPF_EXIT_INSN(),
0125     },
0126     .result = ACCEPT,
0127     .retval = 0,
0128 },
0129 {
0130     "masking, test out of bounds 9",
0131     .insns = {
0132     BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
0133     BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
0134     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0135     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0136     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0137     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0138     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0139     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0140     BPF_EXIT_INSN(),
0141     },
0142     .result = ACCEPT,
0143     .retval = 0,
0144 },
0145 {
0146     "masking, test out of bounds 10",
0147     .insns = {
0148     BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
0149     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0150     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0151     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0152     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0153     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0154     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0155     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0156     BPF_EXIT_INSN(),
0157     },
0158     .result = ACCEPT,
0159     .retval = 0,
0160 },
0161 {
0162     "masking, test out of bounds 11",
0163     .insns = {
0164     BPF_MOV64_IMM(BPF_REG_1, -1),
0165     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0166     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0167     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0168     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0169     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0170     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0171     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0172     BPF_EXIT_INSN(),
0173     },
0174     .result = ACCEPT,
0175     .retval = 0,
0176 },
0177 {
0178     "masking, test out of bounds 12",
0179     .insns = {
0180     BPF_MOV64_IMM(BPF_REG_1, -1),
0181     BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
0182     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0183     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0184     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0185     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0186     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0187     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0188     BPF_EXIT_INSN(),
0189     },
0190     .result = ACCEPT,
0191     .retval = 0,
0192 },
0193 {
0194     "masking, test in bounds 1",
0195     .insns = {
0196     BPF_MOV32_IMM(BPF_REG_1, 4),
0197     BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
0198     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0199     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0200     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0201     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0202     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0203     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0204     BPF_EXIT_INSN(),
0205     },
0206     .result = ACCEPT,
0207     .retval = 4,
0208 },
0209 {
0210     "masking, test in bounds 2",
0211     .insns = {
0212     BPF_MOV32_IMM(BPF_REG_1, 0),
0213     BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
0214     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0215     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0216     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0217     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0218     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0219     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0220     BPF_EXIT_INSN(),
0221     },
0222     .result = ACCEPT,
0223     .retval = 0,
0224 },
0225 {
0226     "masking, test in bounds 3",
0227     .insns = {
0228     BPF_MOV32_IMM(BPF_REG_1, 0xfffffffe),
0229     BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
0230     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0231     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0232     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0233     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0234     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0235     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0236     BPF_EXIT_INSN(),
0237     },
0238     .result = ACCEPT,
0239     .retval = 0xfffffffe,
0240 },
0241 {
0242     "masking, test in bounds 4",
0243     .insns = {
0244     BPF_MOV32_IMM(BPF_REG_1, 0xabcde),
0245     BPF_MOV32_IMM(BPF_REG_2, 0xabcdef - 1),
0246     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0247     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0248     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0249     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0250     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0251     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0252     BPF_EXIT_INSN(),
0253     },
0254     .result = ACCEPT,
0255     .retval = 0xabcde,
0256 },
0257 {
0258     "masking, test in bounds 5",
0259     .insns = {
0260     BPF_MOV32_IMM(BPF_REG_1, 0),
0261     BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
0262     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0263     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0264     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0265     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0266     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0267     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0268     BPF_EXIT_INSN(),
0269     },
0270     .result = ACCEPT,
0271     .retval = 0,
0272 },
0273 {
0274     "masking, test in bounds 6",
0275     .insns = {
0276     BPF_MOV32_IMM(BPF_REG_1, 46),
0277     BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
0278     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
0279     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
0280     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0281     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0282     BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
0283     BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
0284     BPF_EXIT_INSN(),
0285     },
0286     .result = ACCEPT,
0287     .retval = 46,
0288 },
0289 {
0290     "masking, test in bounds 7",
0291     .insns = {
0292     BPF_MOV64_IMM(BPF_REG_3, -46),
0293     BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
0294     BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
0295     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
0296     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
0297     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0298     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0299     BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
0300     BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
0301     BPF_EXIT_INSN(),
0302     },
0303     .result = ACCEPT,
0304     .retval = 46,
0305 },
0306 {
0307     "masking, test in bounds 8",
0308     .insns = {
0309     BPF_MOV64_IMM(BPF_REG_3, -47),
0310     BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
0311     BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
0312     BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
0313     BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
0314     BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
0315     BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
0316     BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
0317     BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
0318     BPF_EXIT_INSN(),
0319     },
0320     .result = ACCEPT,
0321     .retval = 0,
0322 },
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!