OSCL-LXR

Upper bits are unknown but AND above masks out 1 zero'ing lower bits

val = 0x110;

a = 0;

val = 3;

Write 3 to stack

val = 0x110;

val = 3;

val = 0x110;

If this gets ever changed, make sure JITs can deal with it.

1: int

load 2nd argument value (int pointer)

1-byte read from family field

Just make sure that JITs used udiv/umod as otherwise we get an exception from INT_MIN/-1 overflow similarly as with div by zero.

bpf_strtoul arg1 (buf)

reg, high bits shouldn't be tested

reg, bit 63 or bit 0 set, taken

Common tests

main prog

map_value_ptr -= map_value_ptr

Call to skb_load_bytes() omitted.

r6 is our tp buffer

leak reference

reserve 8 byte ringbuf memory

Get an unknown value

spill R1(ctx) into stack

This file contains sub-register zero extension checks for insns defining sub-registers, meaning: All insns under BPF_ALU class.

Get an unknown value

user_ip6[0] is u64 aligned