nvdimm/test/nfit_test.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
0004  */
0005 #ifndef __NFIT_TEST_H__
0006 #define __NFIT_TEST_H__
0007 #include <linux/acpi.h>
0008 #include <linux/list.h>
0009 #include <linux/uuid.h>
0010 #include <linux/ioport.h>
0011 #include <linux/spinlock_types.h>
0012
0013 struct nfit_test_request {
0014     struct list_head list;
0015     struct resource res;
0016 };
0017
0018 struct nfit_test_resource {
0019     struct list_head requests;
0020     struct list_head list;
0021     struct resource res;
0022     struct device *dev;
0023     spinlock_t lock;
0024     int req_count;
0025     void *buf;
0026 };
0027
0028 #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA  2
0029 #define NFIT_ARS_INJECT_INVALID 2
0030
0031 enum err_inj_options {
0032     ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
0033 };
0034
0035 /* nfit commands */
0036 enum nfit_cmd_num {
0037     NFIT_CMD_TRANSLATE_SPA = 5,
0038     NFIT_CMD_ARS_INJECT_SET = 7,
0039     NFIT_CMD_ARS_INJECT_CLEAR = 8,
0040     NFIT_CMD_ARS_INJECT_GET = 9,
0041 };
0042
0043 struct nd_cmd_translate_spa {
0044     __u64 spa;
0045     __u32 status;
0046     __u8  flags;
0047     __u8  _reserved[3];
0048     __u64 translate_length;
0049     __u32 num_nvdimms;
0050     struct nd_nvdimm_device {
0051         __u32 nfit_device_handle;
0052         __u32 _reserved;
0053         __u64 dpa;
0054     } __packed devices[];
0055
0056 } __packed;
0057
0058 struct nd_cmd_ars_err_inj {
0059     __u64 err_inj_spa_range_base;
0060     __u64 err_inj_spa_range_length;
0061     __u8  err_inj_options;
0062     __u32 status;
0063 } __packed;
0064
0065 struct nd_cmd_ars_err_inj_clr {
0066     __u64 err_inj_clr_spa_range_base;
0067     __u64 err_inj_clr_spa_range_length;
0068     __u32 status;
0069 } __packed;
0070
0071 struct nd_cmd_ars_err_inj_stat {
0072     __u32 status;
0073     __u32 inj_err_rec_count;
0074     struct nd_error_stat_query_record {
0075         __u64 err_inj_stat_spa_range_base;
0076         __u64 err_inj_stat_spa_range_length;
0077     } __packed record[];
0078 } __packed;
0079
0080 #define ND_INTEL_SMART           1
0081 #define ND_INTEL_SMART_THRESHOLD     2
0082 #define ND_INTEL_ENABLE_LSS_STATUS  10
0083 #define ND_INTEL_FW_GET_INFO        12
0084 #define ND_INTEL_FW_START_UPDATE    13
0085 #define ND_INTEL_FW_SEND_DATA       14
0086 #define ND_INTEL_FW_FINISH_UPDATE   15
0087 #define ND_INTEL_FW_FINISH_QUERY    16
0088 #define ND_INTEL_SMART_SET_THRESHOLD    17
0089 #define ND_INTEL_SMART_INJECT       18
0090
0091 #define ND_INTEL_SMART_HEALTH_VALID             (1 << 0)
0092 #define ND_INTEL_SMART_SPARES_VALID             (1 << 1)
0093 #define ND_INTEL_SMART_USED_VALID               (1 << 2)
0094 #define ND_INTEL_SMART_MTEMP_VALID              (1 << 3)
0095 #define ND_INTEL_SMART_CTEMP_VALID              (1 << 4)
0096 #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)
0097 #define ND_INTEL_SMART_AIT_STATUS_VALID         (1 << 6)
0098 #define ND_INTEL_SMART_PTEMP_VALID              (1 << 7)
0099 #define ND_INTEL_SMART_ALARM_VALID              (1 << 9)
0100 #define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)
0101 #define ND_INTEL_SMART_VENDOR_VALID             (1 << 11)
0102 #define ND_INTEL_SMART_SPARE_TRIP               (1 << 0)
0103 #define ND_INTEL_SMART_TEMP_TRIP                (1 << 1)
0104 #define ND_INTEL_SMART_CTEMP_TRIP               (1 << 2)
0105 #define ND_INTEL_SMART_NON_CRITICAL_HEALTH      (1 << 0)
0106 #define ND_INTEL_SMART_CRITICAL_HEALTH          (1 << 1)
0107 #define ND_INTEL_SMART_FATAL_HEALTH             (1 << 2)
0108 #define ND_INTEL_SMART_INJECT_MTEMP     (1 << 0)
0109 #define ND_INTEL_SMART_INJECT_SPARE     (1 << 1)
0110 #define ND_INTEL_SMART_INJECT_FATAL     (1 << 2)
0111 #define ND_INTEL_SMART_INJECT_SHUTDOWN      (1 << 3)
0112
0113 struct nd_intel_smart_threshold {
0114     __u32 status;
0115     union {
0116         struct {
0117             __u16 alarm_control;
0118             __u8 spares;
0119             __u16 media_temperature;
0120             __u16 ctrl_temperature;
0121             __u8 reserved[1];
0122         } __packed;
0123         __u8 data[8];
0124     };
0125 } __packed;
0126
0127 struct nd_intel_smart_set_threshold {
0128     __u16 alarm_control;
0129     __u8 spares;
0130     __u16 media_temperature;
0131     __u16 ctrl_temperature;
0132     __u32 status;
0133 } __packed;
0134
0135 struct nd_intel_smart_inject {
0136     __u64 flags;
0137     __u8 mtemp_enable;
0138     __u16 media_temperature;
0139     __u8 spare_enable;
0140     __u8 spares;
0141     __u8 fatal_enable;
0142     __u8 unsafe_shutdown_enable;
0143     __u32 status;
0144 } __packed;
0145
0146 #define INTEL_FW_STORAGE_SIZE       0x100000
0147 #define INTEL_FW_MAX_SEND_LEN       0xFFEC
0148 #define INTEL_FW_QUERY_INTERVAL     250000
0149 #define INTEL_FW_QUERY_MAX_TIME     3000000
0150 #define INTEL_FW_FIS_VERSION        0x0105
0151 #define INTEL_FW_FAKE_VERSION       0xffffffffabcd
0152
0153 enum intel_fw_update_state {
0154     FW_STATE_NEW = 0,
0155     FW_STATE_IN_PROGRESS,
0156     FW_STATE_VERIFY,
0157     FW_STATE_UPDATED,
0158 };
0159
0160 struct nd_intel_fw_info {
0161     __u32 status;
0162     __u32 storage_size;
0163     __u32 max_send_len;
0164     __u32 query_interval;
0165     __u32 max_query_time;
0166     __u8 update_cap;
0167     __u8 reserved[3];
0168     __u32 fis_version;
0169     __u64 run_version;
0170     __u64 updated_version;
0171 } __packed;
0172
0173 struct nd_intel_fw_start {
0174     __u32 status;
0175     __u32 context;
0176 } __packed;
0177
0178 /* this one has the output first because the variable input data size */
0179 struct nd_intel_fw_send_data {
0180     __u32 context;
0181     __u32 offset;
0182     __u32 length;
0183     __u8 data[];
0184 /* this field is not declared due ot variable data from input */
0185 /*  __u32 status; */
0186 } __packed;
0187
0188 struct nd_intel_fw_finish_update {
0189     __u8 ctrl_flags;
0190     __u8 reserved[3];
0191     __u32 context;
0192     __u32 status;
0193 } __packed;
0194
0195 struct nd_intel_fw_finish_query {
0196     __u32 context;
0197     __u32 status;
0198     __u64 updated_fw_rev;
0199 } __packed;
0200
0201 struct nd_intel_lss {
0202     __u8 enable;
0203     __u32 status;
0204 } __packed;
0205
0206 typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
0207 typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
0208          const guid_t *guid, u64 rev, u64 func,
0209          union acpi_object *argv4);
0210 void __wrap_iounmap(volatile void __iomem *addr);
0211 void nfit_test_setup(nfit_test_lookup_fn lookup,
0212         nfit_test_evaluate_dsm_fn evaluate);
0213 void nfit_test_teardown(void);
0214 struct nfit_test_resource *get_nfit_res(resource_size_t resource);
0215 #endif