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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 #ifndef NDTEST_H
0003 #define NDTEST_H
0004 
0005 #include <linux/platform_device.h>
0006 #include <linux/libnvdimm.h>
0007 
0008 /* SCM device is unable to persist memory contents */
0009 #define PAPR_PMEM_UNARMED                   (1ULL << (63 - 0))
0010 /* SCM device failed to persist memory contents */
0011 #define PAPR_PMEM_SHUTDOWN_DIRTY            (1ULL << (63 - 1))
0012 /* SCM device contents are not persisted from previous IPL */
0013 #define PAPR_PMEM_EMPTY                     (1ULL << (63 - 3))
0014 #define PAPR_PMEM_HEALTH_CRITICAL           (1ULL << (63 - 4))
0015 /* SCM device will be garded off next IPL due to failure */
0016 #define PAPR_PMEM_HEALTH_FATAL              (1ULL << (63 - 5))
0017 /* SCM contents cannot persist due to current platform health status */
0018 #define PAPR_PMEM_HEALTH_UNHEALTHY          (1ULL << (63 - 6))
0019 
0020 /* Bits status indicators for health bitmap indicating unarmed dimm */
0021 #define PAPR_PMEM_UNARMED_MASK (PAPR_PMEM_UNARMED |     \
0022                 PAPR_PMEM_HEALTH_UNHEALTHY)
0023 
0024 #define PAPR_PMEM_SAVE_FAILED                (1ULL << (63 - 10))
0025 
0026 /* Bits status indicators for health bitmap indicating unflushed dimm */
0027 #define PAPR_PMEM_BAD_SHUTDOWN_MASK (PAPR_PMEM_SHUTDOWN_DIRTY)
0028 
0029 /* Bits status indicators for health bitmap indicating unrestored dimm */
0030 #define PAPR_PMEM_BAD_RESTORE_MASK  (PAPR_PMEM_EMPTY)
0031 
0032 /* Bit status indicators for smart event notification */
0033 #define PAPR_PMEM_SMART_EVENT_MASK (PAPR_PMEM_HEALTH_CRITICAL | \
0034                     PAPR_PMEM_HEALTH_FATAL |    \
0035                     PAPR_PMEM_HEALTH_UNHEALTHY)
0036 
0037 #define PAPR_PMEM_SAVE_MASK                (PAPR_PMEM_SAVE_FAILED)
0038 
0039 struct ndtest_config;
0040 
0041 struct ndtest_priv {
0042     struct platform_device pdev;
0043     struct device_node *dn;
0044     struct list_head resources;
0045     struct nvdimm_bus_descriptor bus_desc;
0046     struct nvdimm_bus *bus;
0047     struct ndtest_config *config;
0048 
0049     dma_addr_t *dcr_dma;
0050     dma_addr_t *label_dma;
0051     dma_addr_t *dimm_dma;
0052 };
0053 
0054 struct ndtest_blk_mmio {
0055     void __iomem *base;
0056     u64 size;
0057     u64 base_offset;
0058     u32 line_size;
0059     u32 num_lines;
0060     u32 table_size;
0061 };
0062 
0063 struct ndtest_dimm {
0064     struct device *dev;
0065     struct nvdimm *nvdimm;
0066     struct ndtest_blk_mmio *mmio;
0067     struct nd_region *blk_region;
0068 
0069     dma_addr_t address;
0070     unsigned long long flags;
0071     unsigned long config_size;
0072     void *label_area;
0073     char *uuid_str;
0074 
0075     unsigned int size;
0076     unsigned int handle;
0077     unsigned int fail_cmd;
0078     unsigned int physical_id;
0079     unsigned int num_formats;
0080     int id;
0081     int fail_cmd_code;
0082     u8 no_alias;
0083 };
0084 
0085 struct ndtest_mapping {
0086     u64 start;
0087     u64 size;
0088     u8 position;
0089     u8 dimm;
0090 };
0091 
0092 struct ndtest_region {
0093     struct nd_region *region;
0094     struct ndtest_mapping *mapping;
0095     u64 size;
0096     u8 type;
0097     u8 num_mappings;
0098     u8 range_index;
0099 };
0100 
0101 struct ndtest_config {
0102     struct ndtest_dimm *dimms;
0103     struct ndtest_region *regions;
0104     unsigned int dimm_count;
0105     unsigned int dimm_start;
0106     u8 num_regions;
0107 };
0108 
0109 #endif /* NDTEST_H */