util/intel-pt-decoder/intel-pt-decoder.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * intel_pt_decoder.h: Intel Processor Trace support
0004  * Copyright (c) 2013-2014, Intel Corporation.
0005  */
0006
0007 #ifndef INCLUDE__INTEL_PT_DECODER_H__
0008 #define INCLUDE__INTEL_PT_DECODER_H__
0009
0010 #include <stdint.h>
0011 #include <stddef.h>
0012 #include <stdbool.h>
0013
0014 #include <linux/rbtree.h>
0015
0016 #include "intel-pt-insn-decoder.h"
0017
0018 #define INTEL_PT_IN_TX      (1 << 0)
0019 #define INTEL_PT_ABORT_TX   (1 << 1)
0020 #define INTEL_PT_IFLAG      (1 << 2)
0021 #define INTEL_PT_ASYNC      (1 << 2)
0022 #define INTEL_PT_FUP_IP     (1 << 3)
0023 #define INTEL_PT_SAMPLE_IPC (1 << 4)
0024
0025 enum intel_pt_sample_type {
0026     INTEL_PT_BRANCH     = 1 << 0,
0027     INTEL_PT_INSTRUCTION    = 1 << 1,
0028     INTEL_PT_TRANSACTION    = 1 << 2,
0029     INTEL_PT_PTW        = 1 << 3,
0030     INTEL_PT_MWAIT_OP   = 1 << 4,
0031     INTEL_PT_PWR_ENTRY  = 1 << 5,
0032     INTEL_PT_EX_STOP    = 1 << 6,
0033     INTEL_PT_PWR_EXIT   = 1 << 7,
0034     INTEL_PT_CBR_CHG    = 1 << 8,
0035     INTEL_PT_TRACE_BEGIN    = 1 << 9,
0036     INTEL_PT_TRACE_END  = 1 << 10,
0037     INTEL_PT_BLK_ITEMS  = 1 << 11,
0038     INTEL_PT_PSB_EVT    = 1 << 12,
0039     INTEL_PT_EVT        = 1 << 13,
0040     INTEL_PT_IFLAG_CHG  = 1 << 14,
0041 };
0042
0043 enum intel_pt_period_type {
0044     INTEL_PT_PERIOD_NONE,
0045     INTEL_PT_PERIOD_INSTRUCTIONS,
0046     INTEL_PT_PERIOD_TICKS,
0047     INTEL_PT_PERIOD_MTC,
0048 };
0049
0050 enum {
0051     INTEL_PT_ERR_NOMEM = 1,
0052     INTEL_PT_ERR_INTERN,
0053     INTEL_PT_ERR_BADPKT,
0054     INTEL_PT_ERR_NODATA,
0055     INTEL_PT_ERR_NOINSN,
0056     INTEL_PT_ERR_MISMAT,
0057     INTEL_PT_ERR_OVR,
0058     INTEL_PT_ERR_LOST,
0059     INTEL_PT_ERR_UNK,
0060     INTEL_PT_ERR_NELOOP,
0061     INTEL_PT_ERR_EPTW,
0062     INTEL_PT_ERR_MAX,
0063 };
0064
0065 enum intel_pt_param_flags {
0066     /*
0067      * FUP packet can contain next linear instruction pointer instead of
0068      * current linear instruction pointer.
0069      */
0070     INTEL_PT_FUP_WITH_NLIP  = 1 << 0,
0071 };
0072
0073 enum intel_pt_blk_type {
0074     INTEL_PT_GP_REGS    = 1,
0075     INTEL_PT_PEBS_BASIC = 4,
0076     INTEL_PT_PEBS_MEM   = 5,
0077     INTEL_PT_LBR_0      = 8,
0078     INTEL_PT_LBR_1      = 9,
0079     INTEL_PT_LBR_2      = 10,
0080     INTEL_PT_XMM        = 16,
0081     INTEL_PT_BLK_TYPE_MAX
0082 };
0083
0084 /*
0085  * The block type numbers are not sequential but here they are given sequential
0086  * positions to avoid wasting space for array placement.
0087  */
0088 enum intel_pt_blk_type_pos {
0089     INTEL_PT_GP_REGS_POS,
0090     INTEL_PT_PEBS_BASIC_POS,
0091     INTEL_PT_PEBS_MEM_POS,
0092     INTEL_PT_LBR_0_POS,
0093     INTEL_PT_LBR_1_POS,
0094     INTEL_PT_LBR_2_POS,
0095     INTEL_PT_XMM_POS,
0096     INTEL_PT_BLK_TYPE_CNT
0097 };
0098
0099 /* Get the array position for a block type */
0100 static inline int intel_pt_blk_type_pos(enum intel_pt_blk_type blk_type)
0101 {
0102 #define BLK_TYPE(bt) [INTEL_PT_##bt] = INTEL_PT_##bt##_POS + 1
0103     const int map[INTEL_PT_BLK_TYPE_MAX] = {
0104         BLK_TYPE(GP_REGS),
0105         BLK_TYPE(PEBS_BASIC),
0106         BLK_TYPE(PEBS_MEM),
0107         BLK_TYPE(LBR_0),
0108         BLK_TYPE(LBR_1),
0109         BLK_TYPE(LBR_2),
0110         BLK_TYPE(XMM),
0111     };
0112 #undef BLK_TYPE
0113
0114     return blk_type < INTEL_PT_BLK_TYPE_MAX ? map[blk_type] - 1 : -1;
0115 }
0116
0117 #define INTEL_PT_BLK_ITEM_ID_CNT    32
0118
0119 /*
0120  * Use unions so that the block items can be accessed by name or by array index.
0121  * There is an array of 32-bit masks for each block type, which indicate which
0122  * values are present. Then arrays of 32 64-bit values for each block type.
0123  */
0124 struct intel_pt_blk_items {
0125     union {
0126         uint32_t mask[INTEL_PT_BLK_TYPE_CNT];
0127         struct {
0128             uint32_t has_rflags:1;
0129             uint32_t has_rip:1;
0130             uint32_t has_rax:1;
0131             uint32_t has_rcx:1;
0132             uint32_t has_rdx:1;
0133             uint32_t has_rbx:1;
0134             uint32_t has_rsp:1;
0135             uint32_t has_rbp:1;
0136             uint32_t has_rsi:1;
0137             uint32_t has_rdi:1;
0138             uint32_t has_r8:1;
0139             uint32_t has_r9:1;
0140             uint32_t has_r10:1;
0141             uint32_t has_r11:1;
0142             uint32_t has_r12:1;
0143             uint32_t has_r13:1;
0144             uint32_t has_r14:1;
0145             uint32_t has_r15:1;
0146             uint32_t has_unused_0:14;
0147             uint32_t has_ip:1;
0148             uint32_t has_applicable_counters:1;
0149             uint32_t has_timestamp:1;
0150             uint32_t has_unused_1:29;
0151             uint32_t has_mem_access_address:1;
0152             uint32_t has_mem_aux_info:1;
0153             uint32_t has_mem_access_latency:1;
0154             uint32_t has_tsx_aux_info:1;
0155             uint32_t has_unused_2:28;
0156             uint32_t has_lbr_0;
0157             uint32_t has_lbr_1;
0158             uint32_t has_lbr_2;
0159             uint32_t has_xmm;
0160         };
0161     };
0162     union {
0163         uint64_t val[INTEL_PT_BLK_TYPE_CNT][INTEL_PT_BLK_ITEM_ID_CNT];
0164         struct {
0165             struct {
0166                 uint64_t rflags;
0167                 uint64_t rip;
0168                 uint64_t rax;
0169                 uint64_t rcx;
0170                 uint64_t rdx;
0171                 uint64_t rbx;
0172                 uint64_t rsp;
0173                 uint64_t rbp;
0174                 uint64_t rsi;
0175                 uint64_t rdi;
0176                 uint64_t r8;
0177                 uint64_t r9;
0178                 uint64_t r10;
0179                 uint64_t r11;
0180                 uint64_t r12;
0181                 uint64_t r13;
0182                 uint64_t r14;
0183                 uint64_t r15;
0184                 uint64_t unused_0[INTEL_PT_BLK_ITEM_ID_CNT - 18];
0185             };
0186             struct {
0187                 uint64_t ip;
0188                 uint64_t applicable_counters;
0189                 uint64_t timestamp;
0190                 uint64_t unused_1[INTEL_PT_BLK_ITEM_ID_CNT - 3];
0191             };
0192             struct {
0193                 uint64_t mem_access_address;
0194                 uint64_t mem_aux_info;
0195                 uint64_t mem_access_latency;
0196                 uint64_t tsx_aux_info;
0197                 uint64_t unused_2[INTEL_PT_BLK_ITEM_ID_CNT - 4];
0198             };
0199             uint64_t lbr_0[INTEL_PT_BLK_ITEM_ID_CNT];
0200             uint64_t lbr_1[INTEL_PT_BLK_ITEM_ID_CNT];
0201             uint64_t lbr_2[INTEL_PT_BLK_ITEM_ID_CNT];
0202             uint64_t xmm[INTEL_PT_BLK_ITEM_ID_CNT];
0203         };
0204     };
0205     bool is_32_bit;
0206 };
0207
0208 struct intel_pt_vmcs_info {
0209     struct rb_node rb_node;
0210     uint64_t vmcs;
0211     uint64_t tsc_offset;
0212     bool reliable;
0213     bool error_printed;
0214 };
0215
0216 /*
0217  * Maximum number of event trace data in one go, assuming at most 1 per type
0218  * and 6-bits of type in the EVD packet.
0219  */
0220 #define INTEL_PT_MAX_EVDS 64
0221
0222 /* Event trace data from EVD packet */
0223 struct intel_pt_evd {
0224     int type;
0225     uint64_t payload;
0226 };
0227
0228 struct intel_pt_state {
0229     enum intel_pt_sample_type type;
0230     bool from_nr;
0231     bool to_nr;
0232     bool from_iflag;
0233     bool to_iflag;
0234     int err;
0235     uint64_t from_ip;
0236     uint64_t to_ip;
0237     uint64_t tot_insn_cnt;
0238     uint64_t tot_cyc_cnt;
0239     uint64_t cycles;
0240     uint64_t timestamp;
0241     uint64_t est_timestamp;
0242     uint64_t trace_nr;
0243     uint64_t ptw_payload;
0244     uint64_t mwait_payload;
0245     uint64_t pwre_payload;
0246     uint64_t pwrx_payload;
0247     uint64_t cbr_payload;
0248     uint64_t psb_offset;
0249     uint32_t cbr;
0250     uint32_t flags;
0251     enum intel_pt_insn_op insn_op;
0252     int insn_len;
0253     char insn[INTEL_PT_INSN_BUF_SZ];
0254     struct intel_pt_blk_items items;
0255     int cfe_type;
0256     int cfe_vector;
0257     int evd_cnt;
0258     struct intel_pt_evd *evd;
0259 };
0260
0261 struct intel_pt_insn;
0262
0263 struct intel_pt_buffer {
0264     const unsigned char *buf;
0265     size_t len;
0266     bool consecutive;
0267     uint64_t ref_timestamp;
0268     uint64_t trace_nr;
0269 };
0270
0271 typedef int (*intel_pt_lookahead_cb_t)(struct intel_pt_buffer *, void *);
0272
0273 struct intel_pt_params {
0274     int (*get_trace)(struct intel_pt_buffer *buffer, void *data);
0275     int (*walk_insn)(struct intel_pt_insn *intel_pt_insn,
0276              uint64_t *insn_cnt_ptr, uint64_t *ip, uint64_t to_ip,
0277              uint64_t max_insn_cnt, void *data);
0278     bool (*pgd_ip)(uint64_t ip, void *data);
0279     int (*lookahead)(void *data, intel_pt_lookahead_cb_t cb, void *cb_data);
0280     struct intel_pt_vmcs_info *(*findnew_vmcs_info)(void *data, uint64_t vmcs);
0281     void *data;
0282     bool return_compression;
0283     bool branch_enable;
0284     bool vm_time_correlation;
0285     bool vm_tm_corr_dry_run;
0286     uint64_t first_timestamp;
0287     uint64_t ctl;
0288     uint64_t period;
0289     enum intel_pt_period_type period_type;
0290     unsigned max_non_turbo_ratio;
0291     unsigned int mtc_period;
0292     uint32_t tsc_ctc_ratio_n;
0293     uint32_t tsc_ctc_ratio_d;
0294     enum intel_pt_param_flags flags;
0295     unsigned int quick;
0296     int max_loops;
0297 };
0298
0299 struct intel_pt_decoder;
0300
0301 struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params);
0302 void intel_pt_decoder_free(struct intel_pt_decoder *decoder);
0303
0304 const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder);
0305
0306 int intel_pt_fast_forward(struct intel_pt_decoder *decoder, uint64_t timestamp);
0307
0308 unsigned char *intel_pt_find_overlap(unsigned char *buf_a, size_t len_a,
0309                      unsigned char *buf_b, size_t len_b,
0310                      bool have_tsc, bool *consecutive,
0311                      bool ooo_tsc);
0312
0313 int intel_pt__strerror(int code, char *buf, size_t buflen);
0314
0315 void intel_pt_set_first_timestamp(struct intel_pt_decoder *decoder,
0316                   uint64_t first_timestamp);
0317
0318 #endif