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OSCL-LXR

 
 

    


0001 [
0002     {
0003         "BriefDescription": "Clockticks of the power control unit (PCU)",
0004         "Counter": "0,1,2,3",
0005         "CounterType": "PGMABLE",
0006         "EventName": "UNC_P_CLOCKTICKS",
0007         "PerPkg": "1",
0008         "Unit": "PCU"
0009     },
0010     {
0011         "BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES",
0012         "Counter": "0,1,2,3",
0013         "CounterType": "PGMABLE",
0014         "EventCode": "0x60",
0015         "EventName": "UNC_P_CORE_TRANSITION_CYCLES",
0016         "PerPkg": "1",
0017         "Unit": "PCU"
0018     },
0019     {
0020         "BriefDescription": "UNC_P_DEMOTIONS",
0021         "Counter": "0,1,2,3",
0022         "CounterType": "PGMABLE",
0023         "EventCode": "0x30",
0024         "EventName": "UNC_P_DEMOTIONS",
0025         "PerPkg": "1",
0026         "Unit": "PCU"
0027     },
0028     {
0029         "BriefDescription": "Phase Shed 0 Cycles",
0030         "Counter": "0,1,2,3",
0031         "CounterType": "PGMABLE",
0032         "EventCode": "0x75",
0033         "EventName": "UNC_P_FIVR_PS_PS0_CYCLES",
0034         "PerPkg": "1",
0035         "Unit": "PCU"
0036     },
0037     {
0038         "BriefDescription": "Phase Shed 1 Cycles",
0039         "Counter": "0,1,2,3",
0040         "CounterType": "PGMABLE",
0041         "EventCode": "0x76",
0042         "EventName": "UNC_P_FIVR_PS_PS1_CYCLES",
0043         "PerPkg": "1",
0044         "Unit": "PCU"
0045     },
0046     {
0047         "BriefDescription": "Phase Shed 2 Cycles",
0048         "Counter": "0,1,2,3",
0049         "CounterType": "PGMABLE",
0050         "EventCode": "0x77",
0051         "EventName": "UNC_P_FIVR_PS_PS2_CYCLES",
0052         "PerPkg": "1",
0053         "Unit": "PCU"
0054     },
0055     {
0056         "BriefDescription": "Phase Shed 3 Cycles",
0057         "Counter": "0,1,2,3",
0058         "CounterType": "PGMABLE",
0059         "EventCode": "0x78",
0060         "EventName": "UNC_P_FIVR_PS_PS3_CYCLES",
0061         "PerPkg": "1",
0062         "Unit": "PCU"
0063     },
0064     {
0065         "BriefDescription": "AVX256 Frequency Clipping",
0066         "Counter": "0,1,2,3",
0067         "CounterType": "PGMABLE",
0068         "EventCode": "0x49",
0069         "EventName": "UNC_P_FREQ_CLIP_AVX256",
0070         "PerPkg": "1",
0071         "Unit": "PCU"
0072     },
0073     {
0074         "BriefDescription": "AVX512 Frequency Clipping",
0075         "Counter": "0,1,2,3",
0076         "CounterType": "PGMABLE",
0077         "EventCode": "0x4a",
0078         "EventName": "UNC_P_FREQ_CLIP_AVX512",
0079         "PerPkg": "1",
0080         "Unit": "PCU"
0081     },
0082     {
0083         "BriefDescription": "Thermal Strongest Upper Limit Cycles",
0084         "Counter": "0,1,2,3",
0085         "CounterType": "PGMABLE",
0086         "EventCode": "0x04",
0087         "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
0088         "PerPkg": "1",
0089         "Unit": "PCU"
0090     },
0091     {
0092         "BriefDescription": "Power Strongest Upper Limit Cycles",
0093         "Counter": "0,1,2,3",
0094         "CounterType": "PGMABLE",
0095         "EventCode": "0x05",
0096         "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
0097         "PerPkg": "1",
0098         "Unit": "PCU"
0099     },
0100     {
0101         "BriefDescription": "IO P Limit Strongest Lower Limit Cycles",
0102         "Counter": "0,1,2,3",
0103         "CounterType": "PGMABLE",
0104         "EventCode": "0x73",
0105         "EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES",
0106         "PerPkg": "1",
0107         "Unit": "PCU"
0108     },
0109     {
0110         "BriefDescription": "Cycles spent changing Frequency",
0111         "Counter": "0,1,2,3",
0112         "CounterType": "PGMABLE",
0113         "EventCode": "0x74",
0114         "EventName": "UNC_P_FREQ_TRANS_CYCLES",
0115         "PerPkg": "1",
0116         "Unit": "PCU"
0117     },
0118     {
0119         "BriefDescription": "Memory Phase Shedding Cycles",
0120         "Counter": "0,1,2,3",
0121         "CounterType": "PGMABLE",
0122         "EventCode": "0x2F",
0123         "EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES",
0124         "PerPkg": "1",
0125         "Unit": "PCU"
0126     },
0127     {
0128         "BriefDescription": "Package C State Residency - C0",
0129         "Counter": "0,1,2,3",
0130         "CounterType": "PGMABLE",
0131         "EventCode": "0x2A",
0132         "EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES",
0133         "PerPkg": "1",
0134         "Unit": "PCU"
0135     },
0136     {
0137         "BriefDescription": "Package C State Residency - C2E",
0138         "Counter": "0,1,2,3",
0139         "CounterType": "PGMABLE",
0140         "EventCode": "0x2B",
0141         "EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES",
0142         "PerPkg": "1",
0143         "Unit": "PCU"
0144     },
0145     {
0146         "BriefDescription": "Package C State Residency - C3",
0147         "Counter": "0,1,2,3",
0148         "CounterType": "PGMABLE",
0149         "EventCode": "0x2C",
0150         "EventName": "UNC_P_PKG_RESIDENCY_C3_CYCLES",
0151         "PerPkg": "1",
0152         "Unit": "PCU"
0153     },
0154     {
0155         "BriefDescription": "Package C State Residency - C6",
0156         "Counter": "0,1,2,3",
0157         "CounterType": "PGMABLE",
0158         "EventCode": "0x2D",
0159         "EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES",
0160         "PerPkg": "1",
0161         "Unit": "PCU"
0162     },
0163     {
0164         "BriefDescription": "UNC_P_PMAX_THROTTLED_CYCLES",
0165         "Counter": "0,1,2,3",
0166         "CounterType": "PGMABLE",
0167         "EventCode": "0x06",
0168         "EventName": "UNC_P_PMAX_THROTTLED_CYCLES",
0169         "PerPkg": "1",
0170         "Unit": "PCU"
0171     },
0172     {
0173         "BriefDescription": "External Prochot",
0174         "Counter": "0,1,2,3",
0175         "CounterType": "PGMABLE",
0176         "EventCode": "0x0A",
0177         "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
0178         "PerPkg": "1",
0179         "Unit": "PCU"
0180     },
0181     {
0182         "BriefDescription": "Internal Prochot",
0183         "Counter": "0,1,2,3",
0184         "CounterType": "PGMABLE",
0185         "EventCode": "0x09",
0186         "EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES",
0187         "PerPkg": "1",
0188         "Unit": "PCU"
0189     },
0190     {
0191         "BriefDescription": "Total Core C State Transition Cycles",
0192         "Counter": "0,1,2,3",
0193         "CounterType": "PGMABLE",
0194         "EventCode": "0x72",
0195         "EventName": "UNC_P_TOTAL_TRANSITION_CYCLES",
0196         "PerPkg": "1",
0197         "Unit": "PCU"
0198     },
0199     {
0200         "BriefDescription": "VR Hot",
0201         "Counter": "0,1,2,3",
0202         "CounterType": "PGMABLE",
0203         "EventCode": "0x42",
0204         "EventName": "UNC_P_VR_HOT_CYCLES",
0205         "PerPkg": "1",
0206         "Unit": "PCU"
0207     },
0208     {
0209         "BriefDescription": "Number of cores in C-State : C0 and C1",
0210         "Counter": "0,1,2,3",
0211         "CounterType": "PGMABLE",
0212         "EventCode": "0x80",
0213         "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0",
0214         "PerPkg": "1",
0215         "Unit": "PCU"
0216     },
0217     {
0218         "BriefDescription": "Number of cores in C-State : C3",
0219         "Counter": "0,1,2,3",
0220         "CounterType": "PGMABLE",
0221         "EventCode": "0x80",
0222         "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3",
0223         "PerPkg": "1",
0224         "Unit": "PCU"
0225     },
0226     {
0227         "BriefDescription": "Number of cores in C-State : C6 and C7",
0228         "Counter": "0,1,2,3",
0229         "CounterType": "PGMABLE",
0230         "EventCode": "0x80",
0231         "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6",
0232         "PerPkg": "1",
0233         "Unit": "PCU"
0234     }
0235 ]