0001 [
0002 {
0003 "BriefDescription": "Pre-charge for reads",
0004 "Counter": "0,1,2,3",
0005 "CounterType": "PGMABLE",
0006 "EventCode": "0x02",
0007 "EventName": "UNC_M_PRE_COUNT.RD",
0008 "PerPkg": "1",
0009 "UMask": "0x04",
0010 "Unit": "iMC"
0011 },
0012 {
0013 "BriefDescription": "Pre-charge for writes",
0014 "Counter": "0,1,2,3",
0015 "CounterType": "PGMABLE",
0016 "EventCode": "0x02",
0017 "EventName": "UNC_M_PRE_COUNT.WR",
0018 "PerPkg": "1",
0019 "UMask": "0x08",
0020 "Unit": "iMC"
0021 },
0022 {
0023 "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd",
0024 "Counter": "0,1,2,3",
0025 "CounterType": "PGMABLE",
0026 "EventCode": "0x04",
0027 "EventName": "LLC_MISSES.MEM_READ",
0028 "PerPkg": "1",
0029 "ScaleUnit": "64Bytes",
0030 "UMask": "0x0f",
0031 "Unit": "iMC"
0032 },
0033 {
0034 "BriefDescription": "read requests to memory controller",
0035 "Counter": "0,1,2,3",
0036 "CounterType": "PGMABLE",
0037 "EventCode": "0x04",
0038 "EventName": "UNC_M_CAS_COUNT.RD",
0039 "PerPkg": "1",
0040 "ScaleUnit": "64Bytes",
0041 "UMask": "0x0f",
0042 "Unit": "iMC"
0043 },
0044 {
0045 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
0046 "Counter": "0,1,2,3",
0047 "CounterType": "PGMABLE",
0048 "EventCode": "0x04",
0049 "EventName": "LLC_MISSES.MEM_WRITE",
0050 "PerPkg": "1",
0051 "ScaleUnit": "64Bytes",
0052 "UMask": "0x30",
0053 "Unit": "iMC"
0054 },
0055 {
0056 "BriefDescription": "write requests to memory controller",
0057 "Counter": "0,1,2,3",
0058 "CounterType": "PGMABLE",
0059 "EventCode": "0x04",
0060 "EventName": "UNC_M_CAS_COUNT.WR",
0061 "PerPkg": "1",
0062 "ScaleUnit": "64Bytes",
0063 "UMask": "0x30",
0064 "Unit": "iMC"
0065 },
0066 {
0067 "BriefDescription": "All DRAM CAS commands issued",
0068 "Counter": "0,1,2,3",
0069 "CounterType": "PGMABLE",
0070 "EventCode": "0x04",
0071 "EventName": "UNC_M_CAS_COUNT.ALL",
0072 "PerPkg": "1",
0073 "UMask": "0x3f",
0074 "Unit": "iMC"
0075 },
0076 {
0077 "BriefDescription": "Number of DRAM Refreshes Issued",
0078 "Counter": "0,1,2,3",
0079 "CounterType": "PGMABLE",
0080 "EventCode": "0x45",
0081 "EventName": "UNC_M_DRAM_REFRESH.OPPORTUNISTIC",
0082 "PerPkg": "1",
0083 "UMask": "0x01",
0084 "Unit": "iMC"
0085 },
0086 {
0087 "BriefDescription": "Number of DRAM Refreshes Issued",
0088 "Counter": "0,1,2,3",
0089 "CounterType": "PGMABLE",
0090 "EventCode": "0x45",
0091 "EventName": "UNC_M_DRAM_REFRESH.PANIC",
0092 "PerPkg": "1",
0093 "UMask": "0x02",
0094 "Unit": "iMC"
0095 },
0096 {
0097 "BriefDescription": "Number of DRAM Refreshes Issued",
0098 "Counter": "0,1,2,3",
0099 "CounterType": "PGMABLE",
0100 "EventCode": "0x45",
0101 "EventName": "UNC_M_DRAM_REFRESH.HIGH",
0102 "PerPkg": "1",
0103 "UMask": "0x04",
0104 "Unit": "iMC"
0105 },
0106 {
0107 "BriefDescription": "Read Pending Queue Allocations",
0108 "Counter": "0,1,2,3",
0109 "CounterType": "PGMABLE",
0110 "EventCode": "0x10",
0111 "EventName": "UNC_M_RPQ_INSERTS.PCH0",
0112 "PerPkg": "1",
0113 "UMask": "0x01",
0114 "Unit": "iMC"
0115 },
0116 {
0117 "BriefDescription": "Read Pending Queue Allocations",
0118 "Counter": "0,1,2,3",
0119 "CounterType": "PGMABLE",
0120 "EventCode": "0x10",
0121 "EventName": "UNC_M_RPQ_INSERTS.PCH1",
0122 "PerPkg": "1",
0123 "UMask": "0x02",
0124 "Unit": "iMC"
0125 },
0126 {
0127 "BriefDescription": "Write Pending Queue Allocations",
0128 "Counter": "0,1,2,3",
0129 "CounterType": "PGMABLE",
0130 "EventCode": "0x20",
0131 "EventName": "UNC_M_WPQ_INSERTS.PCH0",
0132 "PerPkg": "1",
0133 "UMask": "0x01",
0134 "Unit": "iMC"
0135 },
0136 {
0137 "BriefDescription": "Write Pending Queue Allocations",
0138 "Counter": "0,1,2,3",
0139 "CounterType": "PGMABLE",
0140 "EventCode": "0x20",
0141 "EventName": "UNC_M_WPQ_INSERTS.PCH1",
0142 "PerPkg": "1",
0143 "UMask": "0x02",
0144 "Unit": "iMC"
0145 },
0146 {
0147 "BriefDescription": "DRAM Precharge commands. : Precharge due to page table",
0148 "Counter": "0,1,2,3",
0149 "CounterType": "PGMABLE",
0150 "EventCode": "0x02",
0151 "EventName": "UNC_M_PRE_COUNT.PGT",
0152 "PerPkg": "1",
0153 "UMask": "0x10",
0154 "Unit": "iMC"
0155 },
0156 {
0157 "BriefDescription": "Memory controller clock ticks",
0158 "Counter": "0,1,2,3",
0159 "CounterType": "PGMABLE",
0160 "EventName": "UNC_M_CLOCKTICKS",
0161 "PerPkg": "1",
0162 "Unit": "iMC"
0163 },
0164 {
0165 "BriefDescription": "Half clockticks for IMC",
0166 "Counter": "FIXED",
0167 "CounterType": "FIXED",
0168 "EventCode": "0xff",
0169 "EventName": "UNC_M_HCLOCKTICKS",
0170 "PerPkg": "1",
0171 "Unit": "iMC"
0172 },
0173 {
0174 "BriefDescription": "Read Pending Queue Occupancy",
0175 "Counter": "0,1,2,3",
0176 "CounterType": "PGMABLE",
0177 "EventCode": "0x80",
0178 "EventName": "UNC_M_RPQ_OCCUPANCY_PCH0",
0179 "PerPkg": "1",
0180 "Unit": "iMC"
0181 },
0182 {
0183 "BriefDescription": "Read Pending Queue Occupancy",
0184 "Counter": "0,1,2,3",
0185 "CounterType": "PGMABLE",
0186 "EventCode": "0x81",
0187 "EventName": "UNC_M_RPQ_OCCUPANCY_PCH1",
0188 "PerPkg": "1",
0189 "Unit": "iMC"
0190 },
0191 {
0192 "BriefDescription": "Write Pending Queue Occupancy",
0193 "Counter": "0,1,2,3",
0194 "CounterType": "PGMABLE",
0195 "EventCode": "0x82",
0196 "EventName": "UNC_M_WPQ_OCCUPANCY_PCH0",
0197 "PerPkg": "1",
0198 "Unit": "iMC"
0199 },
0200 {
0201 "BriefDescription": "Write Pending Queue Occupancy",
0202 "Counter": "0,1,2,3",
0203 "CounterType": "PGMABLE",
0204 "EventCode": "0x83",
0205 "EventName": "UNC_M_WPQ_OCCUPANCY_PCH1",
0206 "PerPkg": "1",
0207 "Unit": "iMC"
0208 },
0209 {
0210 "BriefDescription": "DRAM Activate Count : All Activates",
0211 "Counter": "0,1,2,3",
0212 "CounterType": "PGMABLE",
0213 "EventCode": "0x01",
0214 "EventName": "UNC_M_ACT_COUNT.ALL",
0215 "PerPkg": "1",
0216 "UMask": "0x0B",
0217 "Unit": "iMC"
0218 },
0219 {
0220 "BriefDescription": "DRAM Precharge commands",
0221 "Counter": "0,1,2,3",
0222 "CounterType": "PGMABLE",
0223 "EventCode": "0x02",
0224 "EventName": "UNC_M_PRE_COUNT.ALL",
0225 "PerPkg": "1",
0226 "UMask": "0x1C",
0227 "Unit": "iMC"
0228 },
0229 {
0230 "BriefDescription": "Read Data Buffer Inserts",
0231 "Counter": "0,1,2,3",
0232 "CounterType": "PGMABLE",
0233 "EventCode": "0x17",
0234 "EventName": "UNC_M_RDB_INSERTS",
0235 "PerPkg": "1",
0236 "Unit": "iMC"
0237 },
0238 {
0239 "BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
0240 "Counter": "0,1,2,3",
0241 "CounterType": "PGMABLE",
0242 "EventCode": "0x04",
0243 "EventName": "UNC_M_CAS_COUNT.RD_REG",
0244 "PerPkg": "1",
0245 "UMask": "0x01",
0246 "Unit": "iMC"
0247 },
0248 {
0249 "BriefDescription": "DRAM underfill read CAS commands issued",
0250 "Counter": "0,1,2,3",
0251 "CounterType": "PGMABLE",
0252 "EventCode": "0x04",
0253 "EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
0254 "PerPkg": "1",
0255 "UMask": "0x04",
0256 "Unit": "iMC"
0257 },
0258 {
0259 "BriefDescription": "DRAM Activate Count : Activate due to Bypass",
0260 "Counter": "0,1,2,3",
0261 "CounterType": "PGMABLE",
0262 "EventCode": "0x01",
0263 "EventName": "UNC_M_ACT_COUNT.BYP",
0264 "PerPkg": "1",
0265 "UMask": "0x08",
0266 "Unit": "iMC"
0267 },
0268 {
0269 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
0270 "Counter": "0,1,2,3",
0271 "CounterType": "PGMABLE",
0272 "EventCode": "0x04",
0273 "EventName": "UNC_M_CAS_COUNT.RD_PRE_REG",
0274 "PerPkg": "1",
0275 "UMask": "0x02",
0276 "Unit": "iMC"
0277 },
0278 {
0279 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands",
0280 "Counter": "0,1,2,3",
0281 "CounterType": "PGMABLE",
0282 "EventCode": "0x04",
0283 "EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL",
0284 "PerPkg": "1",
0285 "UMask": "0x08",
0286 "Unit": "iMC"
0287 },
0288 {
0289 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre",
0290 "Counter": "0,1,2,3",
0291 "CounterType": "PGMABLE",
0292 "EventCode": "0x04",
0293 "EventName": "UNC_M_CAS_COUNT.WR_PRE",
0294 "PerPkg": "1",
0295 "UMask": "0x20",
0296 "Unit": "iMC"
0297 },
0298 {
0299 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
0300 "Counter": "0,1,2,3",
0301 "CounterType": "PGMABLE",
0302 "EventCode": "0x47",
0303 "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_0",
0304 "PerPkg": "1",
0305 "UMask": "0x01",
0306 "Unit": "iMC"
0307 },
0308 {
0309 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
0310 "Counter": "0,1,2,3",
0311 "CounterType": "PGMABLE",
0312 "EventCode": "0x47",
0313 "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_1",
0314 "PerPkg": "1",
0315 "UMask": "0x02",
0316 "Unit": "iMC"
0317 },
0318 {
0319 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
0320 "Counter": "0,1,2,3",
0321 "CounterType": "PGMABLE",
0322 "EventCode": "0x47",
0323 "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_2",
0324 "PerPkg": "1",
0325 "UMask": "0x04",
0326 "Unit": "iMC"
0327 },
0328 {
0329 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
0330 "Counter": "0,1,2,3",
0331 "CounterType": "PGMABLE",
0332 "EventCode": "0x47",
0333 "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_3",
0334 "PerPkg": "1",
0335 "UMask": "0x08",
0336 "Unit": "iMC"
0337 },
0338 {
0339 "BriefDescription": "Throttle Cycles for Rank 0",
0340 "Counter": "0,1,2,3",
0341 "CounterType": "PGMABLE",
0342 "EventCode": "0x86",
0343 "EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT0",
0344 "PerPkg": "1",
0345 "UMask": "0x01",
0346 "Unit": "iMC"
0347 },
0348 {
0349 "BriefDescription": "Throttle Cycles for Rank 0",
0350 "Counter": "0,1,2,3",
0351 "CounterType": "PGMABLE",
0352 "EventCode": "0x86",
0353 "EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT1",
0354 "PerPkg": "1",
0355 "UMask": "0x02",
0356 "Unit": "iMC"
0357 },
0358 {
0359 "BriefDescription": "Throttle Cycles for Rank 0",
0360 "Counter": "0,1,2,3",
0361 "CounterType": "PGMABLE",
0362 "EventCode": "0x46",
0363 "EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT0",
0364 "PerPkg": "1",
0365 "UMask": "0x01",
0366 "Unit": "iMC"
0367 },
0368 {
0369 "BriefDescription": "Throttle Cycles for Rank 0",
0370 "Counter": "0,1,2,3",
0371 "CounterType": "PGMABLE",
0372 "EventCode": "0x46",
0373 "EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT1",
0374 "PerPkg": "1",
0375 "UMask": "0x02",
0376 "Unit": "iMC"
0377 },
0378 {
0379 "BriefDescription": "Read Pending Queue Not Empty",
0380 "Counter": "0,1,2,3",
0381 "CounterType": "PGMABLE",
0382 "EventCode": "0x11",
0383 "EventName": "UNC_M_RPQ_CYCLES_NE.PCH0",
0384 "PerPkg": "1",
0385 "UMask": "0x01",
0386 "Unit": "iMC"
0387 },
0388 {
0389 "BriefDescription": "Read Pending Queue Not Empty",
0390 "Counter": "0,1,2,3",
0391 "CounterType": "PGMABLE",
0392 "EventCode": "0x11",
0393 "EventName": "UNC_M_RPQ_CYCLES_NE.PCH1",
0394 "PerPkg": "1",
0395 "UMask": "0x02",
0396 "Unit": "iMC"
0397 },
0398 {
0399 "BriefDescription": "Write Pending Queue Not Empty",
0400 "Counter": "0,1,2,3",
0401 "CounterType": "PGMABLE",
0402 "EventCode": "0x21",
0403 "EventName": "UNC_M_WPQ_CYCLES_NE.PCH0",
0404 "PerPkg": "1",
0405 "UMask": "0x01",
0406 "Unit": "iMC"
0407 },
0408 {
0409 "BriefDescription": "Write Pending Queue Not Empty",
0410 "Counter": "0,1,2,3",
0411 "CounterType": "PGMABLE",
0412 "EventCode": "0x21",
0413 "EventName": "UNC_M_WPQ_CYCLES_NE.PCH1",
0414 "PerPkg": "1",
0415 "UMask": "0x02",
0416 "Unit": "iMC"
0417 },
0418 {
0419 "BriefDescription": "Write Pending Queue CAM Match",
0420 "Counter": "0,1,2,3",
0421 "CounterType": "PGMABLE",
0422 "EventCode": "0x23",
0423 "EventName": "UNC_M_WPQ_READ_HIT.PCH0",
0424 "PerPkg": "1",
0425 "UMask": "0x01",
0426 "Unit": "iMC"
0427 },
0428 {
0429 "BriefDescription": "Write Pending Queue CAM Match",
0430 "Counter": "0,1,2,3",
0431 "CounterType": "PGMABLE",
0432 "EventCode": "0x23",
0433 "EventName": "UNC_M_WPQ_READ_HIT.PCH1",
0434 "PerPkg": "1",
0435 "UMask": "0x02",
0436 "Unit": "iMC"
0437 },
0438 {
0439 "BriefDescription": "Write Pending Queue CAM Match",
0440 "Counter": "0,1,2,3",
0441 "CounterType": "PGMABLE",
0442 "EventCode": "0x24",
0443 "EventName": "UNC_M_WPQ_WRITE_HIT.PCH0",
0444 "PerPkg": "1",
0445 "UMask": "0x01",
0446 "Unit": "iMC"
0447 },
0448 {
0449 "BriefDescription": "Write Pending Queue CAM Match",
0450 "Counter": "0,1,2,3",
0451 "CounterType": "PGMABLE",
0452 "EventCode": "0x24",
0453 "EventName": "UNC_M_WPQ_WRITE_HIT.PCH1",
0454 "PerPkg": "1",
0455 "UMask": "0x02",
0456 "Unit": "iMC"
0457 },
0458 {
0459 "BriefDescription": "UNC_M_PCLS.RD",
0460 "Counter": "0,1,2,3",
0461 "CounterType": "PGMABLE",
0462 "EventCode": "0xA0",
0463 "EventName": "UNC_M_PCLS.RD",
0464 "PerPkg": "1",
0465 "UMask": "0x01",
0466 "Unit": "iMC"
0467 },
0468 {
0469 "BriefDescription": "UNC_M_PCLS.WR",
0470 "Counter": "0,1,2,3",
0471 "CounterType": "PGMABLE",
0472 "EventCode": "0xA0",
0473 "EventName": "UNC_M_PCLS.WR",
0474 "PerPkg": "1",
0475 "UMask": "0x02",
0476 "Unit": "iMC"
0477 },
0478 {
0479 "BriefDescription": "UNC_M_PCLS.TOTAL",
0480 "Counter": "0,1,2,3",
0481 "CounterType": "PGMABLE",
0482 "EventCode": "0xA0",
0483 "EventName": "UNC_M_PCLS.TOTAL",
0484 "PerPkg": "1",
0485 "UMask": "0x04",
0486 "Unit": "iMC"
0487 },
0488 {
0489 "BriefDescription": "DRAM Precharge All Commands",
0490 "Counter": "0,1,2,3",
0491 "CounterType": "PGMABLE",
0492 "EventCode": "0x44",
0493 "EventName": "UNC_M_DRAM_PRE_ALL",
0494 "PerPkg": "1",
0495 "Unit": "iMC"
0496 },
0497 {
0498 "BriefDescription": "UNC_M_PARITY_ERRORS",
0499 "Counter": "0,1,2,3",
0500 "CounterType": "PGMABLE",
0501 "EventCode": "0x2c",
0502 "EventName": "UNC_M_PARITY_ERRORS",
0503 "PerPkg": "1",
0504 "Unit": "iMC"
0505 },
0506 {
0507 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode",
0508 "Counter": "0,1,2,3",
0509 "CounterType": "PGMABLE",
0510 "EventCode": "0x85",
0511 "EventName": "UNC_M_POWER_CHANNEL_PPD",
0512 "MetricExpr": "(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.",
0513 "MetricName": "power_channel_ppd %",
0514 "PerPkg": "1",
0515 "Unit": "iMC"
0516 },
0517 {
0518 "BriefDescription": "Cycles Memory is in self refresh power mode",
0519 "Counter": "0,1,2,3",
0520 "CounterType": "PGMABLE",
0521 "EventCode": "0x43",
0522 "EventName": "UNC_M_POWER_SELF_REFRESH",
0523 "MetricExpr": "(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.",
0524 "MetricName": "power_self_refresh %",
0525 "PerPkg": "1",
0526 "Unit": "iMC"
0527 },
0528 {
0529 "BriefDescription": "Read Data Buffer Full",
0530 "Counter": "0,1,2,3",
0531 "CounterType": "PGMABLE",
0532 "EventCode": "0x19",
0533 "EventName": "UNC_M_RDB_FULL",
0534 "PerPkg": "1",
0535 "Unit": "iMC"
0536 },
0537 {
0538 "BriefDescription": "Read Data Buffer Not Empty",
0539 "Counter": "0,1,2,3",
0540 "CounterType": "PGMABLE",
0541 "EventCode": "0x18",
0542 "EventName": "UNC_M_RDB_NOT_EMPTY",
0543 "PerPkg": "1",
0544 "Unit": "iMC"
0545 },
0546 {
0547 "BriefDescription": "Read Data Buffer Occupancy",
0548 "Counter": "0,1,2,3",
0549 "CounterType": "PGMABLE",
0550 "EventCode": "0x1A",
0551 "EventName": "UNC_M_RDB_OCCUPANCY",
0552 "PerPkg": "1",
0553 "Unit": "iMC"
0554 },
0555 {
0556 "BriefDescription": "Read Pending Queue Full Cycles",
0557 "Counter": "0,1,2,3",
0558 "CounterType": "PGMABLE",
0559 "EventCode": "0x12",
0560 "EventName": "UNC_M_RPQ_CYCLES_FULL_PCH0",
0561 "PerPkg": "1",
0562 "Unit": "iMC"
0563 },
0564 {
0565 "BriefDescription": "Read Pending Queue Full Cycles",
0566 "Counter": "0,1,2,3",
0567 "CounterType": "PGMABLE",
0568 "EventCode": "0x15",
0569 "EventName": "UNC_M_RPQ_CYCLES_FULL_PCH1",
0570 "PerPkg": "1",
0571 "Unit": "iMC"
0572 },
0573 {
0574 "BriefDescription": "Write Pending Queue Full Cycles",
0575 "Counter": "0,1,2,3",
0576 "CounterType": "PGMABLE",
0577 "EventCode": "0x22",
0578 "EventName": "UNC_M_WPQ_CYCLES_FULL_PCH0",
0579 "PerPkg": "1",
0580 "Unit": "iMC"
0581 },
0582 {
0583 "BriefDescription": "Write Pending Queue Full Cycles",
0584 "Counter": "0,1,2,3",
0585 "CounterType": "PGMABLE",
0586 "EventCode": "0x16",
0587 "EventName": "UNC_M_WPQ_CYCLES_FULL_PCH1",
0588 "PerPkg": "1",
0589 "Unit": "iMC"
0590 },
0591 {
0592 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
0593 "Counter": "0,1,2,3",
0594 "CounterType": "PGMABLE",
0595 "EventCode": "0x04",
0596 "EventName": "UNC_M_CAS_COUNT.WR_NONPRE",
0597 "PerPkg": "1",
0598 "UMask": "0x10",
0599 "Unit": "iMC"
0600 },
0601 {
0602 "BriefDescription": "Pre-charges due to page misses",
0603 "Counter": "0,1,2,3",
0604 "CounterType": "PGMABLE",
0605 "EventCode": "0x02",
0606 "EventName": "UNC_M_PRE_COUNT.PAGE_MISS",
0607 "PerPkg": "1",
0608 "UMask": "0x0c",
0609 "Unit": "iMC"
0610 },
0611 {
0612 "BriefDescription": "Free running counter that increments for the Memory Controller",
0613 "Counter": "4",
0614 "CounterType": "FREERUN",
0615 "EventName": "UNC_M_CLOCKTICKS_FREERUN",
0616 "PerPkg": "1",
0617 "Unit": "iMC"
0618 }
0619 ]
