0001 [
0002 {
0003 "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
0004 "CollectPEBSRecord": "2",
0005 "Counter": "0,1,2,3",
0006 "EventCode": "0x28",
0007 "EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
0008 "PEBScounters": "0,1,2,3",
0009 "PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
0010 "SampleAfterValue": "200003",
0011 "Speculative": "1",
0012 "UMask": "0x7"
0013 },
0014 {
0015 "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
0016 "CollectPEBSRecord": "2",
0017 "Counter": "0,1,2,3",
0018 "EventCode": "0x28",
0019 "EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
0020 "PEBScounters": "0,1,2,3",
0021 "PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
0022 "SampleAfterValue": "200003",
0023 "Speculative": "1",
0024 "UMask": "0x18"
0025 },
0026 {
0027 "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
0028 "CollectPEBSRecord": "2",
0029 "Counter": "0,1,2,3",
0030 "EventCode": "0x28",
0031 "EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
0032 "PEBScounters": "0,1,2,3",
0033 "PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). This includes high current AVX 512-bit instructions.",
0034 "SampleAfterValue": "200003",
0035 "Speculative": "1",
0036 "UMask": "0x20"
0037 },
0038 {
0039 "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",
0040 "CollectPEBSRecord": "2",
0041 "Counter": "0,1,2,3",
0042 "EventCode": "0xB7, 0xBB",
0043 "EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
0044 "MSRIndex": "0x1a6,0x1a7",
0045 "MSRValue": "0x10004",
0046 "Offcore": "1",
0047 "PEBScounters": "0,1,2,3",
0048 "SampleAfterValue": "100003",
0049 "Speculative": "1",
0050 "UMask": "0x1"
0051 },
0052 {
0053 "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that DRAM supplied the request.",
0054 "CollectPEBSRecord": "2",
0055 "Counter": "0,1,2,3",
0056 "EventCode": "0xB7, 0xBB",
0057 "EventName": "OCR.DEMAND_CODE_RD.DRAM",
0058 "MSRIndex": "0x1a6,0x1a7",
0059 "MSRValue": "0x184000004",
0060 "Offcore": "1",
0061 "PEBScounters": "0,1,2,3",
0062 "SampleAfterValue": "100003",
0063 "Speculative": "1",
0064 "UMask": "0x1"
0065 },
0066 {
0067 "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that DRAM supplied the request.",
0068 "CollectPEBSRecord": "2",
0069 "Counter": "0,1,2,3",
0070 "EventCode": "0xB7, 0xBB",
0071 "EventName": "OCR.DEMAND_CODE_RD.LOCAL_DRAM",
0072 "MSRIndex": "0x1a6,0x1a7",
0073 "MSRValue": "0x184000004",
0074 "Offcore": "1",
0075 "PEBScounters": "0,1,2,3",
0076 "SampleAfterValue": "100003",
0077 "Speculative": "1",
0078 "UMask": "0x1"
0079 },
0080 {
0081 "BriefDescription": "Counts demand data reads that have any type of response.",
0082 "CollectPEBSRecord": "2",
0083 "Counter": "0,1,2,3",
0084 "EventCode": "0xB7, 0xBB",
0085 "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
0086 "MSRIndex": "0x1a6,0x1a7",
0087 "MSRValue": "0x10001",
0088 "Offcore": "1",
0089 "PEBScounters": "0,1,2,3",
0090 "SampleAfterValue": "100003",
0091 "Speculative": "1",
0092 "UMask": "0x1"
0093 },
0094 {
0095 "BriefDescription": "Counts demand data reads that DRAM supplied the request.",
0096 "CollectPEBSRecord": "2",
0097 "Counter": "0,1,2,3",
0098 "EventCode": "0xB7, 0xBB",
0099 "EventName": "OCR.DEMAND_DATA_RD.DRAM",
0100 "MSRIndex": "0x1a6,0x1a7",
0101 "MSRValue": "0x184000001",
0102 "Offcore": "1",
0103 "PEBScounters": "0,1,2,3",
0104 "SampleAfterValue": "100003",
0105 "Speculative": "1",
0106 "UMask": "0x1"
0107 },
0108 {
0109 "BriefDescription": "Counts demand data reads that DRAM supplied the request.",
0110 "CollectPEBSRecord": "2",
0111 "Counter": "0,1,2,3",
0112 "EventCode": "0xB7, 0xBB",
0113 "EventName": "OCR.DEMAND_DATA_RD.LOCAL_DRAM",
0114 "MSRIndex": "0x1a6,0x1a7",
0115 "MSRValue": "0x184000001",
0116 "Offcore": "1",
0117 "PEBScounters": "0,1,2,3",
0118 "SampleAfterValue": "100003",
0119 "Speculative": "1",
0120 "UMask": "0x1"
0121 },
0122 {
0123 "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",
0124 "CollectPEBSRecord": "2",
0125 "Counter": "0,1,2,3",
0126 "EventCode": "0xB7, 0xBB",
0127 "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
0128 "MSRIndex": "0x1a6,0x1a7",
0129 "MSRValue": "0x10002",
0130 "Offcore": "1",
0131 "PEBScounters": "0,1,2,3",
0132 "SampleAfterValue": "100003",
0133 "Speculative": "1",
0134 "UMask": "0x1"
0135 },
0136 {
0137 "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that DRAM supplied the request.",
0138 "CollectPEBSRecord": "2",
0139 "Counter": "0,1,2,3",
0140 "EventCode": "0xB7, 0xBB",
0141 "EventName": "OCR.DEMAND_RFO.DRAM",
0142 "MSRIndex": "0x1a6,0x1a7",
0143 "MSRValue": "0x184000002",
0144 "Offcore": "1",
0145 "PEBScounters": "0,1,2,3",
0146 "SampleAfterValue": "100003",
0147 "Speculative": "1",
0148 "UMask": "0x1"
0149 },
0150 {
0151 "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that DRAM supplied the request.",
0152 "CollectPEBSRecord": "2",
0153 "Counter": "0,1,2,3",
0154 "EventCode": "0xB7, 0xBB",
0155 "EventName": "OCR.DEMAND_RFO.LOCAL_DRAM",
0156 "MSRIndex": "0x1a6,0x1a7",
0157 "MSRValue": "0x184000002",
0158 "Offcore": "1",
0159 "PEBScounters": "0,1,2,3",
0160 "SampleAfterValue": "100003",
0161 "Speculative": "1",
0162 "UMask": "0x1"
0163 },
0164 {
0165 "BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that have any type of response.",
0166 "CollectPEBSRecord": "2",
0167 "Counter": "0,1,2,3",
0168 "EventCode": "0xB7, 0xBB",
0169 "EventName": "OCR.HWPF_L1D_AND_SWPF.ANY_RESPONSE",
0170 "MSRIndex": "0x1a6,0x1a7",
0171 "MSRValue": "0x10400",
0172 "Offcore": "1",
0173 "PEBScounters": "0,1,2,3",
0174 "SampleAfterValue": "100003",
0175 "Speculative": "1",
0176 "UMask": "0x1"
0177 },
0178 {
0179 "BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that DRAM supplied the request.",
0180 "CollectPEBSRecord": "2",
0181 "Counter": "0,1,2,3",
0182 "EventCode": "0xB7, 0xBB",
0183 "EventName": "OCR.HWPF_L1D_AND_SWPF.DRAM",
0184 "MSRIndex": "0x1a6,0x1a7",
0185 "MSRValue": "0x184000400",
0186 "Offcore": "1",
0187 "PEBScounters": "0,1,2,3",
0188 "SampleAfterValue": "100003",
0189 "Speculative": "1",
0190 "UMask": "0x1"
0191 },
0192 {
0193 "BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that DRAM supplied the request.",
0194 "CollectPEBSRecord": "2",
0195 "Counter": "0,1,2,3",
0196 "EventCode": "0xB7, 0xBB",
0197 "EventName": "OCR.HWPF_L1D_AND_SWPF.LOCAL_DRAM",
0198 "MSRIndex": "0x1a6,0x1a7",
0199 "MSRValue": "0x184000400",
0200 "Offcore": "1",
0201 "PEBScounters": "0,1,2,3",
0202 "SampleAfterValue": "100003",
0203 "Speculative": "1",
0204 "UMask": "0x1"
0205 },
0206 {
0207 "BriefDescription": "Counts hardware prefetch data reads (which bring data to L2) that have any type of response.",
0208 "CollectPEBSRecord": "2",
0209 "Counter": "0,1,2,3",
0210 "EventCode": "0xB7, 0xBB",
0211 "EventName": "OCR.HWPF_L2_DATA_RD.ANY_RESPONSE",
0212 "MSRIndex": "0x1a6,0x1a7",
0213 "MSRValue": "0x10010",
0214 "Offcore": "1",
0215 "PEBScounters": "0,1,2,3",
0216 "SampleAfterValue": "100003",
0217 "Speculative": "1",
0218 "UMask": "0x1"
0219 },
0220 {
0221 "BriefDescription": "Counts hardware prefetch data reads (which bring data to L2) that DRAM supplied the request.",
0222 "CollectPEBSRecord": "2",
0223 "Counter": "0,1,2,3",
0224 "EventCode": "0xB7, 0xBB",
0225 "EventName": "OCR.HWPF_L2_DATA_RD.DRAM",
0226 "MSRIndex": "0x1a6,0x1a7",
0227 "MSRValue": "0x184000010",
0228 "Offcore": "1",
0229 "PEBScounters": "0,1,2,3",
0230 "SampleAfterValue": "100003",
0231 "Speculative": "1",
0232 "UMask": "0x1"
0233 },
0234 {
0235 "BriefDescription": "Counts hardware prefetch data reads (which bring data to L2) that DRAM supplied the request.",
0236 "CollectPEBSRecord": "2",
0237 "Counter": "0,1,2,3",
0238 "EventCode": "0xB7, 0xBB",
0239 "EventName": "OCR.HWPF_L2_DATA_RD.LOCAL_DRAM",
0240 "MSRIndex": "0x1a6,0x1a7",
0241 "MSRValue": "0x184000010",
0242 "Offcore": "1",
0243 "PEBScounters": "0,1,2,3",
0244 "SampleAfterValue": "100003",
0245 "Speculative": "1",
0246 "UMask": "0x1"
0247 },
0248 {
0249 "BriefDescription": "Counts hardware prefetch RFOs (which bring data to L2) that have any type of response.",
0250 "CollectPEBSRecord": "2",
0251 "Counter": "0,1,2,3",
0252 "EventCode": "0xB7, 0xBB",
0253 "EventName": "OCR.HWPF_L2_RFO.ANY_RESPONSE",
0254 "MSRIndex": "0x1a6,0x1a7",
0255 "MSRValue": "0x10020",
0256 "Offcore": "1",
0257 "PEBScounters": "0,1,2,3",
0258 "SampleAfterValue": "100003",
0259 "Speculative": "1",
0260 "UMask": "0x1"
0261 },
0262 {
0263 "BriefDescription": "Counts hardware prefetch RFOs (which bring data to L2) that DRAM supplied the request.",
0264 "CollectPEBSRecord": "2",
0265 "Counter": "0,1,2,3",
0266 "EventCode": "0xB7, 0xBB",
0267 "EventName": "OCR.HWPF_L2_RFO.DRAM",
0268 "MSRIndex": "0x1a6,0x1a7",
0269 "MSRValue": "0x184000020",
0270 "Offcore": "1",
0271 "PEBScounters": "0,1,2,3",
0272 "SampleAfterValue": "100003",
0273 "Speculative": "1",
0274 "UMask": "0x1"
0275 },
0276 {
0277 "BriefDescription": "Counts hardware prefetch RFOs (which bring data to L2) that DRAM supplied the request.",
0278 "CollectPEBSRecord": "2",
0279 "Counter": "0,1,2,3",
0280 "EventCode": "0xB7, 0xBB",
0281 "EventName": "OCR.HWPF_L2_RFO.LOCAL_DRAM",
0282 "MSRIndex": "0x1a6,0x1a7",
0283 "MSRValue": "0x184000020",
0284 "Offcore": "1",
0285 "PEBScounters": "0,1,2,3",
0286 "SampleAfterValue": "100003",
0287 "Speculative": "1",
0288 "UMask": "0x1"
0289 },
0290 {
0291 "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that have any type of response.",
0292 "CollectPEBSRecord": "2",
0293 "Counter": "0,1,2,3",
0294 "EventCode": "0xB7, 0xBB",
0295 "EventName": "OCR.OTHER.ANY_RESPONSE",
0296 "MSRIndex": "0x1a6,0x1a7",
0297 "MSRValue": "0x18000",
0298 "Offcore": "1",
0299 "PEBScounters": "0,1,2,3",
0300 "SampleAfterValue": "100003",
0301 "Speculative": "1",
0302 "UMask": "0x1"
0303 },
0304 {
0305 "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that DRAM supplied the request.",
0306 "CollectPEBSRecord": "2",
0307 "Counter": "0,1,2,3",
0308 "EventCode": "0xB7, 0xBB",
0309 "EventName": "OCR.OTHER.DRAM",
0310 "MSRIndex": "0x1a6,0x1a7",
0311 "MSRValue": "0x184008000",
0312 "Offcore": "1",
0313 "PEBScounters": "0,1,2,3",
0314 "SampleAfterValue": "100003",
0315 "Speculative": "1",
0316 "UMask": "0x1"
0317 },
0318 {
0319 "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that DRAM supplied the request.",
0320 "CollectPEBSRecord": "2",
0321 "Counter": "0,1,2,3",
0322 "EventCode": "0xB7, 0xBB",
0323 "EventName": "OCR.OTHER.LOCAL_DRAM",
0324 "MSRIndex": "0x1a6,0x1a7",
0325 "MSRValue": "0x184008000",
0326 "Offcore": "1",
0327 "PEBScounters": "0,1,2,3",
0328 "SampleAfterValue": "100003",
0329 "Speculative": "1",
0330 "UMask": "0x1"
0331 },
0332 {
0333 "BriefDescription": "Counts streaming stores that have any type of response.",
0334 "CollectPEBSRecord": "2",
0335 "Counter": "0,1,2,3",
0336 "EventCode": "0xB7, 0xBB",
0337 "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
0338 "MSRIndex": "0x1a6,0x1a7",
0339 "MSRValue": "0x10800",
0340 "Offcore": "1",
0341 "PEBScounters": "0,1,2,3",
0342 "SampleAfterValue": "100003",
0343 "Speculative": "1",
0344 "UMask": "0x1"
0345 },
0346 {
0347 "BriefDescription": "Counts streaming stores that DRAM supplied the request.",
0348 "CollectPEBSRecord": "2",
0349 "Counter": "0,1,2,3",
0350 "EventCode": "0xB7, 0xBB",
0351 "EventName": "OCR.STREAMING_WR.DRAM",
0352 "MSRIndex": "0x1a6,0x1a7",
0353 "MSRValue": "0x184000800",
0354 "Offcore": "1",
0355 "PEBScounters": "0,1,2,3",
0356 "SampleAfterValue": "100003",
0357 "Speculative": "1",
0358 "UMask": "0x1"
0359 },
0360 {
0361 "BriefDescription": "Counts streaming stores that DRAM supplied the request.",
0362 "CollectPEBSRecord": "2",
0363 "Counter": "0,1,2,3",
0364 "EventCode": "0xB7, 0xBB",
0365 "EventName": "OCR.STREAMING_WR.LOCAL_DRAM",
0366 "MSRIndex": "0x1a6,0x1a7",
0367 "MSRValue": "0x184000800",
0368 "Offcore": "1",
0369 "PEBScounters": "0,1,2,3",
0370 "SampleAfterValue": "100003",
0371 "Speculative": "1",
0372 "UMask": "0x1"
0373 }
0374 ]
