0001 [
0002 {
0003 "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.",
0004 "Counter": "0,1,2,3",
0005 "CounterHTOff": "0,1,2,3,4,5,6,7",
0006 "EventCode": "0xC6",
0007 "EventName": "AVX_INSTS.ALL",
0008 "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.",
0009 "SampleAfterValue": "2000003",
0010 "UMask": "0x7"
0011 },
0012 {
0013 "BriefDescription": "Cycles with any input/output SSE or FP assist",
0014 "Counter": "0,1,2,3",
0015 "CounterHTOff": "0,1,2,3",
0016 "CounterMask": "1",
0017 "EventCode": "0xCA",
0018 "EventName": "FP_ASSIST.ANY",
0019 "PublicDescription": "Cycles with any input/output SSE* or FP assists.",
0020 "SampleAfterValue": "100003",
0021 "UMask": "0x1e"
0022 },
0023 {
0024 "BriefDescription": "Number of SIMD FP assists due to input values",
0025 "Counter": "0,1,2,3",
0026 "CounterHTOff": "0,1,2,3,4,5,6,7",
0027 "EventCode": "0xCA",
0028 "EventName": "FP_ASSIST.SIMD_INPUT",
0029 "PublicDescription": "Number of SIMD FP assists due to input values.",
0030 "SampleAfterValue": "100003",
0031 "UMask": "0x10"
0032 },
0033 {
0034 "BriefDescription": "Number of SIMD FP assists due to Output values",
0035 "Counter": "0,1,2,3",
0036 "CounterHTOff": "0,1,2,3,4,5,6,7",
0037 "EventCode": "0xCA",
0038 "EventName": "FP_ASSIST.SIMD_OUTPUT",
0039 "PublicDescription": "Number of SIMD FP assists due to output values.",
0040 "SampleAfterValue": "100003",
0041 "UMask": "0x8"
0042 },
0043 {
0044 "BriefDescription": "Number of X87 assists due to input value.",
0045 "Counter": "0,1,2,3",
0046 "CounterHTOff": "0,1,2,3,4,5,6,7",
0047 "EventCode": "0xCA",
0048 "EventName": "FP_ASSIST.X87_INPUT",
0049 "PublicDescription": "Number of X87 FP assists due to input values.",
0050 "SampleAfterValue": "100003",
0051 "UMask": "0x4"
0052 },
0053 {
0054 "BriefDescription": "Number of X87 assists due to output value.",
0055 "Counter": "0,1,2,3",
0056 "CounterHTOff": "0,1,2,3,4,5,6,7",
0057 "EventCode": "0xCA",
0058 "EventName": "FP_ASSIST.X87_OUTPUT",
0059 "PublicDescription": "Number of X87 FP assists due to output values.",
0060 "SampleAfterValue": "100003",
0061 "UMask": "0x2"
0062 },
0063 {
0064 "BriefDescription": "Number of SIMD Move Elimination candidate uops that were eliminated.",
0065 "Counter": "0,1,2,3",
0066 "CounterHTOff": "0,1,2,3,4,5,6,7",
0067 "EventCode": "0x58",
0068 "EventName": "MOVE_ELIMINATION.SIMD_ELIMINATED",
0069 "PublicDescription": "Number of SIMD move elimination candidate uops that were eliminated.",
0070 "SampleAfterValue": "1000003",
0071 "UMask": "0x2"
0072 },
0073 {
0074 "BriefDescription": "Number of SIMD Move Elimination candidate uops that were not eliminated.",
0075 "Counter": "0,1,2,3",
0076 "CounterHTOff": "0,1,2,3,4,5,6,7",
0077 "EventCode": "0x58",
0078 "EventName": "MOVE_ELIMINATION.SIMD_NOT_ELIMINATED",
0079 "PublicDescription": "Number of SIMD move elimination candidate uops that were not eliminated.",
0080 "SampleAfterValue": "1000003",
0081 "UMask": "0x8"
0082 },
0083 {
0084 "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
0085 "Counter": "0,1,2,3",
0086 "CounterHTOff": "0,1,2,3,4,5,6,7",
0087 "Errata": "HSD56, HSM57",
0088 "EventCode": "0xC1",
0089 "EventName": "OTHER_ASSISTS.AVX_TO_SSE",
0090 "SampleAfterValue": "100003",
0091 "UMask": "0x8"
0092 },
0093 {
0094 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
0095 "Counter": "0,1,2,3",
0096 "CounterHTOff": "0,1,2,3,4,5,6,7",
0097 "Errata": "HSD56, HSM57",
0098 "EventCode": "0xC1",
0099 "EventName": "OTHER_ASSISTS.SSE_TO_AVX",
0100 "SampleAfterValue": "100003",
0101 "UMask": "0x10"
0102 }
0103 ]
