0001 [
0002 {
0003 "EventName": "bp_l1_btb_correct",
0004 "EventCode": "0x8a",
0005 "BriefDescription": "L1 Branch Prediction Overrides Existing Prediction (speculative)."
0006 },
0007 {
0008 "EventName": "bp_l2_btb_correct",
0009 "EventCode": "0x8b",
0010 "BriefDescription": "L2 Branch Prediction Overrides Existing Prediction (speculative)."
0011 },
0012 {
0013 "EventName": "bp_dyn_ind_pred",
0014 "EventCode": "0x8e",
0015 "BriefDescription": "Dynamic Indirect Predictions.",
0016 "PublicDescription": "The number of times a branch used the indirect predictor to make a prediction."
0017 },
0018 {
0019 "EventName": "bp_de_redirect",
0020 "EventCode": "0x91",
0021 "BriefDescription": "Decode Redirects",
0022 "PublicDescription": "The number of times the instruction decoder overrides the predicted target."
0023 },
0024 {
0025 "EventName": "bp_l1_tlb_fetch_hit",
0026 "EventCode": "0x94",
0027 "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB.",
0028 "UMask": "0xff"
0029 },
0030 {
0031 "EventName": "bp_l1_tlb_fetch_hit.if1g",
0032 "EventCode": "0x94",
0033 "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. L1 Instruction TLB hit (1G page size).",
0034 "UMask": "0x04"
0035 },
0036 {
0037 "EventName": "bp_l1_tlb_fetch_hit.if2m",
0038 "EventCode": "0x94",
0039 "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. L1 Instruction TLB hit (2M page size).",
0040 "UMask": "0x02"
0041 },
0042 {
0043 "EventName": "bp_l1_tlb_fetch_hit.if4k",
0044 "EventCode": "0x94",
0045 "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. L1 Instrcution TLB hit (4K or 16K page size).",
0046 "UMask": "0x01"
0047 },
0048 {
0049 "EventName": "bp_tlb_rel",
0050 "EventCode": "0x99",
0051 "BriefDescription": "The number of ITLB reload requests."
0052 }
0053 ]
