0001 [
0002 {
0003 "EventCode": "0x4c054",
0004 "EventName": "PM_DERAT_MISS_16G",
0005 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16G",
0006 "PublicDescription": ""
0007 },
0008 {
0009 "EventCode": "0x3c054",
0010 "EventName": "PM_DERAT_MISS_16M",
0011 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16M",
0012 "PublicDescription": ""
0013 },
0014 {
0015 "EventCode": "0x1c056",
0016 "EventName": "PM_DERAT_MISS_4K",
0017 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 4K",
0018 "PublicDescription": ""
0019 },
0020 {
0021 "EventCode": "0x2c054",
0022 "EventName": "PM_DERAT_MISS_64K",
0023 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K",
0024 "PublicDescription": ""
0025 },
0026 {
0027 "EventCode": "0x4e048",
0028 "EventName": "PM_DPTEG_FROM_DL2L3_MOD",
0029 "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
0030 "PublicDescription": ""
0031 },
0032 {
0033 "EventCode": "0x3e048",
0034 "EventName": "PM_DPTEG_FROM_DL2L3_SHR",
0035 "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
0036 "PublicDescription": ""
0037 },
0038 {
0039 "EventCode": "0x1e042",
0040 "EventName": "PM_DPTEG_FROM_L2",
0041 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request",
0042 "PublicDescription": ""
0043 },
0044 {
0045 "EventCode": "0x1e04e",
0046 "EventName": "PM_DPTEG_FROM_L2MISS",
0047 "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a data side request",
0048 "PublicDescription": ""
0049 },
0050 {
0051 "EventCode": "0x2e040",
0052 "EventName": "PM_DPTEG_FROM_L2_MEPF",
0053 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request",
0054 "PublicDescription": ""
0055 },
0056 {
0057 "EventCode": "0x1e040",
0058 "EventName": "PM_DPTEG_FROM_L2_NO_CONFLICT",
0059 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request",
0060 "PublicDescription": ""
0061 },
0062 {
0063 "EventCode": "0x4e042",
0064 "EventName": "PM_DPTEG_FROM_L3",
0065 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request",
0066 "PublicDescription": ""
0067 },
0068 {
0069 "EventCode": "0x3e042",
0070 "EventName": "PM_DPTEG_FROM_L3_DISP_CONFLICT",
0071 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request",
0072 "PublicDescription": ""
0073 },
0074 {
0075 "EventCode": "0x2e042",
0076 "EventName": "PM_DPTEG_FROM_L3_MEPF",
0077 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request",
0078 "PublicDescription": ""
0079 },
0080 {
0081 "EventCode": "0x1e044",
0082 "EventName": "PM_DPTEG_FROM_L3_NO_CONFLICT",
0083 "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request",
0084 "PublicDescription": ""
0085 },
0086 {
0087 "EventCode": "0x1e04c",
0088 "EventName": "PM_DPTEG_FROM_LL4",
0089 "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request",
0090 "PublicDescription": ""
0091 },
0092 {
0093 "EventCode": "0x2e048",
0094 "EventName": "PM_DPTEG_FROM_LMEM",
0095 "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request",
0096 "PublicDescription": ""
0097 },
0098 {
0099 "EventCode": "0x2e04c",
0100 "EventName": "PM_DPTEG_FROM_MEMORY",
0101 "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request",
0102 "PublicDescription": ""
0103 },
0104 {
0105 "EventCode": "0x4e04a",
0106 "EventName": "PM_DPTEG_FROM_OFF_CHIP_CACHE",
0107 "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request",
0108 "PublicDescription": ""
0109 },
0110 {
0111 "EventCode": "0x1e048",
0112 "EventName": "PM_DPTEG_FROM_ON_CHIP_CACHE",
0113 "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request",
0114 "PublicDescription": ""
0115 },
0116 {
0117 "EventCode": "0x2e046",
0118 "EventName": "PM_DPTEG_FROM_RL2L3_MOD",
0119 "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
0120 "PublicDescription": ""
0121 },
0122 {
0123 "EventCode": "0x1e04a",
0124 "EventName": "PM_DPTEG_FROM_RL2L3_SHR",
0125 "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
0126 "PublicDescription": ""
0127 },
0128 {
0129 "EventCode": "0x2e04a",
0130 "EventName": "PM_DPTEG_FROM_RL4",
0131 "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request",
0132 "PublicDescription": ""
0133 },
0134 {
0135 "EventCode": "0x300fc",
0136 "EventName": "PM_DTLB_MISS",
0137 "BriefDescription": "Data PTEG reload",
0138 "PublicDescription": "Data PTEG Reloaded (DTLB Miss)"
0139 },
0140 {
0141 "EventCode": "0x1c058",
0142 "EventName": "PM_DTLB_MISS_16G",
0143 "BriefDescription": "Data TLB Miss page size 16G",
0144 "PublicDescription": ""
0145 },
0146 {
0147 "EventCode": "0x4c056",
0148 "EventName": "PM_DTLB_MISS_16M",
0149 "BriefDescription": "Data TLB Miss page size 16M",
0150 "PublicDescription": ""
0151 },
0152 {
0153 "EventCode": "0x2c056",
0154 "EventName": "PM_DTLB_MISS_4K",
0155 "BriefDescription": "Data TLB Miss page size 4k",
0156 "PublicDescription": ""
0157 },
0158 {
0159 "EventCode": "0x3c056",
0160 "EventName": "PM_DTLB_MISS_64K",
0161 "BriefDescription": "Data TLB Miss page size 64K",
0162 "PublicDescription": ""
0163 },
0164 {
0165 "EventCode": "0x200f6",
0166 "EventName": "PM_LSU_DERAT_MISS",
0167 "BriefDescription": "DERAT Reloaded due to a DERAT miss",
0168 "PublicDescription": "DERAT Reloaded (Miss)"
0169 },
0170 {
0171 "EventCode": "0x20066",
0172 "EventName": "PM_TLB_MISS",
0173 "BriefDescription": "TLB Miss (I + D)",
0174 "PublicDescription": ""
0175 }
0176 ]
