0001 [
0002 {
0003 "ArchStdEvent": "SW_INCR"
0004 },
0005 {
0006 "ArchStdEvent": "INST_RETIRED"
0007 },
0008 {
0009 "ArchStdEvent": "EXC_RETURN"
0010 },
0011 {
0012 "ArchStdEvent": "CID_WRITE_RETIRED"
0013 },
0014 {
0015 "ArchStdEvent": "INST_SPEC"
0016 },
0017 {
0018 "ArchStdEvent": "LDREX_SPEC"
0019 },
0020 {
0021 "ArchStdEvent": "STREX_SPEC"
0022 },
0023 {
0024 "ArchStdEvent": "LD_SPEC"
0025 },
0026 {
0027 "ArchStdEvent": "ST_SPEC"
0028 },
0029 {
0030 "ArchStdEvent": "LDST_SPEC"
0031 },
0032 {
0033 "ArchStdEvent": "DP_SPEC"
0034 },
0035 {
0036 "ArchStdEvent": "ASE_SPEC"
0037 },
0038 {
0039 "ArchStdEvent": "VFP_SPEC"
0040 },
0041 {
0042 "ArchStdEvent": "PC_WRITE_SPEC"
0043 },
0044 {
0045 "ArchStdEvent": "CRYPTO_SPEC"
0046 },
0047 {
0048 "ArchStdEvent": "BR_IMMED_SPEC"
0049 },
0050 {
0051 "ArchStdEvent": "BR_RETURN_SPEC"
0052 },
0053 {
0054 "ArchStdEvent": "BR_INDIRECT_SPEC"
0055 },
0056 {
0057 "ArchStdEvent": "ISB_SPEC"
0058 },
0059 {
0060 "ArchStdEvent": "DSB_SPEC"
0061 },
0062 {
0063 "ArchStdEvent": "DMB_SPEC"
0064 },
0065 {
0066 "PublicDescription": "This event counts architecturally executed zero blocking operations due to the 'DC ZVA' instruction.",
0067 "EventCode": "0x9F",
0068 "EventName": "DCZVA_SPEC",
0069 "BriefDescription": "This event counts architecturally executed zero blocking operations due to the 'DC ZVA' instruction."
0070 },
0071 {
0072 "PublicDescription": "This event counts architecturally executed floating-point move operations.",
0073 "EventCode": "0x105",
0074 "EventName": "FP_MV_SPEC",
0075 "BriefDescription": "This event counts architecturally executed floating-point move operations."
0076 },
0077 {
0078 "PublicDescription": "This event counts architecturally executed operations that using predicate register.",
0079 "EventCode": "0x108",
0080 "EventName": "PRD_SPEC",
0081 "BriefDescription": "This event counts architecturally executed operations that using predicate register."
0082 },
0083 {
0084 "PublicDescription": "This event counts architecturally executed inter-element manipulation operations.",
0085 "EventCode": "0x109",
0086 "EventName": "IEL_SPEC",
0087 "BriefDescription": "This event counts architecturally executed inter-element manipulation operations."
0088 },
0089 {
0090 "PublicDescription": "This event counts architecturally executed inter-register manipulation operations.",
0091 "EventCode": "0x10A",
0092 "EventName": "IREG_SPEC",
0093 "BriefDescription": "This event counts architecturally executed inter-register manipulation operations."
0094 },
0095 {
0096 "PublicDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers.",
0097 "EventCode": "0x112",
0098 "EventName": "FP_LD_SPEC",
0099 "BriefDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers."
0100 },
0101 {
0102 "PublicDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers.",
0103 "EventCode": "0x113",
0104 "EventName": "FP_ST_SPEC",
0105 "BriefDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers."
0106 },
0107 {
0108 "PublicDescription": "This event counts architecturally executed SIMD broadcast floating-point load operations.",
0109 "EventCode": "0x11A",
0110 "EventName": "BC_LD_SPEC",
0111 "BriefDescription": "This event counts architecturally executed SIMD broadcast floating-point load operations."
0112 },
0113 {
0114 "PublicDescription": "This event counts architecturally executed instructions, excluding the MOVPRFX instruction.",
0115 "EventCode": "0x121",
0116 "EventName": "EFFECTIVE_INST_SPEC",
0117 "BriefDescription": "This event counts architecturally executed instructions, excluding the MOVPRFX instruction."
0118 },
0119 {
0120 "PublicDescription": "This event counts architecturally executed operations that uses 'pre-index' as its addressing mode.",
0121 "EventCode": "0x123",
0122 "EventName": "PRE_INDEX_SPEC",
0123 "BriefDescription": "This event counts architecturally executed operations that uses 'pre-index' as its addressing mode."
0124 },
0125 {
0126 "PublicDescription": "This event counts architecturally executed operations that uses 'post-index' as its addressing mode.",
0127 "EventCode": "0x124",
0128 "EventName": "POST_INDEX_SPEC",
0129 "BriefDescription": "This event counts architecturally executed operations that uses 'post-index' as its addressing mode."
0130 }
0131 ]
