0001 [
0002 {
0003 "BriefDescription": "ddr cycles event",
0004 "EventCode": "0x00",
0005 "EventName": "imx8mn_ddr.cycles",
0006 "Unit": "imx8_ddr",
0007 "Compat": "i.MX8MN"
0008 },
0009 {
0010 "BriefDescription": "ddr read-cycles event",
0011 "EventCode": "0x2a",
0012 "EventName": "imx8mn_ddr.read_cycles",
0013 "Unit": "imx8_ddr",
0014 "Compat": "i.MX8MN"
0015 },
0016 {
0017 "BriefDescription": "ddr write-cycles event",
0018 "EventCode": "0x2b",
0019 "EventName": "imx8mn_ddr.write_cycles",
0020 "Unit": "imx8_ddr",
0021 "Compat": "i.MX8MN"
0022 },
0023 {
0024 "BriefDescription": "ddr read event",
0025 "EventCode": "0x35",
0026 "EventName": "imx8mn_ddr.read",
0027 "Unit": "imx8_ddr",
0028 "Compat": "i.MX8MN"
0029 },
0030 {
0031 "BriefDescription": "ddr write event",
0032 "EventCode": "0x38",
0033 "EventName": "imx8mn_ddr.write",
0034 "Unit": "imx8_ddr",
0035 "Compat": "i.MX8MN"
0036 }
0037 ]