x86/util/perf_regs.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <errno.h>
0003 #include <string.h>
0004 #include <regex.h>
0005 #include <linux/kernel.h>
0006 #include <linux/zalloc.h>
0007
0008 #include "../../../perf-sys.h"
0009 #include "../../../util/perf_regs.h"
0010 #include "../../../util/debug.h"
0011 #include "../../../util/event.h"
0012 #include "../../../util/pmu.h"
0013 #include "../../../util/pmu-hybrid.h"
0014
0015 const struct sample_reg sample_reg_masks[] = {
0016     SMPL_REG(AX, PERF_REG_X86_AX),
0017     SMPL_REG(BX, PERF_REG_X86_BX),
0018     SMPL_REG(CX, PERF_REG_X86_CX),
0019     SMPL_REG(DX, PERF_REG_X86_DX),
0020     SMPL_REG(SI, PERF_REG_X86_SI),
0021     SMPL_REG(DI, PERF_REG_X86_DI),
0022     SMPL_REG(BP, PERF_REG_X86_BP),
0023     SMPL_REG(SP, PERF_REG_X86_SP),
0024     SMPL_REG(IP, PERF_REG_X86_IP),
0025     SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
0026     SMPL_REG(CS, PERF_REG_X86_CS),
0027     SMPL_REG(SS, PERF_REG_X86_SS),
0028 #ifdef HAVE_ARCH_X86_64_SUPPORT
0029     SMPL_REG(R8, PERF_REG_X86_R8),
0030     SMPL_REG(R9, PERF_REG_X86_R9),
0031     SMPL_REG(R10, PERF_REG_X86_R10),
0032     SMPL_REG(R11, PERF_REG_X86_R11),
0033     SMPL_REG(R12, PERF_REG_X86_R12),
0034     SMPL_REG(R13, PERF_REG_X86_R13),
0035     SMPL_REG(R14, PERF_REG_X86_R14),
0036     SMPL_REG(R15, PERF_REG_X86_R15),
0037 #endif
0038     SMPL_REG2(XMM0, PERF_REG_X86_XMM0),
0039     SMPL_REG2(XMM1, PERF_REG_X86_XMM1),
0040     SMPL_REG2(XMM2, PERF_REG_X86_XMM2),
0041     SMPL_REG2(XMM3, PERF_REG_X86_XMM3),
0042     SMPL_REG2(XMM4, PERF_REG_X86_XMM4),
0043     SMPL_REG2(XMM5, PERF_REG_X86_XMM5),
0044     SMPL_REG2(XMM6, PERF_REG_X86_XMM6),
0045     SMPL_REG2(XMM7, PERF_REG_X86_XMM7),
0046     SMPL_REG2(XMM8, PERF_REG_X86_XMM8),
0047     SMPL_REG2(XMM9, PERF_REG_X86_XMM9),
0048     SMPL_REG2(XMM10, PERF_REG_X86_XMM10),
0049     SMPL_REG2(XMM11, PERF_REG_X86_XMM11),
0050     SMPL_REG2(XMM12, PERF_REG_X86_XMM12),
0051     SMPL_REG2(XMM13, PERF_REG_X86_XMM13),
0052     SMPL_REG2(XMM14, PERF_REG_X86_XMM14),
0053     SMPL_REG2(XMM15, PERF_REG_X86_XMM15),
0054     SMPL_REG_END
0055 };
0056
0057 struct sdt_name_reg {
0058     const char *sdt_name;
0059     const char *uprobe_name;
0060 };
0061 #define SDT_NAME_REG(n, m) {.sdt_name = "%" #n, .uprobe_name = "%" #m}
0062 #define SDT_NAME_REG_END {.sdt_name = NULL, .uprobe_name = NULL}
0063
0064 static const struct sdt_name_reg sdt_reg_tbl[] = {
0065     SDT_NAME_REG(eax, ax),
0066     SDT_NAME_REG(rax, ax),
0067     SDT_NAME_REG(al,  ax),
0068     SDT_NAME_REG(ah,  ax),
0069     SDT_NAME_REG(ebx, bx),
0070     SDT_NAME_REG(rbx, bx),
0071     SDT_NAME_REG(bl,  bx),
0072     SDT_NAME_REG(bh,  bx),
0073     SDT_NAME_REG(ecx, cx),
0074     SDT_NAME_REG(rcx, cx),
0075     SDT_NAME_REG(cl,  cx),
0076     SDT_NAME_REG(ch,  cx),
0077     SDT_NAME_REG(edx, dx),
0078     SDT_NAME_REG(rdx, dx),
0079     SDT_NAME_REG(dl,  dx),
0080     SDT_NAME_REG(dh,  dx),
0081     SDT_NAME_REG(esi, si),
0082     SDT_NAME_REG(rsi, si),
0083     SDT_NAME_REG(sil, si),
0084     SDT_NAME_REG(edi, di),
0085     SDT_NAME_REG(rdi, di),
0086     SDT_NAME_REG(dil, di),
0087     SDT_NAME_REG(ebp, bp),
0088     SDT_NAME_REG(rbp, bp),
0089     SDT_NAME_REG(bpl, bp),
0090     SDT_NAME_REG(rsp, sp),
0091     SDT_NAME_REG(esp, sp),
0092     SDT_NAME_REG(spl, sp),
0093
0094     /* rNN registers */
0095     SDT_NAME_REG(r8b,  r8),
0096     SDT_NAME_REG(r8w,  r8),
0097     SDT_NAME_REG(r8d,  r8),
0098     SDT_NAME_REG(r9b,  r9),
0099     SDT_NAME_REG(r9w,  r9),
0100     SDT_NAME_REG(r9d,  r9),
0101     SDT_NAME_REG(r10b, r10),
0102     SDT_NAME_REG(r10w, r10),
0103     SDT_NAME_REG(r10d, r10),
0104     SDT_NAME_REG(r11b, r11),
0105     SDT_NAME_REG(r11w, r11),
0106     SDT_NAME_REG(r11d, r11),
0107     SDT_NAME_REG(r12b, r12),
0108     SDT_NAME_REG(r12w, r12),
0109     SDT_NAME_REG(r12d, r12),
0110     SDT_NAME_REG(r13b, r13),
0111     SDT_NAME_REG(r13w, r13),
0112     SDT_NAME_REG(r13d, r13),
0113     SDT_NAME_REG(r14b, r14),
0114     SDT_NAME_REG(r14w, r14),
0115     SDT_NAME_REG(r14d, r14),
0116     SDT_NAME_REG(r15b, r15),
0117     SDT_NAME_REG(r15w, r15),
0118     SDT_NAME_REG(r15d, r15),
0119     SDT_NAME_REG_END,
0120 };
0121
0122 /*
0123  * Perf only supports OP which is in  +/-NUM(REG)  form.
0124  * Here plus-minus sign, NUM and parenthesis are optional,
0125  * only REG is mandatory.
0126  *
0127  * SDT events also supports indirect addressing mode with a
0128  * symbol as offset, scaled mode and constants in OP. But
0129  * perf does not support them yet. Below are few examples.
0130  *
0131  * OP with scaled mode:
0132  *     (%rax,%rsi,8)
0133  *     10(%ras,%rsi,8)
0134  *
0135  * OP with indirect addressing mode:
0136  *     check_action(%rip)
0137  *     mp_+52(%rip)
0138  *     44+mp_(%rip)
0139  *
0140  * OP with constant values:
0141  *     $0
0142  *     $123
0143  *     $-1
0144  */
0145 #define SDT_OP_REGEX  "^([+\\-]?)([0-9]*)(\\(?)(%[a-z][a-z0-9]+)(\\)?)$"
0146
0147 static regex_t sdt_op_regex;
0148
0149 static int sdt_init_op_regex(void)
0150 {
0151     static int initialized;
0152     int ret = 0;
0153
0154     if (initialized)
0155         return 0;
0156
0157     ret = regcomp(&sdt_op_regex, SDT_OP_REGEX, REG_EXTENDED);
0158     if (ret < 0) {
0159         pr_debug4("Regex compilation error.\n");
0160         return ret;
0161     }
0162
0163     initialized = 1;
0164     return 0;
0165 }
0166
0167 /*
0168  * Max x86 register name length is 5(ex: %r15d). So, 6th char
0169  * should always contain NULL. This helps to find register name
0170  * length using strlen, instead of maintaining one more variable.
0171  */
0172 #define SDT_REG_NAME_SIZE  6
0173
0174 /*
0175  * The uprobe parser does not support all gas register names;
0176  * so, we have to replace them (ex. for x86_64: %rax -> %ax).
0177  * Note: If register does not require renaming, just copy
0178  * paste as it is, but don't leave it empty.
0179  */
0180 static void sdt_rename_register(char *sdt_reg, int sdt_len, char *uprobe_reg)
0181 {
0182     int i = 0;
0183
0184     for (i = 0; sdt_reg_tbl[i].sdt_name != NULL; i++) {
0185         if (!strncmp(sdt_reg_tbl[i].sdt_name, sdt_reg, sdt_len)) {
0186             strcpy(uprobe_reg, sdt_reg_tbl[i].uprobe_name);
0187             return;
0188         }
0189     }
0190
0191     strncpy(uprobe_reg, sdt_reg, sdt_len);
0192 }
0193
0194 int arch_sdt_arg_parse_op(char *old_op, char **new_op)
0195 {
0196     char new_reg[SDT_REG_NAME_SIZE] = {0};
0197     int new_len = 0, ret;
0198     /*
0199      * rm[0]:  +/-NUM(REG)
0200      * rm[1]:  +/-
0201      * rm[2]:  NUM
0202      * rm[3]:  (
0203      * rm[4]:  REG
0204      * rm[5]:  )
0205      */
0206     regmatch_t rm[6];
0207     /*
0208      * Max prefix length is 2 as it may contains sign(+/-)
0209      * and displacement 0 (Both sign and displacement 0 are
0210      * optional so it may be empty). Use one more character
0211      * to hold last NULL so that strlen can be used to find
0212      * prefix length, instead of maintaining one more variable.
0213      */
0214     char prefix[3] = {0};
0215
0216     ret = sdt_init_op_regex();
0217     if (ret < 0)
0218         return ret;
0219
0220     /*
0221      * If unsupported OR does not match with regex OR
0222      * register name too long, skip it.
0223      */
0224     if (strchr(old_op, ',') || strchr(old_op, '$') ||
0225         regexec(&sdt_op_regex, old_op, 6, rm, 0)   ||
0226         rm[4].rm_eo - rm[4].rm_so > SDT_REG_NAME_SIZE) {
0227         pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
0228         return SDT_ARG_SKIP;
0229     }
0230
0231     /*
0232      * Prepare prefix.
0233      * If SDT OP has parenthesis but does not provide
0234      * displacement, add 0 for displacement.
0235      *     SDT         Uprobe     Prefix
0236      *     -----------------------------
0237      *     +24(%rdi)   +24(%di)   +
0238      *     24(%rdi)    +24(%di)   +
0239      *     %rdi        %di
0240      *     (%rdi)      +0(%di)    +0
0241      *     -80(%rbx)   -80(%bx)   -
0242      */
0243     if (rm[3].rm_so != rm[3].rm_eo) {
0244         if (rm[1].rm_so != rm[1].rm_eo)
0245             prefix[0] = *(old_op + rm[1].rm_so);
0246         else if (rm[2].rm_so != rm[2].rm_eo)
0247             prefix[0] = '+';
0248         else
0249             scnprintf(prefix, sizeof(prefix), "+0");
0250     }
0251
0252     /* Rename register */
0253     sdt_rename_register(old_op + rm[4].rm_so, rm[4].rm_eo - rm[4].rm_so,
0254                 new_reg);
0255
0256     /* Prepare final OP which should be valid for uprobe_events */
0257     new_len = strlen(prefix)              +
0258           (rm[2].rm_eo - rm[2].rm_so) +
0259           (rm[3].rm_eo - rm[3].rm_so) +
0260           strlen(new_reg)             +
0261           (rm[5].rm_eo - rm[5].rm_so) +
0262           1;                    /* NULL */
0263
0264     *new_op = zalloc(new_len);
0265     if (!*new_op)
0266         return -ENOMEM;
0267
0268     scnprintf(*new_op, new_len, "%.*s%.*s%.*s%.*s%.*s",
0269           strlen(prefix), prefix,
0270           (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
0271           (int)(rm[3].rm_eo - rm[3].rm_so), old_op + rm[3].rm_so,
0272           strlen(new_reg), new_reg,
0273           (int)(rm[5].rm_eo - rm[5].rm_so), old_op + rm[5].rm_so);
0274
0275     return SDT_ARG_VALID;
0276 }
0277
0278 uint64_t arch__intr_reg_mask(void)
0279 {
0280     struct perf_event_attr attr = {
0281         .type           = PERF_TYPE_HARDWARE,
0282         .config         = PERF_COUNT_HW_CPU_CYCLES,
0283         .sample_type        = PERF_SAMPLE_REGS_INTR,
0284         .sample_regs_intr   = PERF_REG_EXTENDED_MASK,
0285         .precise_ip     = 1,
0286         .disabled       = 1,
0287         .exclude_kernel     = 1,
0288     };
0289     struct perf_pmu *pmu;
0290     int fd;
0291     /*
0292      * In an unnamed union, init it here to build on older gcc versions
0293      */
0294     attr.sample_period = 1;
0295
0296     if (perf_pmu__has_hybrid()) {
0297         /*
0298          * The same register set is supported among different hybrid PMUs.
0299          * Only check the first available one.
0300          */
0301         pmu = list_first_entry(&perf_pmu__hybrid_pmus, typeof(*pmu), hybrid_list);
0302         attr.config |= (__u64)pmu->type << PERF_PMU_TYPE_SHIFT;
0303     }
0304
0305     event_attr_init(&attr);
0306
0307     fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
0308     if (fd != -1) {
0309         close(fd);
0310         return (PERF_REG_EXTENDED_MASK | PERF_REGS_MASK);
0311     }
0312
0313     return PERF_REGS_MASK;
0314 }