x86/tests/intel-pt-pkt-decoder-test.c

0001 // SPDX-License-Identifier: GPL-2.0
0002
0003 #include <string.h>
0004
0005 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
0006
0007 #include "debug.h"
0008 #include "tests/tests.h"
0009 #include "arch-tests.h"
0010
0011 /**
0012  * struct test_data - Test data.
0013  * @len: number of bytes to decode
0014  * @bytes: bytes to decode
0015  * @ctx: packet context to decode
0016  * @packet: expected packet
0017  * @new_ctx: expected new packet context
0018  * @ctx_unchanged: the packet context must not change
0019  */
0020 static struct test_data {
0021     int len;
0022     u8 bytes[INTEL_PT_PKT_MAX_SZ];
0023     enum intel_pt_pkt_ctx ctx;
0024     struct intel_pt_pkt packet;
0025     enum intel_pt_pkt_ctx new_ctx;
0026     int ctx_unchanged;
0027 } data[] = {
0028     /* Padding Packet */
0029     {1, {0}, 0, {INTEL_PT_PAD, 0, 0}, 0, 1 },
0030     /* Short Taken/Not Taken Packet */
0031     {1, {4}, 0, {INTEL_PT_TNT, 1, 0}, 0, 0 },
0032     {1, {6}, 0, {INTEL_PT_TNT, 1, 0x20ULL << 58}, 0, 0 },
0033     {1, {0x80}, 0, {INTEL_PT_TNT, 6, 0}, 0, 0 },
0034     {1, {0xfe}, 0, {INTEL_PT_TNT, 6, 0x3fULL << 58}, 0, 0 },
0035     /* Long Taken/Not Taken Packet */
0036     {8, {0x02, 0xa3, 2}, 0, {INTEL_PT_TNT, 1, 0xa302ULL << 47}, 0, 0 },
0037     {8, {0x02, 0xa3, 3}, 0, {INTEL_PT_TNT, 1, 0x1a302ULL << 47}, 0, 0 },
0038     {8, {0x02, 0xa3, 0, 0, 0, 0, 0, 0x80}, 0, {INTEL_PT_TNT, 47, 0xa302ULL << 1}, 0, 0 },
0039     {8, {0x02, 0xa3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, 0, {INTEL_PT_TNT, 47, 0xffffffffffffa302ULL << 1}, 0, 0 },
0040     /* Target IP Packet */
0041     {1, {0x0d}, 0, {INTEL_PT_TIP, 0, 0}, 0, 0 },
0042     {3, {0x2d, 1, 2}, 0, {INTEL_PT_TIP, 1, 0x201}, 0, 0 },
0043     {5, {0x4d, 1, 2, 3, 4}, 0, {INTEL_PT_TIP, 2, 0x4030201}, 0, 0 },
0044     {7, {0x6d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP, 3, 0x60504030201}, 0, 0 },
0045     {7, {0x8d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP, 4, 0x60504030201}, 0, 0 },
0046     {9, {0xcd, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_TIP, 6, 0x807060504030201}, 0, 0 },
0047     /* Packet Generation Enable */
0048     {1, {0x11}, 0, {INTEL_PT_TIP_PGE, 0, 0}, 0, 0 },
0049     {3, {0x31, 1, 2}, 0, {INTEL_PT_TIP_PGE, 1, 0x201}, 0, 0 },
0050     {5, {0x51, 1, 2, 3, 4}, 0, {INTEL_PT_TIP_PGE, 2, 0x4030201}, 0, 0 },
0051     {7, {0x71, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGE, 3, 0x60504030201}, 0, 0 },
0052     {7, {0x91, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGE, 4, 0x60504030201}, 0, 0 },
0053     {9, {0xd1, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_TIP_PGE, 6, 0x807060504030201}, 0, 0 },
0054     /* Packet Generation Disable */
0055     {1, {0x01}, 0, {INTEL_PT_TIP_PGD, 0, 0}, 0, 0 },
0056     {3, {0x21, 1, 2}, 0, {INTEL_PT_TIP_PGD, 1, 0x201}, 0, 0 },
0057     {5, {0x41, 1, 2, 3, 4}, 0, {INTEL_PT_TIP_PGD, 2, 0x4030201}, 0, 0 },
0058     {7, {0x61, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGD, 3, 0x60504030201}, 0, 0 },
0059     {7, {0x81, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGD, 4, 0x60504030201}, 0, 0 },
0060     {9, {0xc1, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_TIP_PGD, 6, 0x807060504030201}, 0, 0 },
0061     /* Flow Update Packet */
0062     {1, {0x1d}, 0, {INTEL_PT_FUP, 0, 0}, 0, 0 },
0063     {3, {0x3d, 1, 2}, 0, {INTEL_PT_FUP, 1, 0x201}, 0, 0 },
0064     {5, {0x5d, 1, 2, 3, 4}, 0, {INTEL_PT_FUP, 2, 0x4030201}, 0, 0 },
0065     {7, {0x7d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_FUP, 3, 0x60504030201}, 0, 0 },
0066     {7, {0x9d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_FUP, 4, 0x60504030201}, 0, 0 },
0067     {9, {0xdd, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_FUP, 6, 0x807060504030201}, 0, 0 },
0068     /* Paging Information Packet */
0069     {8, {0x02, 0x43, 2, 4, 6, 8, 10, 12}, 0, {INTEL_PT_PIP, 0, 0xC0A08060402}, 0, 0 },
0070     {8, {0x02, 0x43, 3, 4, 6, 8, 10, 12}, 0, {INTEL_PT_PIP, 0, 0xC0A08060403}, 0, 0 },
0071     /* Mode Exec Packet */
0072     {2, {0x99, 0x00}, 0, {INTEL_PT_MODE_EXEC, 0, 16}, 0, 0 },
0073     {2, {0x99, 0x01}, 0, {INTEL_PT_MODE_EXEC, 1, 64}, 0, 0 },
0074     {2, {0x99, 0x02}, 0, {INTEL_PT_MODE_EXEC, 2, 32}, 0, 0 },
0075     {2, {0x99, 0x04}, 0, {INTEL_PT_MODE_EXEC, 4, 16}, 0, 0 },
0076     {2, {0x99, 0x05}, 0, {INTEL_PT_MODE_EXEC, 5, 64}, 0, 0 },
0077     {2, {0x99, 0x06}, 0, {INTEL_PT_MODE_EXEC, 6, 32}, 0, 0 },
0078     /* Mode TSX Packet */
0079     {2, {0x99, 0x20}, 0, {INTEL_PT_MODE_TSX, 0, 0}, 0, 0 },
0080     {2, {0x99, 0x21}, 0, {INTEL_PT_MODE_TSX, 0, 1}, 0, 0 },
0081     {2, {0x99, 0x22}, 0, {INTEL_PT_MODE_TSX, 0, 2}, 0, 0 },
0082     /* Trace Stop Packet */
0083     {2, {0x02, 0x83}, 0, {INTEL_PT_TRACESTOP, 0, 0}, 0, 0 },
0084     /* Core:Bus Ratio Packet */
0085     {4, {0x02, 0x03, 0x12, 0}, 0, {INTEL_PT_CBR, 0, 0x12}, 0, 1 },
0086     /* Timestamp Counter Packet */
0087     {8, {0x19, 1, 2, 3, 4, 5, 6, 7}, 0, {INTEL_PT_TSC, 0, 0x7060504030201}, 0, 1 },
0088     /* Mini Time Counter Packet */
0089     {2, {0x59, 0x12}, 0, {INTEL_PT_MTC, 0, 0x12}, 0, 1 },
0090     /* TSC / MTC Alignment Packet */
0091     {7, {0x02, 0x73}, 0, {INTEL_PT_TMA, 0, 0}, 0, 1 },
0092     {7, {0x02, 0x73, 1, 2}, 0, {INTEL_PT_TMA, 0, 0x201}, 0, 1 },
0093     {7, {0x02, 0x73, 0, 0, 0, 0xff, 1}, 0, {INTEL_PT_TMA, 0x1ff, 0}, 0, 1 },
0094     {7, {0x02, 0x73, 0x80, 0xc0, 0, 0xff, 1}, 0, {INTEL_PT_TMA, 0x1ff, 0xc080}, 0, 1 },
0095     /* Cycle Count Packet */
0096     {1, {0x03}, 0, {INTEL_PT_CYC, 0, 0}, 0, 1 },
0097     {1, {0x0b}, 0, {INTEL_PT_CYC, 0, 1}, 0, 1 },
0098     {1, {0xfb}, 0, {INTEL_PT_CYC, 0, 0x1f}, 0, 1 },
0099     {2, {0x07, 2}, 0, {INTEL_PT_CYC, 0, 0x20}, 0, 1 },
0100     {2, {0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0xfff}, 0, 1 },
0101     {3, {0x07, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x1000}, 0, 1 },
0102     {3, {0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x7ffff}, 0, 1 },
0103     {4, {0x07, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x80000}, 0, 1 },
0104     {4, {0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x3ffffff}, 0, 1 },
0105     {5, {0x07, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x4000000}, 0, 1 },
0106     {5, {0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x1ffffffff}, 0, 1 },
0107     {6, {0x07, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x200000000}, 0, 1 },
0108     {6, {0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0xffffffffff}, 0, 1 },
0109     {7, {0x07, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x10000000000}, 0, 1 },
0110     {7, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x7fffffffffff}, 0, 1 },
0111     {8, {0x07, 1, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x800000000000}, 0, 1 },
0112     {8, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x3fffffffffffff}, 0, 1 },
0113     {9, {0x07, 1, 1, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x40000000000000}, 0, 1 },
0114     {9, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x1fffffffffffffff}, 0, 1 },
0115     {10, {0x07, 1, 1, 1, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x2000000000000000}, 0, 1 },
0116     {10, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe}, 0, {INTEL_PT_CYC, 0, 0xffffffffffffffff}, 0, 1 },
0117     /* Virtual-Machine Control Structure Packet */
0118     {7, {0x02, 0xc8, 1, 2, 3, 4, 5}, 0, {INTEL_PT_VMCS, 5, 0x504030201}, 0, 0 },
0119     /* Overflow Packet */
0120     {2, {0x02, 0xf3}, 0, {INTEL_PT_OVF, 0, 0}, 0, 0 },
0121     {2, {0x02, 0xf3}, INTEL_PT_BLK_4_CTX, {INTEL_PT_OVF, 0, 0}, 0, 0 },
0122     {2, {0x02, 0xf3}, INTEL_PT_BLK_8_CTX, {INTEL_PT_OVF, 0, 0}, 0, 0 },
0123     /* Packet Stream Boundary*/
0124     {16, {0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82}, 0, {INTEL_PT_PSB, 0, 0}, 0, 0 },
0125     {16, {0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82}, INTEL_PT_BLK_4_CTX, {INTEL_PT_PSB, 0, 0}, 0, 0 },
0126     {16, {0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82}, INTEL_PT_BLK_8_CTX, {INTEL_PT_PSB, 0, 0}, 0, 0 },
0127     /* PSB End Packet */
0128     {2, {0x02, 0x23}, 0, {INTEL_PT_PSBEND, 0, 0}, 0, 0 },
0129     /* Maintenance Packet */
0130     {11, {0x02, 0xc3, 0x88, 1, 2, 3, 4, 5, 6, 7}, 0, {INTEL_PT_MNT, 0, 0x7060504030201}, 0, 1 },
0131     /* Write Data to PT Packet */
0132     {6, {0x02, 0x12, 1, 2, 3, 4}, 0, {INTEL_PT_PTWRITE, 0, 0x4030201}, 0, 0 },
0133     {10, {0x02, 0x32, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_PTWRITE, 1, 0x807060504030201}, 0, 0 },
0134     {6, {0x02, 0x92, 1, 2, 3, 4}, 0, {INTEL_PT_PTWRITE_IP, 0, 0x4030201}, 0, 0 },
0135     {10, {0x02, 0xb2, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_PTWRITE_IP, 1, 0x807060504030201}, 0, 0 },
0136     /* Execution Stop Packet */
0137     {2, {0x02, 0x62}, 0, {INTEL_PT_EXSTOP, 0, 0}, 0, 1 },
0138     {2, {0x02, 0xe2}, 0, {INTEL_PT_EXSTOP_IP, 0, 0}, 0, 1 },
0139     /* Monitor Wait Packet */
0140     {10, {0x02, 0xc2}, 0, {INTEL_PT_MWAIT, 0, 0}, 0, 0 },
0141     {10, {0x02, 0xc2, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_MWAIT, 0, 0x807060504030201}, 0, 0 },
0142     {10, {0x02, 0xc2, 0xff, 2, 3, 4, 7, 6, 7, 8}, 0, {INTEL_PT_MWAIT, 0, 0x8070607040302ff}, 0, 0 },
0143     /* Power Entry Packet */
0144     {4, {0x02, 0x22}, 0, {INTEL_PT_PWRE, 0, 0}, 0, 1 },
0145     {4, {0x02, 0x22, 1, 2}, 0, {INTEL_PT_PWRE, 0, 0x0201}, 0, 1 },
0146     {4, {0x02, 0x22, 0x80, 0x34}, 0, {INTEL_PT_PWRE, 0, 0x3480}, 0, 1 },
0147     {4, {0x02, 0x22, 0x00, 0x56}, 0, {INTEL_PT_PWRE, 0, 0x5600}, 0, 1 },
0148     /* Power Exit Packet */
0149     {7, {0x02, 0xa2}, 0, {INTEL_PT_PWRX, 0, 0}, 0, 1 },
0150     {7, {0x02, 0xa2, 1, 2, 3, 4, 5}, 0, {INTEL_PT_PWRX, 0, 0x504030201}, 0, 1 },
0151     {7, {0x02, 0xa2, 0xff, 0xff, 0xff, 0xff, 0xff}, 0, {INTEL_PT_PWRX, 0, 0xffffffffff}, 0, 1 },
0152     /* Block Begin Packet */
0153     {3, {0x02, 0x63, 0x00}, 0, {INTEL_PT_BBP, 0, 0}, INTEL_PT_BLK_8_CTX, 0 },
0154     {3, {0x02, 0x63, 0x80}, 0, {INTEL_PT_BBP, 1, 0}, INTEL_PT_BLK_4_CTX, 0 },
0155     {3, {0x02, 0x63, 0x1f}, 0, {INTEL_PT_BBP, 0, 0x1f}, INTEL_PT_BLK_8_CTX, 0 },
0156     {3, {0x02, 0x63, 0x9f}, 0, {INTEL_PT_BBP, 1, 0x1f}, INTEL_PT_BLK_4_CTX, 0 },
0157     /* 4-byte Block Item Packet */
0158     {5, {0x04}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0, 0}, INTEL_PT_BLK_4_CTX, 0 },
0159     {5, {0xfc}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0x1f, 0}, INTEL_PT_BLK_4_CTX, 0 },
0160     {5, {0x04, 1, 2, 3, 4}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0, 0x04030201}, INTEL_PT_BLK_4_CTX, 0 },
0161     {5, {0xfc, 1, 2, 3, 4}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0x1f, 0x04030201}, INTEL_PT_BLK_4_CTX, 0 },
0162     /* 8-byte Block Item Packet */
0163     {9, {0x04}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0, 0}, INTEL_PT_BLK_8_CTX, 0 },
0164     {9, {0xfc}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0x1f, 0}, INTEL_PT_BLK_8_CTX, 0 },
0165     {9, {0x04, 1, 2, 3, 4, 5, 6, 7, 8}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0, 0x0807060504030201}, INTEL_PT_BLK_8_CTX, 0 },
0166     {9, {0xfc, 1, 2, 3, 4, 5, 6, 7, 8}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0x1f, 0x0807060504030201}, INTEL_PT_BLK_8_CTX, 0 },
0167     /* Block End Packet */
0168     {2, {0x02, 0x33}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BEP, 0, 0}, 0, 0 },
0169     {2, {0x02, 0xb3}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BEP_IP, 0, 0}, 0, 0 },
0170     {2, {0x02, 0x33}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BEP, 0, 0}, 0, 0 },
0171     {2, {0x02, 0xb3}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BEP_IP, 0, 0}, 0, 0 },
0172     /* Control Flow Event Packet */
0173     {4, {0x02, 0x13, 0x01, 0x03}, 0, {INTEL_PT_CFE, 1, 3}, 0, 0 },
0174     {4, {0x02, 0x13, 0x81, 0x03}, 0, {INTEL_PT_CFE_IP, 1, 3}, 0, 0 },
0175     {4, {0x02, 0x13, 0x1f, 0x00}, 0, {INTEL_PT_CFE, 0x1f, 0}, 0, 0 },
0176     {4, {0x02, 0x13, 0x9f, 0xff}, 0, {INTEL_PT_CFE_IP, 0x1f, 0xff}, 0, 0 },
0177     /*  */
0178     {11, {0x02, 0x53, 0x09, 1, 2, 3, 4, 5, 6, 7}, 0, {INTEL_PT_EVD, 0x09, 0x7060504030201}, 0, 0 },
0179     {11, {0x02, 0x53, 0x3f, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_EVD, 0x3f, 0x8070605040302}, 0, 0 },
0180     /* Terminator */
0181     {0, {0}, 0, {0, 0, 0}, 0, 0 },
0182 };
0183
0184 static int dump_packet(struct intel_pt_pkt *packet, u8 *bytes, int len)
0185 {
0186     char desc[INTEL_PT_PKT_DESC_MAX];
0187     int ret, i;
0188
0189     for (i = 0; i < len; i++)
0190         pr_debug(" %02x", bytes[i]);
0191     for (; i < INTEL_PT_PKT_MAX_SZ; i++)
0192         pr_debug("   ");
0193     pr_debug("   ");
0194     ret = intel_pt_pkt_desc(packet, desc, INTEL_PT_PKT_DESC_MAX);
0195     if (ret < 0) {
0196         pr_debug("intel_pt_pkt_desc failed!\n");
0197         return TEST_FAIL;
0198     }
0199     pr_debug("%s\n", desc);
0200
0201     return TEST_OK;
0202 }
0203
0204 static void decoding_failed(struct test_data *d)
0205 {
0206     pr_debug("Decoding failed!\n");
0207     pr_debug("Decoding:  ");
0208     dump_packet(&d->packet, d->bytes, d->len);
0209 }
0210
0211 static int fail(struct test_data *d, struct intel_pt_pkt *packet, int len,
0212         enum intel_pt_pkt_ctx new_ctx)
0213 {
0214     decoding_failed(d);
0215
0216     if (len != d->len)
0217         pr_debug("Expected length: %d   Decoded length %d\n",
0218              d->len, len);
0219
0220     if (packet->type != d->packet.type)
0221         pr_debug("Expected type: %d   Decoded type %d\n",
0222              d->packet.type, packet->type);
0223
0224     if (packet->count != d->packet.count)
0225         pr_debug("Expected count: %d   Decoded count %d\n",
0226              d->packet.count, packet->count);
0227
0228     if (packet->payload != d->packet.payload)
0229         pr_debug("Expected payload: 0x%llx   Decoded payload 0x%llx\n",
0230              (unsigned long long)d->packet.payload,
0231              (unsigned long long)packet->payload);
0232
0233     if (new_ctx != d->new_ctx)
0234         pr_debug("Expected packet context: %d   Decoded packet context %d\n",
0235              d->new_ctx, new_ctx);
0236
0237     return TEST_FAIL;
0238 }
0239
0240 static int test_ctx_unchanged(struct test_data *d, struct intel_pt_pkt *packet,
0241                   enum intel_pt_pkt_ctx ctx)
0242 {
0243     enum intel_pt_pkt_ctx old_ctx = ctx;
0244
0245     intel_pt_upd_pkt_ctx(packet, &ctx);
0246
0247     if (ctx != old_ctx) {
0248         decoding_failed(d);
0249         pr_debug("Packet context changed!\n");
0250         return TEST_FAIL;
0251     }
0252
0253     return TEST_OK;
0254 }
0255
0256 static int test_one(struct test_data *d)
0257 {
0258     struct intel_pt_pkt packet;
0259     enum intel_pt_pkt_ctx ctx = d->ctx;
0260     int ret;
0261
0262     memset(&packet, 0xff, sizeof(packet));
0263
0264     /* Decode a packet */
0265     ret = intel_pt_get_packet(d->bytes, d->len, &packet, &ctx);
0266     if (ret < 0 || ret > INTEL_PT_PKT_MAX_SZ) {
0267         decoding_failed(d);
0268         pr_debug("intel_pt_get_packet returned %d\n", ret);
0269         return TEST_FAIL;
0270     }
0271
0272     /* Some packets must always leave the packet context unchanged */
0273     if (d->ctx_unchanged) {
0274         int err;
0275
0276         err = test_ctx_unchanged(d, &packet, INTEL_PT_NO_CTX);
0277         if (err)
0278             return err;
0279         err = test_ctx_unchanged(d, &packet, INTEL_PT_BLK_4_CTX);
0280         if (err)
0281             return err;
0282         err = test_ctx_unchanged(d, &packet, INTEL_PT_BLK_8_CTX);
0283         if (err)
0284             return err;
0285     }
0286
0287     /* Compare to the expected values */
0288     if (ret != d->len || packet.type != d->packet.type ||
0289         packet.count != d->packet.count ||
0290         packet.payload != d->packet.payload || ctx != d->new_ctx)
0291         return fail(d, &packet, ret, ctx);
0292
0293     pr_debug("Decoded ok:");
0294     ret = dump_packet(&d->packet, d->bytes, d->len);
0295
0296     return ret;
0297 }
0298
0299 /*
0300  * This test feeds byte sequences to the Intel PT packet decoder and checks the
0301  * results. Changes to the packet context are also checked.
0302  */
0303 int test__intel_pt_pkt_decoder(struct test_suite *test __maybe_unused, int subtest __maybe_unused)
0304 {
0305     struct test_data *d = data;
0306     int ret;
0307
0308     for (d = data; d->len; d++) {
0309         ret = test_one(d);
0310         if (ret)
0311             return ret;
0312     }
0313
0314     return TEST_OK;
0315 }