arm/tests/regs_load.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <linux/linkage.h>
0003
0004 #define R0 0x00
0005 #define R1 0x08
0006 #define R2 0x10
0007 #define R3 0x18
0008 #define R4 0x20
0009 #define R5 0x28
0010 #define R6 0x30
0011 #define R7 0x38
0012 #define R8 0x40
0013 #define R9 0x48
0014 #define SL 0x50
0015 #define FP 0x58
0016 #define IP 0x60
0017 #define SP 0x68
0018 #define LR 0x70
0019 #define PC 0x78
0020
0021 /*
0022  * Implementation of void perf_regs_load(u64 *regs);
0023  *
0024  * This functions fills in the 'regs' buffer from the actual registers values,
0025  * in the way the perf built-in unwinding test expects them:
0026  * - the PC at the time at the call to this function. Since this function
0027  *   is called using a bl instruction, the PC value is taken from LR.
0028  * The built-in unwinding test then unwinds the call stack from the dwarf
0029  * information in unwind__get_entries.
0030  *
0031  * Notes:
0032  * - the 8 bytes stride in the registers offsets comes from the fact
0033  * that the registers are stored in an u64 array (u64 *regs),
0034  * - the regs buffer needs to be zeroed before the call to this function,
0035  * in this case using a calloc in dwarf-unwind.c.
0036  */
0037
0038 .text
0039 .type perf_regs_load,%function
0040 SYM_FUNC_START(perf_regs_load)
0041     str r0, [r0, #R0]
0042     str r1, [r0, #R1]
0043     str r2, [r0, #R2]
0044     str r3, [r0, #R3]
0045     str r4, [r0, #R4]
0046     str r5, [r0, #R5]
0047     str r6, [r0, #R6]
0048     str r7, [r0, #R7]
0049     str r8, [r0, #R8]
0050     str r9, [r0, #R9]
0051     str sl, [r0, #SL]
0052     str fp, [r0, #FP]
0053     str ip, [r0, #IP]
0054     str sp, [r0, #SP]
0055     str lr, [r0, #LR]
0056     str lr, [r0, #PC]   // store pc as lr in order to skip the call
0057                             //  to this function
0058     mov pc, lr
0059 SYM_FUNC_END(perf_regs_load)