0001
0002
0003
0004
0005
0006
0007 #ifndef _NOLIBC_ARCH_X86_64_H
0008 #define _NOLIBC_ARCH_X86_64_H
0009
0010
0011 #define O_RDONLY 0
0012 #define O_WRONLY 1
0013 #define O_RDWR 2
0014 #define O_CREAT 0x40
0015 #define O_EXCL 0x80
0016 #define O_NOCTTY 0x100
0017 #define O_TRUNC 0x200
0018 #define O_APPEND 0x400
0019 #define O_NONBLOCK 0x800
0020 #define O_DIRECTORY 0x10000
0021
0022
0023
0024
0025 struct sys_stat_struct {
0026 unsigned long st_dev;
0027 unsigned long st_ino;
0028 unsigned long st_nlink;
0029 unsigned int st_mode;
0030 unsigned int st_uid;
0031
0032 unsigned int st_gid;
0033 unsigned int __pad0;
0034 unsigned long st_rdev;
0035 long st_size;
0036 long st_blksize;
0037
0038 long st_blocks;
0039 unsigned long st_atime;
0040 unsigned long st_atime_nsec;
0041 unsigned long st_mtime;
0042
0043 unsigned long st_mtime_nsec;
0044 unsigned long st_ctime;
0045 unsigned long st_ctime_nsec;
0046 long __unused[3];
0047 };
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062
0063
0064
0065
0066
0067
0068 #define my_syscall0(num) \
0069 ({ \
0070 long _ret; \
0071 register long _num __asm__ ("rax") = (num); \
0072 \
0073 __asm__ volatile ( \
0074 "syscall\n" \
0075 : "=a"(_ret) \
0076 : "0"(_num) \
0077 : "rcx", "r11", "memory", "cc" \
0078 ); \
0079 _ret; \
0080 })
0081
0082 #define my_syscall1(num, arg1) \
0083 ({ \
0084 long _ret; \
0085 register long _num __asm__ ("rax") = (num); \
0086 register long _arg1 __asm__ ("rdi") = (long)(arg1); \
0087 \
0088 __asm__ volatile ( \
0089 "syscall\n" \
0090 : "=a"(_ret) \
0091 : "r"(_arg1), \
0092 "0"(_num) \
0093 : "rcx", "r11", "memory", "cc" \
0094 ); \
0095 _ret; \
0096 })
0097
0098 #define my_syscall2(num, arg1, arg2) \
0099 ({ \
0100 long _ret; \
0101 register long _num __asm__ ("rax") = (num); \
0102 register long _arg1 __asm__ ("rdi") = (long)(arg1); \
0103 register long _arg2 __asm__ ("rsi") = (long)(arg2); \
0104 \
0105 __asm__ volatile ( \
0106 "syscall\n" \
0107 : "=a"(_ret) \
0108 : "r"(_arg1), "r"(_arg2), \
0109 "0"(_num) \
0110 : "rcx", "r11", "memory", "cc" \
0111 ); \
0112 _ret; \
0113 })
0114
0115 #define my_syscall3(num, arg1, arg2, arg3) \
0116 ({ \
0117 long _ret; \
0118 register long _num __asm__ ("rax") = (num); \
0119 register long _arg1 __asm__ ("rdi") = (long)(arg1); \
0120 register long _arg2 __asm__ ("rsi") = (long)(arg2); \
0121 register long _arg3 __asm__ ("rdx") = (long)(arg3); \
0122 \
0123 __asm__ volatile ( \
0124 "syscall\n" \
0125 : "=a"(_ret) \
0126 : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
0127 "0"(_num) \
0128 : "rcx", "r11", "memory", "cc" \
0129 ); \
0130 _ret; \
0131 })
0132
0133 #define my_syscall4(num, arg1, arg2, arg3, arg4) \
0134 ({ \
0135 long _ret; \
0136 register long _num __asm__ ("rax") = (num); \
0137 register long _arg1 __asm__ ("rdi") = (long)(arg1); \
0138 register long _arg2 __asm__ ("rsi") = (long)(arg2); \
0139 register long _arg3 __asm__ ("rdx") = (long)(arg3); \
0140 register long _arg4 __asm__ ("r10") = (long)(arg4); \
0141 \
0142 __asm__ volatile ( \
0143 "syscall\n" \
0144 : "=a"(_ret) \
0145 : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
0146 "0"(_num) \
0147 : "rcx", "r11", "memory", "cc" \
0148 ); \
0149 _ret; \
0150 })
0151
0152 #define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
0153 ({ \
0154 long _ret; \
0155 register long _num __asm__ ("rax") = (num); \
0156 register long _arg1 __asm__ ("rdi") = (long)(arg1); \
0157 register long _arg2 __asm__ ("rsi") = (long)(arg2); \
0158 register long _arg3 __asm__ ("rdx") = (long)(arg3); \
0159 register long _arg4 __asm__ ("r10") = (long)(arg4); \
0160 register long _arg5 __asm__ ("r8") = (long)(arg5); \
0161 \
0162 __asm__ volatile ( \
0163 "syscall\n" \
0164 : "=a"(_ret) \
0165 : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
0166 "0"(_num) \
0167 : "rcx", "r11", "memory", "cc" \
0168 ); \
0169 _ret; \
0170 })
0171
0172 #define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
0173 ({ \
0174 long _ret; \
0175 register long _num __asm__ ("rax") = (num); \
0176 register long _arg1 __asm__ ("rdi") = (long)(arg1); \
0177 register long _arg2 __asm__ ("rsi") = (long)(arg2); \
0178 register long _arg3 __asm__ ("rdx") = (long)(arg3); \
0179 register long _arg4 __asm__ ("r10") = (long)(arg4); \
0180 register long _arg5 __asm__ ("r8") = (long)(arg5); \
0181 register long _arg6 __asm__ ("r9") = (long)(arg6); \
0182 \
0183 __asm__ volatile ( \
0184 "syscall\n" \
0185 : "=a"(_ret) \
0186 : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
0187 "r"(_arg6), "0"(_num) \
0188 : "rcx", "r11", "memory", "cc" \
0189 ); \
0190 _ret; \
0191 })
0192
0193
0194
0195
0196
0197
0198
0199
0200 __asm__ (".section .text\n"
0201 ".weak _start\n"
0202 "_start:\n"
0203 "pop %rdi\n"
0204 "mov %rsp, %rsi\n"
0205 "lea 8(%rsi,%rdi,8),%rdx\n"
0206 "xor %ebp, %ebp\n"
0207 "and $-16, %rsp\n"
0208 "call main\n"
0209 "mov %eax, %edi\n"
0210 "mov $60, %eax\n"
0211 "syscall\n"
0212 "hlt\n"
0213 "");
0214
0215 #endif