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OSCL-LXR

 
 

    


0001 /*
0002    edid.S: EDID data template
0003 
0004    Copyright (C) 2012 Carsten Emde <C.Emde@osadl.org>
0005 
0006    This program is free software; you can redistribute it and/or
0007    modify it under the terms of the GNU General Public License
0008    as published by the Free Software Foundation; either version 2
0009    of the License, or (at your option) any later version.
0010 
0011    This program is distributed in the hope that it will be useful,
0012    but WITHOUT ANY WARRANTY; without even the implied warranty of
0013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0014    GNU General Public License for more details.
0015 
0016    You should have received a copy of the GNU General Public License
0017    along with this program; if not, write to the Free Software
0018    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA.
0019 */
0020 
0021 
0022 /* Manufacturer */
0023 #define MFG_LNX1 'L'
0024 #define MFG_LNX2 'N'
0025 #define MFG_LNX3 'X'
0026 #define SERIAL 0
0027 #define YEAR 2012
0028 #define WEEK 5
0029 
0030 /* EDID 1.3 standard definitions */
0031 #define XY_RATIO_16_10  0b00
0032 #define XY_RATIO_4_3    0b01
0033 #define XY_RATIO_5_4    0b10
0034 #define XY_RATIO_16_9   0b11
0035 
0036 /* Provide defaults for the timing bits */
0037 #ifndef ESTABLISHED_TIMING1_BITS
0038 #define ESTABLISHED_TIMING1_BITS 0x00
0039 #endif
0040 #ifndef ESTABLISHED_TIMING2_BITS
0041 #define ESTABLISHED_TIMING2_BITS 0x00
0042 #endif
0043 #ifndef ESTABLISHED_TIMING3_BITS
0044 #define ESTABLISHED_TIMING3_BITS 0x00
0045 #endif
0046 
0047 #define mfgname2id(v1,v2,v3) \
0048     ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f))
0049 #define swap16(v1) ((v1>>8)+((v1&0xff)<<8))
0050 #define lsbs2(v1,v2) (((v1&0x0f)<<4)+(v2&0x0f))
0051 #define msbs2(v1,v2) ((((v1>>8)&0x0f)<<4)+((v2>>8)&0x0f))
0052 #define msbs4(v1,v2,v3,v4) \
0053     ((((v1>>8)&0x03)<<6)+(((v2>>8)&0x03)<<4)+\
0054     (((v3>>4)&0x03)<<2)+((v4>>4)&0x03))
0055 #define pixdpi2mm(pix,dpi) ((pix*25)/dpi)
0056 #define xsize pixdpi2mm(XPIX,DPI)
0057 #define ysize pixdpi2mm(YPIX,DPI)
0058 
0059         .data
0060 
0061 /* Fixed header pattern */
0062 header:     .byte   0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00
0063 
0064 mfg_id:     .hword  swap16(mfgname2id(MFG_LNX1, MFG_LNX2, MFG_LNX3))
0065 
0066 prod_code:  .hword  0
0067 
0068 /* Serial number. 32 bits, little endian. */
0069 serial_number:  .long   SERIAL
0070 
0071 /* Week of manufacture */
0072 week:       .byte   WEEK
0073 
0074 /* Year of manufacture, less 1990. (1990-2245)
0075    If week=255, it is the model year instead */
0076 year:       .byte   YEAR-1990
0077 
0078 version:    .byte   VERSION     /* EDID version, usually 1 (for 1.3) */
0079 revision:   .byte   REVISION    /* EDID revision, usually 3 (for 1.3) */
0080 
0081 /* If Bit 7=1   Digital input. If set, the following bit definitions apply:
0082      Bits 6-1   Reserved, must be 0
0083      Bit 0  Signal is compatible with VESA DFP 1.x TMDS CRGB,
0084           1 pixel per clock, up to 8 bits per color, MSB aligned,
0085    If Bit 7=0   Analog input. If clear, the following bit definitions apply:
0086      Bits 6-5   Video white and sync levels, relative to blank
0087           00=+0.7/-0.3 V; 01=+0.714/-0.286 V;
0088           10=+1.0/-0.4 V; 11=+0.7/0 V
0089    Bit 4    Blank-to-black setup (pedestal) expected
0090    Bit 3    Separate sync supported
0091    Bit 2    Composite sync (on HSync) supported
0092    Bit 1    Sync on green supported
0093    Bit 0    VSync pulse must be serrated when somposite or
0094           sync-on-green is used. */
0095 video_parms:    .byte   0x6d
0096 
0097 /* Maximum horizontal image size, in centimetres
0098    (max 292 cm/115 in at 16:9 aspect ratio) */
0099 max_hor_size:   .byte   xsize/10
0100 
0101 /* Maximum vertical image size, in centimetres.
0102    If either byte is 0, undefined (e.g. projector) */
0103 max_vert_size:  .byte   ysize/10
0104 
0105 /* Display gamma, minus 1, times 100 (range 1.00-3.5 */
0106 gamma:      .byte   120
0107 
0108 /* Bit 7    DPMS standby supported
0109    Bit 6    DPMS suspend supported
0110    Bit 5    DPMS active-off supported
0111    Bits 4-3 Display type: 00=monochrome; 01=RGB colour;
0112           10=non-RGB multicolour; 11=undefined
0113    Bit 2    Standard sRGB colour space. Bytes 25-34 must contain
0114           sRGB standard values.
0115    Bit 1    Preferred timing mode specified in descriptor block 1.
0116    Bit 0    GTF supported with default parameter values. */
0117 dsp_features:   .byte   0xea
0118 
0119 /* Chromaticity coordinates. */
0120 /* Red and green least-significant bits
0121    Bits 7-6 Red x value least-significant 2 bits
0122    Bits 5-4 Red y value least-significant 2 bits
0123    Bits 3-2 Green x value lst-significant 2 bits
0124    Bits 1-0 Green y value least-significant 2 bits */
0125 red_green_lsb:  .byte   0x5e
0126 
0127 /* Blue and white least-significant 2 bits */
0128 blue_white_lsb: .byte   0xc0
0129 
0130 /* Red x value most significant 8 bits.
0131    0-255 encodes 0-0.996 (255/256); 0-0.999 (1023/1024) with lsbits */
0132 red_x_msb:  .byte   0xa4
0133 
0134 /* Red y value most significant 8 bits */
0135 red_y_msb:  .byte   0x59
0136 
0137 /* Green x and y value most significant 8 bits */
0138 green_x_y_msb:  .byte   0x4a,0x98
0139 
0140 /* Blue x and y value most significant 8 bits */
0141 blue_x_y_msb:   .byte   0x25,0x20
0142 
0143 /* Default white point x and y value most significant 8 bits */
0144 white_x_y_msb:  .byte   0x50,0x54
0145 
0146 /* Established timings */
0147 /* Bit 7    720x400 @ 70 Hz
0148    Bit 6    720x400 @ 88 Hz
0149    Bit 5    640x480 @ 60 Hz
0150    Bit 4    640x480 @ 67 Hz
0151    Bit 3    640x480 @ 72 Hz
0152    Bit 2    640x480 @ 75 Hz
0153    Bit 1    800x600 @ 56 Hz
0154    Bit 0    800x600 @ 60 Hz */
0155 estbl_timing1:  .byte   ESTABLISHED_TIMING1_BITS
0156 
0157 /* Bit 7    800x600 @ 72 Hz
0158    Bit 6    800x600 @ 75 Hz
0159    Bit 5    832x624 @ 75 Hz
0160    Bit 4    1024x768 @ 87 Hz, interlaced (1024x768)
0161    Bit 3    1024x768 @ 60 Hz
0162    Bit 2    1024x768 @ 72 Hz
0163    Bit 1    1024x768 @ 75 Hz
0164    Bit 0    1280x1024 @ 75 Hz */
0165 estbl_timing2:  .byte   ESTABLISHED_TIMING2_BITS
0166 
0167 /* Bit 7    1152x870 @ 75 Hz (Apple Macintosh II)
0168    Bits 6-0     Other manufacturer-specific display mod */
0169 estbl_timing3:  .byte   ESTABLISHED_TIMING3_BITS
0170 
0171 /* Standard timing */
0172 /* X resolution, less 31, divided by 8 (256-2288 pixels) */
0173 std_xres:   .byte   (XPIX/8)-31
0174 /* Y resolution, X:Y pixel ratio
0175    Bits 7-6 X:Y pixel ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9.
0176    Bits 5-0 Vertical frequency, less 60 (60-123 Hz) */
0177 std_vres:   .byte   (XY_RATIO<<6)+VFREQ-60
0178         .fill   7,2,0x0101  /* Unused */
0179 
0180 descriptor1:
0181 /* Pixel clock in 10 kHz units. (0.-655.35 MHz, little-endian) */
0182 clock:      .hword  CLOCK/10
0183 
0184 /* Horizontal active pixels 8 lsbits (0-4095) */
0185 x_act_lsb:  .byte   XPIX&0xff
0186 /* Horizontal blanking pixels 8 lsbits (0-4095)
0187    End of active to start of next active. */
0188 x_blk_lsb:  .byte   XBLANK&0xff
0189 /* Bits 7-4     Horizontal active pixels 4 msbits
0190    Bits 3-0 Horizontal blanking pixels 4 msbits */
0191 x_msbs:     .byte   msbs2(XPIX,XBLANK)
0192 
0193 /* Vertical active lines 8 lsbits (0-4095) */
0194 y_act_lsb:  .byte   YPIX&0xff
0195 /* Vertical blanking lines 8 lsbits (0-4095) */
0196 y_blk_lsb:  .byte   YBLANK&0xff
0197 /* Bits 7-4     Vertical active lines 4 msbits
0198    Bits 3-0     Vertical blanking lines 4 msbits */
0199 y_msbs:     .byte   msbs2(YPIX,YBLANK)
0200 
0201 /* Horizontal sync offset pixels 8 lsbits (0-1023) From blanking start */
0202 x_snc_off_lsb:  .byte   XOFFSET&0xff
0203 /* Horizontal sync pulse width pixels 8 lsbits (0-1023) */
0204 x_snc_pls_lsb:  .byte   XPULSE&0xff
0205 /* Bits 7-4     Vertical sync offset lines 4 lsbits (0-63)
0206    Bits 3-0     Vertical sync pulse width lines 4 lsbits (0-63) */
0207 y_snc_lsb:  .byte   lsbs2(YOFFSET, YPULSE)
0208 /* Bits 7-6     Horizontal sync offset pixels 2 msbits
0209    Bits 5-4     Horizontal sync pulse width pixels 2 msbits
0210    Bits 3-2     Vertical sync offset lines 2 msbits
0211    Bits 1-0     Vertical sync pulse width lines 2 msbits */
0212 xy_snc_msbs:    .byte   msbs4(XOFFSET,XPULSE,YOFFSET,YPULSE)
0213 
0214 /* Horizontal display size, mm, 8 lsbits (0-4095 mm, 161 in) */
0215 x_dsp_size: .byte   xsize&0xff
0216 
0217 /* Vertical display size, mm, 8 lsbits (0-4095 mm, 161 in) */
0218 y_dsp_size: .byte   ysize&0xff
0219 
0220 /* Bits 7-4     Horizontal display size, mm, 4 msbits
0221    Bits 3-0     Vertical display size, mm, 4 msbits */
0222 dsp_size_mbsb:  .byte   msbs2(xsize,ysize)
0223 
0224 /* Horizontal border pixels (each side; total is twice this) */
0225 x_border:   .byte   0
0226 /* Vertical border lines (each side; total is twice this) */
0227 y_border:   .byte   0
0228 
0229 /* Bit 7    Interlaced
0230    Bits 6-5     Stereo mode: 00=No stereo; other values depend on bit 0:
0231    Bit 0=0: 01=Field sequential, sync=1 during right; 10=similar,
0232      sync=1 during left; 11=4-way interleaved stereo
0233    Bit 0=1 2-way interleaved stereo: 01=Right image on even lines;
0234      10=Left image on even lines; 11=side-by-side
0235    Bits 4-3     Sync type: 00=Analog composite; 01=Bipolar analog composite;
0236      10=Digital composite (on HSync); 11=Digital separate
0237    Bit 2    If digital separate: Vertical sync polarity (1=positive)
0238    Other types: VSync serrated (HSync during VSync)
0239    Bit 1    If analog sync: Sync on all 3 RGB lines (else green only)
0240    Digital: HSync polarity (1=positive)
0241    Bit 0    2-way line-interleaved stereo, if bits 4-3 are not 00. */
0242 features:   .byte   0x18+(VSYNC_POL<<2)+(HSYNC_POL<<1)
0243 
0244 descriptor2:    .byte   0,0 /* Not a detailed timing descriptor */
0245         .byte   0   /* Must be zero */
0246         .byte   0xff    /* Descriptor is monitor serial number (text) */
0247         .byte   0   /* Must be zero */
0248 start1:     .ascii  "Linux #0"
0249 end1:       .byte   0x0a    /* End marker */
0250         .fill   12-(end1-start1), 1, 0x20 /* Padded spaces */
0251 descriptor3:    .byte   0,0 /* Not a detailed timing descriptor */
0252         .byte   0   /* Must be zero */
0253         .byte   0xfd    /* Descriptor is monitor range limits */
0254         .byte   0   /* Must be zero */
0255 start2:     .byte   VFREQ-1 /* Minimum vertical field rate (1-255 Hz) */
0256         .byte   VFREQ+1 /* Maximum vertical field rate (1-255 Hz) */
0257         .byte   (CLOCK/(XPIX+XBLANK))-1 /* Minimum horizontal line rate
0258                             (1-255 kHz) */
0259         .byte   (CLOCK/(XPIX+XBLANK))+1 /* Maximum horizontal line rate
0260                             (1-255 kHz) */
0261         .byte   (CLOCK/10000)+1 /* Maximum pixel clock rate, rounded up
0262                        to 10 MHz multiple (10-2550 MHz) */
0263         .byte   0   /* No extended timing information type */
0264 end2:       .byte   0x0a    /* End marker */
0265         .fill   12-(end2-start2), 1, 0x20 /* Padded spaces */
0266 descriptor4:    .byte   0,0 /* Not a detailed timing descriptor */
0267         .byte   0   /* Must be zero */
0268         .byte   0xfc    /* Descriptor is text */
0269         .byte   0   /* Must be zero */
0270 start3:     .ascii  TIMING_NAME
0271 end3:       .byte   0x0a    /* End marker */
0272         .fill   12-(end3-start3), 1, 0x20 /* Padded spaces */
0273 extensions: .byte   0   /* Number of extensions to follow */
0274 checksum:   .byte   CRC /* Sum of all bytes must be 0 */