include/asm/barrier_64.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __TOOLS_LINUX_SPARC64_BARRIER_H
0003 #define __TOOLS_LINUX_SPARC64_BARRIER_H
0004
0005 /* Copied from the kernel sources to tools/:
0006  *
0007  * These are here in an effort to more fully work around Spitfire Errata
0008  * #51.  Essentially, if a memory barrier occurs soon after a mispredicted
0009  * branch, the chip can stop executing instructions until a trap occurs.
0010  * Therefore, if interrupts are disabled, the chip can hang forever.
0011  *
0012  * It used to be believed that the memory barrier had to be right in the
0013  * delay slot, but a case has been traced recently wherein the memory barrier
0014  * was one instruction after the branch delay slot and the chip still hung.
0015  * The offending sequence was the following in sym_wakeup_done() of the
0016  * sym53c8xx_2 driver:
0017  *
0018  *  call    sym_ccb_from_dsa, 0
0019  *   movge  %icc, 0, %l0
0020  *  brz,pn  %o0, .LL1303
0021  *   mov    %o0, %l2
0022  *  membar  #LoadLoad
0023  *
0024  * The branch has to be mispredicted for the bug to occur.  Therefore, we put
0025  * the memory barrier explicitly into a "branch always, predicted taken"
0026  * delay slot to avoid the problem case.
0027  */
0028 #define membar_safe(type) \
0029 do {    __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
0030                  " membar   " type "\n" \
0031                  "1:\n" \
0032                  : : : "memory"); \
0033 } while (0)
0034
0035 /* The kernel always executes in TSO memory model these days,
0036  * and furthermore most sparc64 chips implement more stringent
0037  * memory ordering than required by the specifications.
0038  */
0039 #define mb()    membar_safe("#StoreLoad")
0040 #define rmb()   __asm__ __volatile__("":::"memory")
0041 #define wmb()   __asm__ __volatile__("":::"memory")
0042
0043 #define smp_store_release(p, v)         \
0044 do {                        \
0045     barrier();              \
0046     WRITE_ONCE(*p, v);          \
0047 } while (0)
0048
0049 #define smp_load_acquire(p)         \
0050 ({                      \
0051     typeof(*p) ___p1 = READ_ONCE(*p);   \
0052     barrier();              \
0053     ___p1;                  \
0054 })
0055
0056 #endif /* !(__TOOLS_LINUX_SPARC64_BARRIER_H) */