uapi/asm/unistd.h

0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
0002 /*
0003  * Copyright (C) 2018 David Abdurachmanov <david.abdurachmanov@gmail.com>
0004  *
0005  * This program is free software; you can redistribute it and/or modify
0006  * it under the terms of the GNU General Public License version 2 as
0007  * published by the Free Software Foundation.
0008  *
0009  * This program is distributed in the hope that it will be useful,
0010  * but WITHOUT ANY WARRANTY; without even the implied warranty of
0011  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0012  * GNU General Public License for more details.
0013  *
0014  * You should have received a copy of the GNU General Public License
0015  * along with this program.  If not, see <https://www.gnu.org/licenses/>.
0016  */
0017
0018 #ifdef __LP64__
0019 #define __ARCH_WANT_NEW_STAT
0020 #define __ARCH_WANT_SET_GET_RLIMIT
0021 #endif /* __LP64__ */
0022
0023 #include <asm-generic/unistd.h>
0024
0025 /*
0026  * Allows the instruction cache to be flushed from userspace.  Despite RISC-V
0027  * having a direct 'fence.i' instruction available to userspace (which we
0028  * can't trap!), that's not actually viable when running on Linux because the
0029  * kernel might schedule a process on another hart.  There is no way for
0030  * userspace to handle this without invoking the kernel (as it doesn't know the
0031  * thread->hart mappings), so we've defined a RISC-V specific system call to
0032  * flush the instruction cache.
0033  *
0034  * __NR_riscv_flush_icache is defined to flush the instruction cache over an
0035  * address range, with the flush applying to either all threads or just the
0036  * caller.  We don't currently do anything with the address range, that's just
0037  * in there for forwards compatibility.
0038  */
0039 #ifndef __NR_riscv_flush_icache
0040 #define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
0041 #endif
0042 __SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)