uapi/asm/perf_regs.h

0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
0002 #ifndef _UAPI_ASM_POWERPC_PERF_REGS_H
0003 #define _UAPI_ASM_POWERPC_PERF_REGS_H
0004
0005 enum perf_event_powerpc_regs {
0006     PERF_REG_POWERPC_R0,
0007     PERF_REG_POWERPC_R1,
0008     PERF_REG_POWERPC_R2,
0009     PERF_REG_POWERPC_R3,
0010     PERF_REG_POWERPC_R4,
0011     PERF_REG_POWERPC_R5,
0012     PERF_REG_POWERPC_R6,
0013     PERF_REG_POWERPC_R7,
0014     PERF_REG_POWERPC_R8,
0015     PERF_REG_POWERPC_R9,
0016     PERF_REG_POWERPC_R10,
0017     PERF_REG_POWERPC_R11,
0018     PERF_REG_POWERPC_R12,
0019     PERF_REG_POWERPC_R13,
0020     PERF_REG_POWERPC_R14,
0021     PERF_REG_POWERPC_R15,
0022     PERF_REG_POWERPC_R16,
0023     PERF_REG_POWERPC_R17,
0024     PERF_REG_POWERPC_R18,
0025     PERF_REG_POWERPC_R19,
0026     PERF_REG_POWERPC_R20,
0027     PERF_REG_POWERPC_R21,
0028     PERF_REG_POWERPC_R22,
0029     PERF_REG_POWERPC_R23,
0030     PERF_REG_POWERPC_R24,
0031     PERF_REG_POWERPC_R25,
0032     PERF_REG_POWERPC_R26,
0033     PERF_REG_POWERPC_R27,
0034     PERF_REG_POWERPC_R28,
0035     PERF_REG_POWERPC_R29,
0036     PERF_REG_POWERPC_R30,
0037     PERF_REG_POWERPC_R31,
0038     PERF_REG_POWERPC_NIP,
0039     PERF_REG_POWERPC_MSR,
0040     PERF_REG_POWERPC_ORIG_R3,
0041     PERF_REG_POWERPC_CTR,
0042     PERF_REG_POWERPC_LINK,
0043     PERF_REG_POWERPC_XER,
0044     PERF_REG_POWERPC_CCR,
0045     PERF_REG_POWERPC_SOFTE,
0046     PERF_REG_POWERPC_TRAP,
0047     PERF_REG_POWERPC_DAR,
0048     PERF_REG_POWERPC_DSISR,
0049     PERF_REG_POWERPC_SIER,
0050     PERF_REG_POWERPC_MMCRA,
0051     /* Extended registers */
0052     PERF_REG_POWERPC_MMCR0,
0053     PERF_REG_POWERPC_MMCR1,
0054     PERF_REG_POWERPC_MMCR2,
0055     PERF_REG_POWERPC_MMCR3,
0056     PERF_REG_POWERPC_SIER2,
0057     PERF_REG_POWERPC_SIER3,
0058     PERF_REG_POWERPC_PMC1,
0059     PERF_REG_POWERPC_PMC2,
0060     PERF_REG_POWERPC_PMC3,
0061     PERF_REG_POWERPC_PMC4,
0062     PERF_REG_POWERPC_PMC5,
0063     PERF_REG_POWERPC_PMC6,
0064     PERF_REG_POWERPC_SDAR,
0065     PERF_REG_POWERPC_SIAR,
0066     /* Max mask value for interrupt regs w/o extended regs */
0067     PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
0068     /* Max mask value for interrupt regs including extended regs */
0069     PERF_REG_EXTENDED_MAX = PERF_REG_POWERPC_SIAR + 1,
0070 };
0071
0072 #define PERF_REG_PMU_MASK   ((1ULL << PERF_REG_POWERPC_MAX) - 1)
0073
0074 /*
0075  * PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300
0076  * includes 11 SPRS from MMCR0 to SIAR excluding the
0077  * unsupported SPRS MMCR3, SIER2 and SIER3.
0078  */
0079 #define PERF_REG_PMU_MASK_300   \
0080     ((1ULL << PERF_REG_POWERPC_MMCR0) | (1ULL << PERF_REG_POWERPC_MMCR1) | \
0081     (1ULL << PERF_REG_POWERPC_MMCR2) | (1ULL << PERF_REG_POWERPC_PMC1) | \
0082     (1ULL << PERF_REG_POWERPC_PMC2) | (1ULL << PERF_REG_POWERPC_PMC3) | \
0083     (1ULL << PERF_REG_POWERPC_PMC4) | (1ULL << PERF_REG_POWERPC_PMC5) | \
0084     (1ULL << PERF_REG_POWERPC_PMC6) | (1ULL << PERF_REG_POWERPC_SDAR) | \
0085     (1ULL << PERF_REG_POWERPC_SIAR))
0086
0087 /*
0088  * PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_31
0089  * includes 14 SPRs from MMCR0 to SIAR.
0090  */
0091 #define PERF_REG_PMU_MASK_31    \
0092     (PERF_REG_PMU_MASK_300 | (1ULL << PERF_REG_POWERPC_MMCR3) | \
0093     (1ULL << PERF_REG_POWERPC_SIER2) | (1ULL << PERF_REG_POWERPC_SIER3))
0094
0095 #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */