0001
0002
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0004
0005
0006 #include <linux/moduleparam.h>
0007 #include <linux/virtio_config.h>
0008
0009 #include "virtio_card.h"
0010
0011 static u32 pcm_buffer_ms = 160;
0012 module_param(pcm_buffer_ms, uint, 0644);
0013 MODULE_PARM_DESC(pcm_buffer_ms, "PCM substream buffer time in milliseconds");
0014
0015 static u32 pcm_periods_min = 2;
0016 module_param(pcm_periods_min, uint, 0644);
0017 MODULE_PARM_DESC(pcm_periods_min, "Minimum number of PCM periods");
0018
0019 static u32 pcm_periods_max = 16;
0020 module_param(pcm_periods_max, uint, 0644);
0021 MODULE_PARM_DESC(pcm_periods_max, "Maximum number of PCM periods");
0022
0023 static u32 pcm_period_ms_min = 10;
0024 module_param(pcm_period_ms_min, uint, 0644);
0025 MODULE_PARM_DESC(pcm_period_ms_min, "Minimum PCM period time in milliseconds");
0026
0027 static u32 pcm_period_ms_max = 80;
0028 module_param(pcm_period_ms_max, uint, 0644);
0029 MODULE_PARM_DESC(pcm_period_ms_max, "Maximum PCM period time in milliseconds");
0030
0031
0032 static const snd_pcm_format_t g_v2a_format_map[] = {
0033 [VIRTIO_SND_PCM_FMT_IMA_ADPCM] = SNDRV_PCM_FORMAT_IMA_ADPCM,
0034 [VIRTIO_SND_PCM_FMT_MU_LAW] = SNDRV_PCM_FORMAT_MU_LAW,
0035 [VIRTIO_SND_PCM_FMT_A_LAW] = SNDRV_PCM_FORMAT_A_LAW,
0036 [VIRTIO_SND_PCM_FMT_S8] = SNDRV_PCM_FORMAT_S8,
0037 [VIRTIO_SND_PCM_FMT_U8] = SNDRV_PCM_FORMAT_U8,
0038 [VIRTIO_SND_PCM_FMT_S16] = SNDRV_PCM_FORMAT_S16_LE,
0039 [VIRTIO_SND_PCM_FMT_U16] = SNDRV_PCM_FORMAT_U16_LE,
0040 [VIRTIO_SND_PCM_FMT_S18_3] = SNDRV_PCM_FORMAT_S18_3LE,
0041 [VIRTIO_SND_PCM_FMT_U18_3] = SNDRV_PCM_FORMAT_U18_3LE,
0042 [VIRTIO_SND_PCM_FMT_S20_3] = SNDRV_PCM_FORMAT_S20_3LE,
0043 [VIRTIO_SND_PCM_FMT_U20_3] = SNDRV_PCM_FORMAT_U20_3LE,
0044 [VIRTIO_SND_PCM_FMT_S24_3] = SNDRV_PCM_FORMAT_S24_3LE,
0045 [VIRTIO_SND_PCM_FMT_U24_3] = SNDRV_PCM_FORMAT_U24_3LE,
0046 [VIRTIO_SND_PCM_FMT_S20] = SNDRV_PCM_FORMAT_S20_LE,
0047 [VIRTIO_SND_PCM_FMT_U20] = SNDRV_PCM_FORMAT_U20_LE,
0048 [VIRTIO_SND_PCM_FMT_S24] = SNDRV_PCM_FORMAT_S24_LE,
0049 [VIRTIO_SND_PCM_FMT_U24] = SNDRV_PCM_FORMAT_U24_LE,
0050 [VIRTIO_SND_PCM_FMT_S32] = SNDRV_PCM_FORMAT_S32_LE,
0051 [VIRTIO_SND_PCM_FMT_U32] = SNDRV_PCM_FORMAT_U32_LE,
0052 [VIRTIO_SND_PCM_FMT_FLOAT] = SNDRV_PCM_FORMAT_FLOAT_LE,
0053 [VIRTIO_SND_PCM_FMT_FLOAT64] = SNDRV_PCM_FORMAT_FLOAT64_LE,
0054 [VIRTIO_SND_PCM_FMT_DSD_U8] = SNDRV_PCM_FORMAT_DSD_U8,
0055 [VIRTIO_SND_PCM_FMT_DSD_U16] = SNDRV_PCM_FORMAT_DSD_U16_LE,
0056 [VIRTIO_SND_PCM_FMT_DSD_U32] = SNDRV_PCM_FORMAT_DSD_U32_LE,
0057 [VIRTIO_SND_PCM_FMT_IEC958_SUBFRAME] =
0058 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
0059 };
0060
0061
0062 struct virtsnd_v2a_rate {
0063 unsigned int alsa_bit;
0064 unsigned int rate;
0065 };
0066
0067 static const struct virtsnd_v2a_rate g_v2a_rate_map[] = {
0068 [VIRTIO_SND_PCM_RATE_5512] = { SNDRV_PCM_RATE_5512, 5512 },
0069 [VIRTIO_SND_PCM_RATE_8000] = { SNDRV_PCM_RATE_8000, 8000 },
0070 [VIRTIO_SND_PCM_RATE_11025] = { SNDRV_PCM_RATE_11025, 11025 },
0071 [VIRTIO_SND_PCM_RATE_16000] = { SNDRV_PCM_RATE_16000, 16000 },
0072 [VIRTIO_SND_PCM_RATE_22050] = { SNDRV_PCM_RATE_22050, 22050 },
0073 [VIRTIO_SND_PCM_RATE_32000] = { SNDRV_PCM_RATE_32000, 32000 },
0074 [VIRTIO_SND_PCM_RATE_44100] = { SNDRV_PCM_RATE_44100, 44100 },
0075 [VIRTIO_SND_PCM_RATE_48000] = { SNDRV_PCM_RATE_48000, 48000 },
0076 [VIRTIO_SND_PCM_RATE_64000] = { SNDRV_PCM_RATE_64000, 64000 },
0077 [VIRTIO_SND_PCM_RATE_88200] = { SNDRV_PCM_RATE_88200, 88200 },
0078 [VIRTIO_SND_PCM_RATE_96000] = { SNDRV_PCM_RATE_96000, 96000 },
0079 [VIRTIO_SND_PCM_RATE_176400] = { SNDRV_PCM_RATE_176400, 176400 },
0080 [VIRTIO_SND_PCM_RATE_192000] = { SNDRV_PCM_RATE_192000, 192000 }
0081 };
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091 static int virtsnd_pcm_build_hw(struct virtio_pcm_substream *vss,
0092 struct virtio_snd_pcm_info *info)
0093 {
0094 struct virtio_device *vdev = vss->snd->vdev;
0095 unsigned int i;
0096 u64 values;
0097 size_t sample_max = 0;
0098 size_t sample_min = 0;
0099
0100 vss->features = le32_to_cpu(info->features);
0101
0102
0103
0104
0105
0106 vss->hw.info =
0107 SNDRV_PCM_INFO_MMAP |
0108 SNDRV_PCM_INFO_MMAP_VALID |
0109 SNDRV_PCM_INFO_BATCH |
0110 SNDRV_PCM_INFO_BLOCK_TRANSFER |
0111 SNDRV_PCM_INFO_INTERLEAVED |
0112 SNDRV_PCM_INFO_PAUSE;
0113
0114 if (!info->channels_min || info->channels_min > info->channels_max) {
0115 dev_err(&vdev->dev,
0116 "SID %u: invalid channel range [%u %u]\n",
0117 vss->sid, info->channels_min, info->channels_max);
0118 return -EINVAL;
0119 }
0120
0121 vss->hw.channels_min = info->channels_min;
0122 vss->hw.channels_max = info->channels_max;
0123
0124 values = le64_to_cpu(info->formats);
0125
0126 vss->hw.formats = 0;
0127
0128 for (i = 0; i < ARRAY_SIZE(g_v2a_format_map); ++i)
0129 if (values & (1ULL << i)) {
0130 snd_pcm_format_t alsa_fmt = g_v2a_format_map[i];
0131 int bytes = snd_pcm_format_physical_width(alsa_fmt) / 8;
0132
0133 if (!sample_min || sample_min > bytes)
0134 sample_min = bytes;
0135
0136 if (sample_max < bytes)
0137 sample_max = bytes;
0138
0139 vss->hw.formats |= pcm_format_to_bits(alsa_fmt);
0140 }
0141
0142 if (!vss->hw.formats) {
0143 dev_err(&vdev->dev,
0144 "SID %u: no supported PCM sample formats found\n",
0145 vss->sid);
0146 return -EINVAL;
0147 }
0148
0149 values = le64_to_cpu(info->rates);
0150
0151 vss->hw.rates = 0;
0152
0153 for (i = 0; i < ARRAY_SIZE(g_v2a_rate_map); ++i)
0154 if (values & (1ULL << i)) {
0155 if (!vss->hw.rate_min ||
0156 vss->hw.rate_min > g_v2a_rate_map[i].rate)
0157 vss->hw.rate_min = g_v2a_rate_map[i].rate;
0158
0159 if (vss->hw.rate_max < g_v2a_rate_map[i].rate)
0160 vss->hw.rate_max = g_v2a_rate_map[i].rate;
0161
0162 vss->hw.rates |= g_v2a_rate_map[i].alsa_bit;
0163 }
0164
0165 if (!vss->hw.rates) {
0166 dev_err(&vdev->dev,
0167 "SID %u: no supported PCM frame rates found\n",
0168 vss->sid);
0169 return -EINVAL;
0170 }
0171
0172 vss->hw.periods_min = pcm_periods_min;
0173 vss->hw.periods_max = pcm_periods_max;
0174
0175
0176
0177
0178
0179
0180
0181
0182 vss->hw.buffer_bytes_max =
0183 PAGE_ALIGN(sample_max * vss->hw.channels_max * pcm_buffer_ms *
0184 (vss->hw.rate_max / MSEC_PER_SEC));
0185
0186
0187
0188
0189
0190
0191
0192
0193 vss->hw.period_bytes_min =
0194 sample_min * vss->hw.channels_min * pcm_period_ms_min *
0195 (vss->hw.rate_min / MSEC_PER_SEC);
0196
0197
0198
0199
0200
0201 vss->hw.period_bytes_max =
0202 sample_max * vss->hw.channels_max * pcm_period_ms_max *
0203 (vss->hw.rate_max / MSEC_PER_SEC);
0204
0205 return 0;
0206 }
0207
0208
0209
0210
0211
0212
0213
0214
0215
0216 struct virtio_pcm *virtsnd_pcm_find(struct virtio_snd *snd, u32 nid)
0217 {
0218 struct virtio_pcm *vpcm;
0219
0220 list_for_each_entry(vpcm, &snd->pcm_list, list)
0221 if (vpcm->nid == nid)
0222 return vpcm;
0223
0224 return ERR_PTR(-ENOENT);
0225 }
0226
0227
0228
0229
0230
0231
0232
0233
0234
0235
0236 struct virtio_pcm *virtsnd_pcm_find_or_create(struct virtio_snd *snd, u32 nid)
0237 {
0238 struct virtio_device *vdev = snd->vdev;
0239 struct virtio_pcm *vpcm;
0240
0241 vpcm = virtsnd_pcm_find(snd, nid);
0242 if (!IS_ERR(vpcm))
0243 return vpcm;
0244
0245 vpcm = devm_kzalloc(&vdev->dev, sizeof(*vpcm), GFP_KERNEL);
0246 if (!vpcm)
0247 return ERR_PTR(-ENOMEM);
0248
0249 vpcm->nid = nid;
0250 list_add_tail(&vpcm->list, &snd->pcm_list);
0251
0252 return vpcm;
0253 }
0254
0255
0256
0257
0258
0259
0260
0261
0262 int virtsnd_pcm_validate(struct virtio_device *vdev)
0263 {
0264 if (pcm_periods_min < 2 || pcm_periods_min > pcm_periods_max) {
0265 dev_err(&vdev->dev,
0266 "invalid range [%u %u] of the number of PCM periods\n",
0267 pcm_periods_min, pcm_periods_max);
0268 return -EINVAL;
0269 }
0270
0271 if (!pcm_period_ms_min || pcm_period_ms_min > pcm_period_ms_max) {
0272 dev_err(&vdev->dev,
0273 "invalid range [%u %u] of the size of the PCM period\n",
0274 pcm_period_ms_min, pcm_period_ms_max);
0275 return -EINVAL;
0276 }
0277
0278 if (pcm_buffer_ms < pcm_periods_min * pcm_period_ms_min) {
0279 dev_err(&vdev->dev,
0280 "pcm_buffer_ms(=%u) value cannot be < %u ms\n",
0281 pcm_buffer_ms, pcm_periods_min * pcm_period_ms_min);
0282 return -EINVAL;
0283 }
0284
0285 if (pcm_period_ms_max > pcm_buffer_ms / 2) {
0286 dev_err(&vdev->dev,
0287 "pcm_period_ms_max(=%u) value cannot be > %u ms\n",
0288 pcm_period_ms_max, pcm_buffer_ms / 2);
0289 return -EINVAL;
0290 }
0291
0292 return 0;
0293 }
0294
0295
0296
0297
0298
0299
0300
0301
0302
0303
0304
0305
0306 static void virtsnd_pcm_period_elapsed(struct work_struct *work)
0307 {
0308 struct virtio_pcm_substream *vss =
0309 container_of(work, struct virtio_pcm_substream, elapsed_period);
0310
0311 snd_pcm_period_elapsed(vss->substream);
0312 }
0313
0314
0315
0316
0317
0318
0319
0320
0321
0322
0323 int virtsnd_pcm_parse_cfg(struct virtio_snd *snd)
0324 {
0325 struct virtio_device *vdev = snd->vdev;
0326 struct virtio_snd_pcm_info *info;
0327 u32 i;
0328 int rc;
0329
0330 virtio_cread_le(vdev, struct virtio_snd_config, streams,
0331 &snd->nsubstreams);
0332 if (!snd->nsubstreams)
0333 return 0;
0334
0335 snd->substreams = devm_kcalloc(&vdev->dev, snd->nsubstreams,
0336 sizeof(*snd->substreams), GFP_KERNEL);
0337 if (!snd->substreams)
0338 return -ENOMEM;
0339
0340 info = kcalloc(snd->nsubstreams, sizeof(*info), GFP_KERNEL);
0341 if (!info)
0342 return -ENOMEM;
0343
0344 rc = virtsnd_ctl_query_info(snd, VIRTIO_SND_R_PCM_INFO, 0,
0345 snd->nsubstreams, sizeof(*info), info);
0346 if (rc)
0347 goto on_exit;
0348
0349 for (i = 0; i < snd->nsubstreams; ++i) {
0350 struct virtio_pcm_substream *vss = &snd->substreams[i];
0351 struct virtio_pcm *vpcm;
0352
0353 vss->snd = snd;
0354 vss->sid = i;
0355 INIT_WORK(&vss->elapsed_period, virtsnd_pcm_period_elapsed);
0356 init_waitqueue_head(&vss->msg_empty);
0357 spin_lock_init(&vss->lock);
0358
0359 rc = virtsnd_pcm_build_hw(vss, &info[i]);
0360 if (rc)
0361 goto on_exit;
0362
0363 vss->nid = le32_to_cpu(info[i].hdr.hda_fn_nid);
0364
0365 vpcm = virtsnd_pcm_find_or_create(snd, vss->nid);
0366 if (IS_ERR(vpcm)) {
0367 rc = PTR_ERR(vpcm);
0368 goto on_exit;
0369 }
0370
0371 switch (info[i].direction) {
0372 case VIRTIO_SND_D_OUTPUT:
0373 vss->direction = SNDRV_PCM_STREAM_PLAYBACK;
0374 break;
0375 case VIRTIO_SND_D_INPUT:
0376 vss->direction = SNDRV_PCM_STREAM_CAPTURE;
0377 break;
0378 default:
0379 dev_err(&vdev->dev, "SID %u: unknown direction (%u)\n",
0380 vss->sid, info[i].direction);
0381 rc = -EINVAL;
0382 goto on_exit;
0383 }
0384
0385 vpcm->streams[vss->direction].nsubstreams++;
0386 }
0387
0388 on_exit:
0389 kfree(info);
0390
0391 return rc;
0392 }
0393
0394
0395
0396
0397
0398
0399
0400
0401 int virtsnd_pcm_build_devs(struct virtio_snd *snd)
0402 {
0403 struct virtio_device *vdev = snd->vdev;
0404 struct virtio_pcm *vpcm;
0405 u32 i;
0406 int rc;
0407
0408 list_for_each_entry(vpcm, &snd->pcm_list, list) {
0409 unsigned int npbs =
0410 vpcm->streams[SNDRV_PCM_STREAM_PLAYBACK].nsubstreams;
0411 unsigned int ncps =
0412 vpcm->streams[SNDRV_PCM_STREAM_CAPTURE].nsubstreams;
0413
0414 if (!npbs && !ncps)
0415 continue;
0416
0417 rc = snd_pcm_new(snd->card, VIRTIO_SND_CARD_DRIVER, vpcm->nid,
0418 npbs, ncps, &vpcm->pcm);
0419 if (rc) {
0420 dev_err(&vdev->dev, "snd_pcm_new[%u] failed: %d\n",
0421 vpcm->nid, rc);
0422 return rc;
0423 }
0424
0425 vpcm->pcm->info_flags = 0;
0426 vpcm->pcm->dev_class = SNDRV_PCM_CLASS_GENERIC;
0427 vpcm->pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
0428 snprintf(vpcm->pcm->name, sizeof(vpcm->pcm->name),
0429 VIRTIO_SND_PCM_NAME " %u", vpcm->pcm->device);
0430 vpcm->pcm->private_data = vpcm;
0431 vpcm->pcm->nonatomic = true;
0432
0433 for (i = 0; i < ARRAY_SIZE(vpcm->streams); ++i) {
0434 struct virtio_pcm_stream *stream = &vpcm->streams[i];
0435
0436 if (!stream->nsubstreams)
0437 continue;
0438
0439 stream->substreams =
0440 devm_kcalloc(&vdev->dev, stream->nsubstreams,
0441 sizeof(*stream->substreams),
0442 GFP_KERNEL);
0443 if (!stream->substreams)
0444 return -ENOMEM;
0445
0446 stream->nsubstreams = 0;
0447 }
0448 }
0449
0450 for (i = 0; i < snd->nsubstreams; ++i) {
0451 struct virtio_pcm_stream *vs;
0452 struct virtio_pcm_substream *vss = &snd->substreams[i];
0453
0454 vpcm = virtsnd_pcm_find(snd, vss->nid);
0455 if (IS_ERR(vpcm))
0456 return PTR_ERR(vpcm);
0457
0458 vs = &vpcm->streams[vss->direction];
0459 vs->substreams[vs->nsubstreams++] = vss;
0460 }
0461
0462 list_for_each_entry(vpcm, &snd->pcm_list, list) {
0463 for (i = 0; i < ARRAY_SIZE(vpcm->streams); ++i) {
0464 struct virtio_pcm_stream *vs = &vpcm->streams[i];
0465 struct snd_pcm_str *ks = &vpcm->pcm->streams[i];
0466 struct snd_pcm_substream *kss;
0467
0468 if (!vs->nsubstreams)
0469 continue;
0470
0471 for (kss = ks->substream; kss; kss = kss->next)
0472 vs->substreams[kss->number]->substream = kss;
0473
0474 snd_pcm_set_ops(vpcm->pcm, i, &virtsnd_pcm_ops);
0475 }
0476
0477 snd_pcm_set_managed_buffer_all(vpcm->pcm,
0478 SNDRV_DMA_TYPE_VMALLOC, NULL,
0479 0, 0);
0480 }
0481
0482 return 0;
0483 }
0484
0485
0486
0487
0488
0489
0490
0491
0492 void virtsnd_pcm_event(struct virtio_snd *snd, struct virtio_snd_event *event)
0493 {
0494 struct virtio_pcm_substream *vss;
0495 u32 sid = le32_to_cpu(event->data);
0496
0497 if (sid >= snd->nsubstreams)
0498 return;
0499
0500 vss = &snd->substreams[sid];
0501
0502 switch (le32_to_cpu(event->hdr.code)) {
0503 case VIRTIO_SND_EVT_PCM_PERIOD_ELAPSED:
0504
0505 break;
0506 case VIRTIO_SND_EVT_PCM_XRUN:
0507 spin_lock(&vss->lock);
0508 if (vss->xfer_enabled)
0509 vss->xfer_xrun = true;
0510 spin_unlock(&vss->lock);
0511 break;
0512 }
0513 }