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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) ST-Ericsson SA 2012
0004  *
0005  * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
0006  *         Roger Nilsson <roger.xr.nilsson@stericsson.com>
0007  *         for ST-Ericsson.
0008  */
0009 
0010 #include <linux/module.h>
0011 #include <linux/slab.h>
0012 #include <linux/bitops.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/clk.h>
0015 #include <linux/of.h>
0016 #include <linux/regulator/consumer.h>
0017 #include <linux/mfd/dbx500-prcmu.h>
0018 #include <linux/platform_data/asoc-ux500-msp.h>
0019 
0020 #include <sound/soc.h>
0021 #include <sound/soc-dai.h>
0022 #include <sound/dmaengine_pcm.h>
0023 
0024 #include "ux500_msp_i2s.h"
0025 #include "ux500_msp_dai.h"
0026 #include "ux500_pcm.h"
0027 
0028 static int setup_pcm_multichan(struct snd_soc_dai *dai,
0029             struct ux500_msp_config *msp_config)
0030 {
0031     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0032     struct msp_multichannel_config *multi =
0033                     &msp_config->multichannel_config;
0034 
0035     if (drvdata->slots > 1) {
0036         msp_config->multichannel_configured = 1;
0037 
0038         multi->tx_multichannel_enable = true;
0039         multi->rx_multichannel_enable = true;
0040         multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
0041 
0042         multi->tx_channel_0_enable = drvdata->tx_mask;
0043         multi->tx_channel_1_enable = 0;
0044         multi->tx_channel_2_enable = 0;
0045         multi->tx_channel_3_enable = 0;
0046 
0047         multi->rx_channel_0_enable = drvdata->rx_mask;
0048         multi->rx_channel_1_enable = 0;
0049         multi->rx_channel_2_enable = 0;
0050         multi->rx_channel_3_enable = 0;
0051 
0052         dev_dbg(dai->dev,
0053             "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
0054             __func__, drvdata->slots, multi->tx_channel_0_enable,
0055             multi->rx_channel_0_enable);
0056     }
0057 
0058     return 0;
0059 }
0060 
0061 static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
0062             struct msp_protdesc *prot_desc)
0063 {
0064     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0065 
0066     switch (drvdata->slots) {
0067     case 1:
0068         switch (rate) {
0069         case 8000:
0070             prot_desc->frame_period =
0071                 FRAME_PER_SINGLE_SLOT_8_KHZ;
0072             break;
0073 
0074         case 16000:
0075             prot_desc->frame_period =
0076                 FRAME_PER_SINGLE_SLOT_16_KHZ;
0077             break;
0078 
0079         case 44100:
0080             prot_desc->frame_period =
0081                 FRAME_PER_SINGLE_SLOT_44_1_KHZ;
0082             break;
0083 
0084         case 48000:
0085             prot_desc->frame_period =
0086                 FRAME_PER_SINGLE_SLOT_48_KHZ;
0087             break;
0088 
0089         default:
0090             dev_err(dai->dev,
0091                 "%s: Error: Unsupported sample-rate (freq = %d)!\n",
0092                 __func__, rate);
0093             return -EINVAL;
0094         }
0095         break;
0096 
0097     case 2:
0098         prot_desc->frame_period = FRAME_PER_2_SLOTS;
0099         break;
0100 
0101     case 8:
0102         prot_desc->frame_period = FRAME_PER_8_SLOTS;
0103         break;
0104 
0105     case 16:
0106         prot_desc->frame_period = FRAME_PER_16_SLOTS;
0107         break;
0108     default:
0109         dev_err(dai->dev,
0110             "%s: Error: Unsupported slot-count (slots = %d)!\n",
0111             __func__, drvdata->slots);
0112         return -EINVAL;
0113     }
0114 
0115     prot_desc->clocks_per_frame =
0116             prot_desc->frame_period+1;
0117 
0118     dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
0119         __func__,
0120         prot_desc->clocks_per_frame);
0121 
0122     return 0;
0123 }
0124 
0125 static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
0126             struct msp_protdesc *prot_desc)
0127 {
0128     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0129 
0130     u32 frame_length = MSP_FRAME_LEN_1;
0131 
0132     prot_desc->frame_width = 0;
0133 
0134     switch (drvdata->slots) {
0135     case 1:
0136         frame_length = MSP_FRAME_LEN_1;
0137         break;
0138 
0139     case 2:
0140         frame_length = MSP_FRAME_LEN_2;
0141         break;
0142 
0143     case 8:
0144         frame_length = MSP_FRAME_LEN_8;
0145         break;
0146 
0147     case 16:
0148         frame_length = MSP_FRAME_LEN_16;
0149         break;
0150     default:
0151         dev_err(dai->dev,
0152             "%s: Error: Unsupported slot-count (slots = %d)!\n",
0153             __func__, drvdata->slots);
0154         return -EINVAL;
0155     }
0156 
0157     prot_desc->tx_frame_len_1 = frame_length;
0158     prot_desc->rx_frame_len_1 = frame_length;
0159     prot_desc->tx_frame_len_2 = frame_length;
0160     prot_desc->rx_frame_len_2 = frame_length;
0161 
0162     prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
0163     prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
0164     prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
0165     prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
0166 
0167     return setup_frameper(dai, rate, prot_desc);
0168 }
0169 
0170 static int setup_clocking(struct snd_soc_dai *dai,
0171             unsigned int fmt,
0172             struct ux500_msp_config *msp_config)
0173 {
0174     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0175     case SND_SOC_DAIFMT_NB_NF:
0176         break;
0177 
0178     case SND_SOC_DAIFMT_NB_IF:
0179         msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
0180         msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
0181 
0182         break;
0183 
0184     default:
0185         dev_err(dai->dev,
0186             "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
0187             __func__, fmt);
0188 
0189         return -EINVAL;
0190     }
0191 
0192     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0193     case SND_SOC_DAIFMT_BC_FC:
0194         dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
0195 
0196         msp_config->iodelay = 0x20;
0197         msp_config->rx_fsync_sel = 0;
0198         msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
0199         msp_config->tx_clk_sel = 0;
0200         msp_config->rx_clk_sel = 0;
0201         msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
0202 
0203         break;
0204 
0205     case SND_SOC_DAIFMT_BP_FP:
0206         dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
0207 
0208         msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
0209         msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
0210         msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
0211         msp_config->rx_fsync_sel = RX_SYNC_SRG;
0212         msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
0213 
0214         break;
0215 
0216     default:
0217         dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
0218             __func__, fmt);
0219 
0220         return -EINVAL;
0221     }
0222 
0223     return 0;
0224 }
0225 
0226 static int setup_pcm_protdesc(struct snd_soc_dai *dai,
0227                 unsigned int fmt,
0228                 struct msp_protdesc *prot_desc)
0229 {
0230     prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
0231     prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
0232     prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
0233     prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
0234     prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
0235     prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
0236     prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
0237     prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
0238 
0239     if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
0240         dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
0241         prot_desc->rx_clk_pol = MSP_RISING_EDGE;
0242         prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
0243 
0244         prot_desc->rx_data_delay = MSP_DELAY_1;
0245         prot_desc->tx_data_delay = MSP_DELAY_1;
0246     } else {
0247         dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
0248         prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
0249         prot_desc->tx_clk_pol = MSP_RISING_EDGE;
0250 
0251         prot_desc->rx_data_delay = MSP_DELAY_0;
0252         prot_desc->tx_data_delay = MSP_DELAY_0;
0253     }
0254 
0255     prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
0256     prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
0257     prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
0258     prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
0259     prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
0260 
0261     return 0;
0262 }
0263 
0264 static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
0265 {
0266     prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
0267     prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
0268     prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
0269     prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
0270     prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
0271     prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
0272     prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
0273     prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
0274 
0275     prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
0276     prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
0277     prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
0278     prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
0279     prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
0280     prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
0281     prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
0282     prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
0283 
0284     prot_desc->rx_clk_pol = MSP_RISING_EDGE;
0285     prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
0286 
0287     prot_desc->rx_data_delay = MSP_DELAY_0;
0288     prot_desc->tx_data_delay = MSP_DELAY_0;
0289 
0290     prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
0291     prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
0292     prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
0293     prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
0294     prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
0295 
0296     return 0;
0297 }
0298 
0299 static int setup_msp_config(struct snd_pcm_substream *substream,
0300             struct snd_soc_dai *dai,
0301             struct ux500_msp_config *msp_config)
0302 {
0303     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0304     struct msp_protdesc *prot_desc = &msp_config->protdesc;
0305     struct snd_pcm_runtime *runtime = substream->runtime;
0306     unsigned int fmt = drvdata->fmt;
0307     int ret;
0308 
0309     memset(msp_config, 0, sizeof(*msp_config));
0310 
0311     msp_config->f_inputclk = drvdata->master_clk;
0312 
0313     msp_config->tx_fifo_config = TX_FIFO_ENABLE;
0314     msp_config->rx_fifo_config = RX_FIFO_ENABLE;
0315     msp_config->def_elem_len = 1;
0316     msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
0317                 MSP_DIR_TX : MSP_DIR_RX;
0318     msp_config->data_size = MSP_DATA_BITS_32;
0319     msp_config->frame_freq = runtime->rate;
0320 
0321     dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
0322            __func__, msp_config->f_inputclk, msp_config->frame_freq);
0323     /* To avoid division by zero */
0324     prot_desc->clocks_per_frame = 1;
0325 
0326     dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
0327         runtime->rate, runtime->channels);
0328     switch (fmt &
0329         (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
0330     case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
0331         dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
0332 
0333         msp_config->default_protdesc = 1;
0334         msp_config->protocol = MSP_I2S_PROTOCOL;
0335         break;
0336 
0337     case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
0338         dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
0339 
0340         msp_config->data_size = MSP_DATA_BITS_16;
0341         msp_config->protocol = MSP_I2S_PROTOCOL;
0342 
0343         ret = setup_i2s_protdesc(prot_desc);
0344         if (ret < 0)
0345             return ret;
0346 
0347         break;
0348 
0349     case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
0350     case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
0351     case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
0352     case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
0353         dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
0354 
0355         msp_config->data_size = MSP_DATA_BITS_16;
0356         msp_config->protocol = MSP_PCM_PROTOCOL;
0357 
0358         ret = setup_pcm_protdesc(dai, fmt, prot_desc);
0359         if (ret < 0)
0360             return ret;
0361 
0362         ret = setup_pcm_multichan(dai, msp_config);
0363         if (ret < 0)
0364             return ret;
0365 
0366         ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
0367         if (ret < 0)
0368             return ret;
0369 
0370         break;
0371 
0372     default:
0373         dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
0374             __func__, fmt);
0375         return -EINVAL;
0376     }
0377 
0378     return setup_clocking(dai, fmt, msp_config);
0379 }
0380 
0381 static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
0382                 struct snd_soc_dai *dai)
0383 {
0384     int ret = 0;
0385     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0386 
0387     dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
0388         snd_pcm_stream_str(substream));
0389 
0390     /* Enable regulator */
0391     ret = regulator_enable(drvdata->reg_vape);
0392     if (ret != 0) {
0393         dev_err(drvdata->msp->dev,
0394             "%s: Failed to enable regulator!\n", __func__);
0395         return ret;
0396     }
0397 
0398     /* Prepare and enable clocks */
0399     dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
0400     ret = clk_prepare_enable(drvdata->pclk);
0401     if (ret) {
0402         dev_err(drvdata->msp->dev,
0403             "%s: Failed to prepare/enable pclk!\n", __func__);
0404         goto err_pclk;
0405     }
0406 
0407     ret = clk_prepare_enable(drvdata->clk);
0408     if (ret) {
0409         dev_err(drvdata->msp->dev,
0410             "%s: Failed to prepare/enable clk!\n", __func__);
0411         goto err_clk;
0412     }
0413 
0414     return ret;
0415 err_clk:
0416     clk_disable_unprepare(drvdata->pclk);
0417 err_pclk:
0418     regulator_disable(drvdata->reg_vape);
0419     return ret;
0420 }
0421 
0422 static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
0423                 struct snd_soc_dai *dai)
0424 {
0425     int ret;
0426     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0427     bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
0428 
0429     dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
0430         snd_pcm_stream_str(substream));
0431 
0432     if (drvdata->vape_opp_constraint == 1) {
0433         prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
0434                     "ux500_msp_i2s", 50);
0435         drvdata->vape_opp_constraint = 0;
0436     }
0437 
0438     if (ux500_msp_i2s_close(drvdata->msp,
0439                 is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
0440         dev_err(dai->dev,
0441             "%s: Error: MSP %d (%s): Unable to close i2s.\n",
0442             __func__, dai->id, snd_pcm_stream_str(substream));
0443     }
0444 
0445     /* Disable and unprepare clocks */
0446     clk_disable_unprepare(drvdata->clk);
0447     clk_disable_unprepare(drvdata->pclk);
0448 
0449     /* Disable regulator */
0450     ret = regulator_disable(drvdata->reg_vape);
0451     if (ret < 0)
0452         dev_err(dai->dev,
0453             "%s: ERROR: Failed to disable regulator (%d)!\n",
0454             __func__, ret);
0455 }
0456 
0457 static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
0458                 struct snd_soc_dai *dai)
0459 {
0460     int ret = 0;
0461     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0462     struct snd_pcm_runtime *runtime = substream->runtime;
0463     struct ux500_msp_config msp_config;
0464 
0465     dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
0466         dai->id, snd_pcm_stream_str(substream), runtime->rate);
0467 
0468     setup_msp_config(substream, dai, &msp_config);
0469 
0470     ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
0471     if (ret < 0) {
0472         dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
0473             __func__, ret);
0474         return ret;
0475     }
0476 
0477     /* Set OPP-level */
0478     if ((drvdata->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) &&
0479         (drvdata->msp->f_bitclk > 19200000)) {
0480         /* If the bit-clock is higher than 19.2MHz, Vape should be
0481          * run in 100% OPP. Only when bit-clock is used (MSP master)
0482          */
0483         prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
0484                     "ux500-msp-i2s", 100);
0485         drvdata->vape_opp_constraint = 1;
0486     } else {
0487         prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
0488                     "ux500-msp-i2s", 50);
0489         drvdata->vape_opp_constraint = 0;
0490     }
0491 
0492     return ret;
0493 }
0494 
0495 static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
0496                 struct snd_pcm_hw_params *params,
0497                 struct snd_soc_dai *dai)
0498 {
0499     unsigned int mask, slots_active;
0500     struct snd_pcm_runtime *runtime = substream->runtime;
0501     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0502 
0503     dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
0504             __func__, dai->id, snd_pcm_stream_str(substream));
0505 
0506     switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0507     case SND_SOC_DAIFMT_I2S:
0508         snd_pcm_hw_constraint_minmax(runtime,
0509                 SNDRV_PCM_HW_PARAM_CHANNELS,
0510                 1, 2);
0511         break;
0512 
0513     case SND_SOC_DAIFMT_DSP_B:
0514     case SND_SOC_DAIFMT_DSP_A:
0515         mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
0516             drvdata->tx_mask :
0517             drvdata->rx_mask;
0518 
0519         slots_active = hweight32(mask);
0520         dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
0521 
0522         snd_pcm_hw_constraint_single(runtime,
0523                 SNDRV_PCM_HW_PARAM_CHANNELS,
0524                 slots_active);
0525         break;
0526 
0527     default:
0528         dev_err(dai->dev,
0529             "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
0530             __func__, drvdata->fmt);
0531         return -EINVAL;
0532     }
0533 
0534     return 0;
0535 }
0536 
0537 static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
0538                 unsigned int fmt)
0539 {
0540     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0541 
0542     dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
0543 
0544     switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
0545         SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
0546     case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
0547     case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
0548     case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
0549     case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
0550     case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
0551     case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
0552         break;
0553 
0554     default:
0555         dev_err(dai->dev,
0556             "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
0557             __func__, drvdata->fmt);
0558         return -EINVAL;
0559     }
0560 
0561     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0562     case SND_SOC_DAIFMT_NB_NF:
0563     case SND_SOC_DAIFMT_NB_IF:
0564     case SND_SOC_DAIFMT_IB_IF:
0565         break;
0566 
0567     default:
0568         dev_err(dai->dev,
0569             "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
0570             __func__, drvdata->fmt);
0571         return -EINVAL;
0572     }
0573 
0574     drvdata->fmt = fmt;
0575     return 0;
0576 }
0577 
0578 static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
0579                 unsigned int tx_mask,
0580                 unsigned int rx_mask,
0581                 int slots, int slot_width)
0582 {
0583     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0584     unsigned int cap;
0585 
0586     switch (slots) {
0587     case 1:
0588         cap = 0x01;
0589         break;
0590     case 2:
0591         cap = 0x03;
0592         break;
0593     case 8:
0594         cap = 0xFF;
0595         break;
0596     case 16:
0597         cap = 0xFFFF;
0598         break;
0599     default:
0600         dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
0601             __func__, slots);
0602         return -EINVAL;
0603     }
0604     drvdata->slots = slots;
0605 
0606     if (!(slot_width == 16)) {
0607         dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
0608             __func__, slot_width);
0609         return -EINVAL;
0610     }
0611     drvdata->slot_width = slot_width;
0612 
0613     drvdata->tx_mask = tx_mask & cap;
0614     drvdata->rx_mask = rx_mask & cap;
0615 
0616     return 0;
0617 }
0618 
0619 static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
0620                     int clk_id, unsigned int freq, int dir)
0621 {
0622     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0623 
0624     dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
0625         __func__, dai->id, clk_id, freq);
0626 
0627     switch (clk_id) {
0628     case UX500_MSP_MASTER_CLOCK:
0629         drvdata->master_clk = freq;
0630         break;
0631 
0632     default:
0633         dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
0634             __func__, dai->id, clk_id);
0635         return -EINVAL;
0636     }
0637 
0638     return 0;
0639 }
0640 
0641 static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
0642                 int cmd, struct snd_soc_dai *dai)
0643 {
0644     int ret = 0;
0645     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0646 
0647     dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
0648         __func__, dai->id, snd_pcm_stream_str(substream),
0649         (int)drvdata->msp->id, cmd);
0650 
0651     ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
0652 
0653     return ret;
0654 }
0655 
0656 static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
0657 {
0658     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0659     struct snd_dmaengine_dai_dma_data *playback_dma_data;
0660     struct snd_dmaengine_dai_dma_data *capture_dma_data;
0661 
0662     playback_dma_data = devm_kzalloc(dai->dev,
0663                      sizeof(*playback_dma_data),
0664                      GFP_KERNEL);
0665     if (!playback_dma_data)
0666         return -ENOMEM;
0667 
0668     capture_dma_data = devm_kzalloc(dai->dev,
0669                     sizeof(*capture_dma_data),
0670                     GFP_KERNEL);
0671     if (!capture_dma_data)
0672         return -ENOMEM;
0673 
0674     playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
0675     capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
0676 
0677     playback_dma_data->maxburst = 4;
0678     capture_dma_data->maxburst = 4;
0679 
0680     snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
0681 
0682     return 0;
0683 }
0684 
0685 static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
0686 {
0687     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
0688     struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
0689     int ret;
0690 
0691     if (!pdata) {
0692         ret = ux500_msp_dai_of_probe(dai);
0693         return ret;
0694     }
0695 
0696     drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
0697     drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
0698 
0699     snd_soc_dai_init_dma_data(dai,
0700                   &drvdata->msp->playback_dma_data,
0701                   &drvdata->msp->capture_dma_data);
0702     return 0;
0703 }
0704 
0705 static const struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
0706     {
0707         .set_sysclk = ux500_msp_dai_set_dai_sysclk,
0708         .set_fmt = ux500_msp_dai_set_dai_fmt,
0709         .set_tdm_slot = ux500_msp_dai_set_tdm_slot,
0710         .startup = ux500_msp_dai_startup,
0711         .shutdown = ux500_msp_dai_shutdown,
0712         .prepare = ux500_msp_dai_prepare,
0713         .trigger = ux500_msp_dai_trigger,
0714         .hw_params = ux500_msp_dai_hw_params,
0715     }
0716 };
0717 
0718 static struct snd_soc_dai_driver ux500_msp_dai_drv = {
0719     .probe                 = ux500_msp_dai_probe,
0720     .playback.channels_min = UX500_MSP_MIN_CHANNELS,
0721     .playback.channels_max = UX500_MSP_MAX_CHANNELS,
0722     .playback.rates        = UX500_I2S_RATES,
0723     .playback.formats      = UX500_I2S_FORMATS,
0724     .capture.channels_min  = UX500_MSP_MIN_CHANNELS,
0725     .capture.channels_max  = UX500_MSP_MAX_CHANNELS,
0726     .capture.rates         = UX500_I2S_RATES,
0727     .capture.formats       = UX500_I2S_FORMATS,
0728     .ops                   = ux500_msp_dai_ops,
0729 };
0730 
0731 static const struct snd_soc_component_driver ux500_msp_component = {
0732     .name           = "ux500-msp",
0733     .legacy_dai_naming  = 1,
0734 };
0735 
0736 
0737 static int ux500_msp_drv_probe(struct platform_device *pdev)
0738 {
0739     struct ux500_msp_i2s_drvdata *drvdata;
0740     struct msp_i2s_platform_data *pdata = pdev->dev.platform_data;
0741     struct device_node *np = pdev->dev.of_node;
0742     int ret = 0;
0743 
0744     if (!pdata && !np) {
0745         dev_err(&pdev->dev, "No platform data or Device Tree found\n");
0746         return -ENODEV;
0747     }
0748 
0749     drvdata = devm_kzalloc(&pdev->dev,
0750                 sizeof(struct ux500_msp_i2s_drvdata),
0751                 GFP_KERNEL);
0752     if (!drvdata)
0753         return -ENOMEM;
0754 
0755     drvdata->fmt = 0;
0756     drvdata->slots = 1;
0757     drvdata->tx_mask = 0x01;
0758     drvdata->rx_mask = 0x01;
0759     drvdata->slot_width = 16;
0760     drvdata->master_clk = MSP_INPUT_FREQ_APB;
0761 
0762     drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
0763     if (IS_ERR(drvdata->reg_vape)) {
0764         ret = (int)PTR_ERR(drvdata->reg_vape);
0765         dev_err(&pdev->dev,
0766             "%s: ERROR: Failed to get Vape supply (%d)!\n",
0767             __func__, ret);
0768         return ret;
0769     }
0770     prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
0771 
0772     drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
0773     if (IS_ERR(drvdata->pclk)) {
0774         ret = (int)PTR_ERR(drvdata->pclk);
0775         dev_err(&pdev->dev,
0776             "%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
0777             __func__, ret);
0778         return ret;
0779     }
0780 
0781     drvdata->clk = devm_clk_get(&pdev->dev, NULL);
0782     if (IS_ERR(drvdata->clk)) {
0783         ret = (int)PTR_ERR(drvdata->clk);
0784         dev_err(&pdev->dev,
0785             "%s: ERROR: devm_clk_get failed (%d)!\n",
0786             __func__, ret);
0787         return ret;
0788     }
0789 
0790     ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp,
0791                 pdev->dev.platform_data);
0792     if (!drvdata->msp) {
0793         dev_err(&pdev->dev,
0794             "%s: ERROR: Failed to init MSP-struct (%d)!",
0795             __func__, ret);
0796         return ret;
0797     }
0798     dev_set_drvdata(&pdev->dev, drvdata);
0799 
0800     ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
0801                      &ux500_msp_dai_drv, 1);
0802     if (ret < 0) {
0803         dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
0804             __func__, drvdata->msp->id);
0805         return ret;
0806     }
0807 
0808     ret = ux500_pcm_register_platform(pdev);
0809     if (ret < 0) {
0810         dev_err(&pdev->dev,
0811             "Error: %s: Failed to register PCM platform device!\n",
0812             __func__);
0813         goto err_reg_plat;
0814     }
0815 
0816     return 0;
0817 
0818 err_reg_plat:
0819     snd_soc_unregister_component(&pdev->dev);
0820     return ret;
0821 }
0822 
0823 static int ux500_msp_drv_remove(struct platform_device *pdev)
0824 {
0825     struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
0826 
0827     ux500_pcm_unregister_platform(pdev);
0828 
0829     snd_soc_unregister_component(&pdev->dev);
0830 
0831     prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
0832 
0833     ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
0834 
0835     return 0;
0836 }
0837 
0838 static const struct of_device_id ux500_msp_i2s_match[] = {
0839     { .compatible = "stericsson,ux500-msp-i2s", },
0840     {},
0841 };
0842 MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
0843 
0844 static struct platform_driver msp_i2s_driver = {
0845     .driver = {
0846         .name = "ux500-msp-i2s",
0847         .of_match_table = ux500_msp_i2s_match,
0848     },
0849     .probe = ux500_msp_drv_probe,
0850     .remove = ux500_msp_drv_remove,
0851 };
0852 module_platform_driver(msp_i2s_driver);
0853 
0854 MODULE_LICENSE("GPL v2");
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