soc/tegra/tegra210_dmic.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // tegra210_dmic.c - Tegra210 DMIC driver
0004 //
0005 // Copyright (c) 2020 NVIDIA CORPORATION.  All rights reserved.
0006
0007 #include <linux/clk.h>
0008 #include <linux/device.h>
0009 #include <linux/math64.h>
0010 #include <linux/module.h>
0011 #include <linux/of_device.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/pm_runtime.h>
0014 #include <linux/regmap.h>
0015 #include <sound/core.h>
0016 #include <sound/pcm_params.h>
0017 #include <sound/soc.h>
0018 #include "tegra210_dmic.h"
0019 #include "tegra_cif.h"
0020
0021 static const struct reg_default tegra210_dmic_reg_defaults[] = {
0022     { TEGRA210_DMIC_TX_INT_MASK, 0x00000001 },
0023     { TEGRA210_DMIC_TX_CIF_CTRL, 0x00007700 },
0024     { TEGRA210_DMIC_CG, 0x1 },
0025     { TEGRA210_DMIC_CTRL, 0x00000301 },
0026     /* Below enables all filters - DCR, LP and SC */
0027     { TEGRA210_DMIC_DBG_CTRL, 0xe },
0028     /* Below as per latest POR value */
0029     { TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4, 0x0 },
0030     /* LP filter is configured for pass through and used to apply gain */
0031     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_0, 0x00800000 },
0032     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_1, 0x0 },
0033     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_2, 0x0 },
0034     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_3, 0x0 },
0035     { TEGRA210_DMIC_LP_BIQUAD_0_COEF_4, 0x0 },
0036     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_0, 0x00800000 },
0037     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_1, 0x0 },
0038     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_2, 0x0 },
0039     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_3, 0x0 },
0040     { TEGRA210_DMIC_LP_BIQUAD_1_COEF_4, 0x0 },
0041 };
0042
0043 static int __maybe_unused tegra210_dmic_runtime_suspend(struct device *dev)
0044 {
0045     struct tegra210_dmic *dmic = dev_get_drvdata(dev);
0046
0047     regcache_cache_only(dmic->regmap, true);
0048     regcache_mark_dirty(dmic->regmap);
0049
0050     clk_disable_unprepare(dmic->clk_dmic);
0051
0052     return 0;
0053 }
0054
0055 static int __maybe_unused tegra210_dmic_runtime_resume(struct device *dev)
0056 {
0057     struct tegra210_dmic *dmic = dev_get_drvdata(dev);
0058     int err;
0059
0060     err = clk_prepare_enable(dmic->clk_dmic);
0061     if (err) {
0062         dev_err(dev, "failed to enable DMIC clock, err: %d\n", err);
0063         return err;
0064     }
0065
0066     regcache_cache_only(dmic->regmap, false);
0067     regcache_sync(dmic->regmap);
0068
0069     return 0;
0070 }
0071
0072 static int tegra210_dmic_hw_params(struct snd_pcm_substream *substream,
0073                    struct snd_pcm_hw_params *params,
0074                    struct snd_soc_dai *dai)
0075 {
0076     struct tegra210_dmic *dmic = snd_soc_dai_get_drvdata(dai);
0077     unsigned int srate, clk_rate, channels;
0078     struct tegra_cif_conf cif_conf;
0079     unsigned long long gain_q23 = DEFAULT_GAIN_Q23;
0080     int err;
0081
0082     memset(&cif_conf, 0, sizeof(struct tegra_cif_conf));
0083
0084     channels = params_channels(params);
0085
0086     cif_conf.audio_ch = channels;
0087
0088     switch (dmic->ch_select) {
0089     case DMIC_CH_SELECT_LEFT:
0090     case DMIC_CH_SELECT_RIGHT:
0091         cif_conf.client_ch = 1;
0092         break;
0093     case DMIC_CH_SELECT_STEREO:
0094         cif_conf.client_ch = 2;
0095         break;
0096     default:
0097         dev_err(dai->dev, "invalid DMIC client channels\n");
0098         return -EINVAL;
0099     }
0100
0101     srate = params_rate(params);
0102
0103     /*
0104      * DMIC clock rate is a multiple of 'Over Sampling Ratio' and
0105      * 'Sample Rate'. The supported OSR values are 64, 128 and 256.
0106      */
0107     clk_rate = (DMIC_OSR_FACTOR << dmic->osr_val) * srate;
0108
0109     err = clk_set_rate(dmic->clk_dmic, clk_rate);
0110     if (err) {
0111         dev_err(dai->dev, "can't set DMIC clock rate %u, err: %d\n",
0112             clk_rate, err);
0113         return err;
0114     }
0115
0116     regmap_update_bits(dmic->regmap,
0117                /* Reg */
0118                TEGRA210_DMIC_CTRL,
0119                /* Mask */
0120                TEGRA210_DMIC_CTRL_LRSEL_POLARITY_MASK |
0121                TEGRA210_DMIC_CTRL_OSR_MASK |
0122                TEGRA210_DMIC_CTRL_CHANNEL_SELECT_MASK,
0123                /* Value */
0124                (dmic->lrsel << LRSEL_POL_SHIFT) |
0125                (dmic->osr_val << OSR_SHIFT) |
0126                ((dmic->ch_select + 1) << CH_SEL_SHIFT));
0127
0128     /*
0129      * Use LP filter gain register to apply boost.
0130      * Boost Gain Volume control has 100x factor.
0131      */
0132     if (dmic->boost_gain)
0133         gain_q23 = div_u64(gain_q23 * dmic->boost_gain, 100);
0134
0135     regmap_write(dmic->regmap, TEGRA210_DMIC_LP_FILTER_GAIN,
0136              (unsigned int)gain_q23);
0137
0138     switch (params_format(params)) {
0139     case SNDRV_PCM_FORMAT_S16_LE:
0140         cif_conf.audio_bits = TEGRA_ACIF_BITS_16;
0141         break;
0142     case SNDRV_PCM_FORMAT_S32_LE:
0143         cif_conf.audio_bits = TEGRA_ACIF_BITS_32;
0144         break;
0145     default:
0146         dev_err(dai->dev, "unsupported format!\n");
0147         return -EOPNOTSUPP;
0148     }
0149
0150     cif_conf.client_bits = TEGRA_ACIF_BITS_24;
0151     cif_conf.mono_conv = dmic->mono_to_stereo;
0152     cif_conf.stereo_conv = dmic->stereo_to_mono;
0153
0154     tegra_set_cif(dmic->regmap, TEGRA210_DMIC_TX_CIF_CTRL, &cif_conf);
0155
0156     return 0;
0157 }
0158
0159 static int tegra210_dmic_get_boost_gain(struct snd_kcontrol *kcontrol,
0160                     struct snd_ctl_elem_value *ucontrol)
0161 {
0162     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0163     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0164
0165     ucontrol->value.integer.value[0] = dmic->boost_gain;
0166
0167     return 0;
0168 }
0169
0170 static int tegra210_dmic_put_boost_gain(struct snd_kcontrol *kcontrol,
0171                     struct snd_ctl_elem_value *ucontrol)
0172 {
0173     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0174     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0175     int value = ucontrol->value.integer.value[0];
0176
0177     if (value == dmic->boost_gain)
0178         return 0;
0179
0180     dmic->boost_gain = value;
0181
0182     return 1;
0183 }
0184
0185 static int tegra210_dmic_get_ch_select(struct snd_kcontrol *kcontrol,
0186                        struct snd_ctl_elem_value *ucontrol)
0187 {
0188     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0189     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0190
0191     ucontrol->value.enumerated.item[0] = dmic->ch_select;
0192
0193     return 0;
0194 }
0195
0196 static int tegra210_dmic_put_ch_select(struct snd_kcontrol *kcontrol,
0197                        struct snd_ctl_elem_value *ucontrol)
0198 {
0199     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0200     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0201     unsigned int value = ucontrol->value.enumerated.item[0];
0202
0203     if (value == dmic->ch_select)
0204         return 0;
0205
0206     dmic->ch_select = value;
0207
0208     return 1;
0209 }
0210
0211 static int tegra210_dmic_get_mono_to_stereo(struct snd_kcontrol *kcontrol,
0212                         struct snd_ctl_elem_value *ucontrol)
0213 {
0214     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0215     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0216
0217     ucontrol->value.enumerated.item[0] = dmic->mono_to_stereo;
0218
0219     return 0;
0220 }
0221
0222 static int tegra210_dmic_put_mono_to_stereo(struct snd_kcontrol *kcontrol,
0223                         struct snd_ctl_elem_value *ucontrol)
0224 {
0225     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0226     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0227     unsigned int value = ucontrol->value.enumerated.item[0];
0228
0229     if (value == dmic->mono_to_stereo)
0230         return 0;
0231
0232     dmic->mono_to_stereo = value;
0233
0234     return 1;
0235 }
0236
0237 static int tegra210_dmic_get_stereo_to_mono(struct snd_kcontrol *kcontrol,
0238                         struct snd_ctl_elem_value *ucontrol)
0239 {
0240     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0241     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0242
0243     ucontrol->value.enumerated.item[0] = dmic->stereo_to_mono;
0244
0245     return 0;
0246 }
0247
0248 static int tegra210_dmic_put_stereo_to_mono(struct snd_kcontrol *kcontrol,
0249                         struct snd_ctl_elem_value *ucontrol)
0250 {
0251     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0252     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0253     unsigned int value = ucontrol->value.enumerated.item[0];
0254
0255     if (value == dmic->stereo_to_mono)
0256         return 0;
0257
0258     dmic->stereo_to_mono = value;
0259
0260     return 1;
0261 }
0262
0263 static int tegra210_dmic_get_osr_val(struct snd_kcontrol *kcontrol,
0264                      struct snd_ctl_elem_value *ucontrol)
0265 {
0266     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0267     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0268
0269     ucontrol->value.enumerated.item[0] = dmic->osr_val;
0270
0271     return 0;
0272 }
0273
0274 static int tegra210_dmic_put_osr_val(struct snd_kcontrol *kcontrol,
0275                      struct snd_ctl_elem_value *ucontrol)
0276 {
0277     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0278     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0279     unsigned int value = ucontrol->value.enumerated.item[0];
0280
0281     if (value == dmic->osr_val)
0282         return 0;
0283
0284     dmic->osr_val = value;
0285
0286     return 1;
0287 }
0288
0289 static int tegra210_dmic_get_pol_sel(struct snd_kcontrol *kcontrol,
0290                      struct snd_ctl_elem_value *ucontrol)
0291 {
0292     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0293     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0294
0295     ucontrol->value.enumerated.item[0] = dmic->lrsel;
0296
0297     return 0;
0298 }
0299
0300 static int tegra210_dmic_put_pol_sel(struct snd_kcontrol *kcontrol,
0301                      struct snd_ctl_elem_value *ucontrol)
0302 {
0303     struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
0304     struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
0305     unsigned int value = ucontrol->value.enumerated.item[0];
0306
0307     if (value == dmic->lrsel)
0308         return 0;
0309
0310     dmic->lrsel = value;
0311
0312     return 1;
0313 }
0314
0315 static const struct snd_soc_dai_ops tegra210_dmic_dai_ops = {
0316     .hw_params  = tegra210_dmic_hw_params,
0317 };
0318
0319 static struct snd_soc_dai_driver tegra210_dmic_dais[] = {
0320     {
0321         .name = "DMIC-CIF",
0322         .capture = {
0323             .stream_name = "CIF-Capture",
0324             .channels_min = 1,
0325             .channels_max = 2,
0326             .rates = SNDRV_PCM_RATE_8000_48000,
0327             .formats = SNDRV_PCM_FMTBIT_S16_LE |
0328                    SNDRV_PCM_FMTBIT_S32_LE,
0329         },
0330     },
0331     {
0332         .name = "DMIC-DAP",
0333         .capture = {
0334             .stream_name = "DAP-Capture",
0335             .channels_min = 1,
0336             .channels_max = 2,
0337             .rates = SNDRV_PCM_RATE_8000_48000,
0338             .formats = SNDRV_PCM_FMTBIT_S16_LE |
0339                    SNDRV_PCM_FMTBIT_S32_LE,
0340         },
0341         .ops = &tegra210_dmic_dai_ops,
0342         .symmetric_rate = 1,
0343     },
0344 };
0345
0346 static const struct snd_soc_dapm_widget tegra210_dmic_widgets[] = {
0347     SND_SOC_DAPM_AIF_OUT("TX", NULL, 0, TEGRA210_DMIC_ENABLE, 0, 0),
0348     SND_SOC_DAPM_MIC("MIC", NULL),
0349 };
0350
0351 static const struct snd_soc_dapm_route tegra210_dmic_routes[] = {
0352     { "XBAR-RX",        NULL,   "XBAR-Capture" },
0353     { "XBAR-Capture",   NULL,   "CIF-Capture" },
0354     { "CIF-Capture",    NULL,   "TX" },
0355     { "TX",         NULL,   "DAP-Capture" },
0356     { "DAP-Capture",    NULL,   "MIC" },
0357 };
0358
0359 static const char * const tegra210_dmic_ch_select[] = {
0360     "Left", "Right", "Stereo",
0361 };
0362
0363 static const struct soc_enum tegra210_dmic_ch_enum =
0364     SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_ch_select),
0365             tegra210_dmic_ch_select);
0366
0367 static const char * const tegra210_dmic_mono_conv_text[] = {
0368     "Zero", "Copy",
0369 };
0370
0371 static const char * const tegra210_dmic_stereo_conv_text[] = {
0372     "CH0", "CH1", "AVG",
0373 };
0374
0375 static const struct soc_enum tegra210_dmic_mono_conv_enum =
0376     SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_mono_conv_text),
0377             tegra210_dmic_mono_conv_text);
0378
0379 static const struct soc_enum tegra210_dmic_stereo_conv_enum =
0380     SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_stereo_conv_text),
0381             tegra210_dmic_stereo_conv_text);
0382
0383 static const char * const tegra210_dmic_osr_text[] = {
0384     "OSR_64", "OSR_128", "OSR_256",
0385 };
0386
0387 static const struct soc_enum tegra210_dmic_osr_enum =
0388     SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_osr_text),
0389             tegra210_dmic_osr_text);
0390
0391 static const char * const tegra210_dmic_lrsel_text[] = {
0392     "Left", "Right",
0393 };
0394
0395 static const struct soc_enum tegra210_dmic_lrsel_enum =
0396     SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_lrsel_text),
0397             tegra210_dmic_lrsel_text);
0398
0399 static const struct snd_kcontrol_new tegra210_dmic_controls[] = {
0400     SOC_SINGLE_EXT("Boost Gain Volume", 0, 0, MAX_BOOST_GAIN, 0,
0401                tegra210_dmic_get_boost_gain,
0402                tegra210_dmic_put_boost_gain),
0403     SOC_ENUM_EXT("Channel Select", tegra210_dmic_ch_enum,
0404              tegra210_dmic_get_ch_select, tegra210_dmic_put_ch_select),
0405     SOC_ENUM_EXT("Mono To Stereo",
0406              tegra210_dmic_mono_conv_enum,
0407              tegra210_dmic_get_mono_to_stereo,
0408              tegra210_dmic_put_mono_to_stereo),
0409     SOC_ENUM_EXT("Stereo To Mono",
0410              tegra210_dmic_stereo_conv_enum,
0411              tegra210_dmic_get_stereo_to_mono,
0412              tegra210_dmic_put_stereo_to_mono),
0413     SOC_ENUM_EXT("OSR Value", tegra210_dmic_osr_enum,
0414              tegra210_dmic_get_osr_val, tegra210_dmic_put_osr_val),
0415     SOC_ENUM_EXT("LR Polarity Select", tegra210_dmic_lrsel_enum,
0416              tegra210_dmic_get_pol_sel, tegra210_dmic_put_pol_sel),
0417 };
0418
0419 static const struct snd_soc_component_driver tegra210_dmic_compnt = {
0420     .dapm_widgets       = tegra210_dmic_widgets,
0421     .num_dapm_widgets   = ARRAY_SIZE(tegra210_dmic_widgets),
0422     .dapm_routes        = tegra210_dmic_routes,
0423     .num_dapm_routes    = ARRAY_SIZE(tegra210_dmic_routes),
0424     .controls       = tegra210_dmic_controls,
0425     .num_controls       = ARRAY_SIZE(tegra210_dmic_controls),
0426 };
0427
0428 static bool tegra210_dmic_wr_reg(struct device *dev, unsigned int reg)
0429 {
0430     switch (reg) {
0431     case TEGRA210_DMIC_TX_INT_MASK ... TEGRA210_DMIC_TX_CIF_CTRL:
0432     case TEGRA210_DMIC_ENABLE ... TEGRA210_DMIC_CG:
0433     case TEGRA210_DMIC_CTRL:
0434     case TEGRA210_DMIC_DBG_CTRL:
0435     case TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4 ... TEGRA210_DMIC_LP_BIQUAD_1_COEF_4:
0436         return true;
0437     default:
0438         return false;
0439     }
0440 }
0441
0442 static bool tegra210_dmic_rd_reg(struct device *dev, unsigned int reg)
0443 {
0444     if (tegra210_dmic_wr_reg(dev, reg))
0445         return true;
0446
0447     switch (reg) {
0448     case TEGRA210_DMIC_TX_STATUS:
0449     case TEGRA210_DMIC_TX_INT_STATUS:
0450     case TEGRA210_DMIC_STATUS:
0451     case TEGRA210_DMIC_INT_STATUS:
0452         return true;
0453     default:
0454         return false;
0455     }
0456 }
0457
0458 static bool tegra210_dmic_volatile_reg(struct device *dev, unsigned int reg)
0459 {
0460     switch (reg) {
0461     case TEGRA210_DMIC_TX_STATUS:
0462     case TEGRA210_DMIC_TX_INT_STATUS:
0463     case TEGRA210_DMIC_TX_INT_SET:
0464     case TEGRA210_DMIC_SOFT_RESET:
0465     case TEGRA210_DMIC_STATUS:
0466     case TEGRA210_DMIC_INT_STATUS:
0467         return true;
0468     default:
0469         return false;
0470     }
0471 }
0472
0473 static const struct regmap_config tegra210_dmic_regmap_config = {
0474     .reg_bits = 32,
0475     .reg_stride = 4,
0476     .val_bits = 32,
0477     .max_register = TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
0478     .writeable_reg = tegra210_dmic_wr_reg,
0479     .readable_reg = tegra210_dmic_rd_reg,
0480     .volatile_reg = tegra210_dmic_volatile_reg,
0481     .reg_defaults = tegra210_dmic_reg_defaults,
0482     .num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
0483     .cache_type = REGCACHE_FLAT,
0484 };
0485
0486 static int tegra210_dmic_probe(struct platform_device *pdev)
0487 {
0488     struct device *dev = &pdev->dev;
0489     struct tegra210_dmic *dmic;
0490     void __iomem *regs;
0491     int err;
0492
0493     dmic = devm_kzalloc(dev, sizeof(*dmic), GFP_KERNEL);
0494     if (!dmic)
0495         return -ENOMEM;
0496
0497     dmic->osr_val = DMIC_OSR_64;
0498     dmic->ch_select = DMIC_CH_SELECT_STEREO;
0499     dmic->lrsel = DMIC_LRSEL_LEFT;
0500     dmic->boost_gain = 0;
0501     dmic->stereo_to_mono = 0; /* "CH0" */
0502
0503     dev_set_drvdata(dev, dmic);
0504
0505     dmic->clk_dmic = devm_clk_get(dev, "dmic");
0506     if (IS_ERR(dmic->clk_dmic)) {
0507         dev_err(dev, "can't retrieve DMIC clock\n");
0508         return PTR_ERR(dmic->clk_dmic);
0509     }
0510
0511     regs = devm_platform_ioremap_resource(pdev, 0);
0512     if (IS_ERR(regs))
0513         return PTR_ERR(regs);
0514
0515     dmic->regmap = devm_regmap_init_mmio(dev, regs,
0516                          &tegra210_dmic_regmap_config);
0517     if (IS_ERR(dmic->regmap)) {
0518         dev_err(dev, "regmap init failed\n");
0519         return PTR_ERR(dmic->regmap);
0520     }
0521
0522     regcache_cache_only(dmic->regmap, true);
0523
0524     err = devm_snd_soc_register_component(dev, &tegra210_dmic_compnt,
0525                           tegra210_dmic_dais,
0526                           ARRAY_SIZE(tegra210_dmic_dais));
0527     if (err) {
0528         dev_err(dev, "can't register DMIC component, err: %d\n", err);
0529         return err;
0530     }
0531
0532     pm_runtime_enable(dev);
0533
0534     return 0;
0535 }
0536
0537 static int tegra210_dmic_remove(struct platform_device *pdev)
0538 {
0539     pm_runtime_disable(&pdev->dev);
0540
0541     return 0;
0542 }
0543
0544 static const struct dev_pm_ops tegra210_dmic_pm_ops = {
0545     SET_RUNTIME_PM_OPS(tegra210_dmic_runtime_suspend,
0546                tegra210_dmic_runtime_resume, NULL)
0547     SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0548                 pm_runtime_force_resume)
0549 };
0550
0551 static const struct of_device_id tegra210_dmic_of_match[] = {
0552     { .compatible = "nvidia,tegra210-dmic" },
0553     {},
0554 };
0555 MODULE_DEVICE_TABLE(of, tegra210_dmic_of_match);
0556
0557 static struct platform_driver tegra210_dmic_driver = {
0558     .driver = {
0559         .name = "tegra210-dmic",
0560         .of_match_table = tegra210_dmic_of_match,
0561         .pm = &tegra210_dmic_pm_ops,
0562     },
0563     .probe = tegra210_dmic_probe,
0564     .remove = tegra210_dmic_remove,
0565 };
0566 module_platform_driver(tegra210_dmic_driver)
0567
0568 MODULE_AUTHOR("Rahul Mittal <rmittal@nvidia.com>");
0569 MODULE_DESCRIPTION("Tegra210 ASoC DMIC driver");
0570 MODULE_LICENSE("GPL v2");