soc/sunxi/sun8i-adda-pr-regmap.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * This driver provides regmap to access to analog part of audio codec
0004  * found on Allwinner A23, A31s, A33, H3 and A64 Socs
0005  *
0006  * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
0007  * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
0008  */
0009
0010 #include <linux/io.h>
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/regmap.h>
0014
0015 #include "sun8i-adda-pr-regmap.h"
0016
0017 /* Analog control register access bits */
0018 #define ADDA_PR         0x0     /* PRCM base + 0x1c0 */
0019 #define ADDA_PR_RESET           BIT(28)
0020 #define ADDA_PR_WRITE           BIT(24)
0021 #define ADDA_PR_ADDR_SHIFT      16
0022 #define ADDA_PR_ADDR_MASK       GENMASK(4, 0)
0023 #define ADDA_PR_DATA_IN_SHIFT       8
0024 #define ADDA_PR_DATA_IN_MASK        GENMASK(7, 0)
0025 #define ADDA_PR_DATA_OUT_SHIFT      0
0026 #define ADDA_PR_DATA_OUT_MASK       GENMASK(7, 0)
0027
0028 /* regmap access bits */
0029 static int adda_reg_read(void *context, unsigned int reg, unsigned int *val)
0030 {
0031     void __iomem *base = (void __iomem *)context;
0032     u32 tmp;
0033
0034     /* De-assert reset */
0035     writel(readl(base) | ADDA_PR_RESET, base);
0036
0037     /* Clear write bit */
0038     writel(readl(base) & ~ADDA_PR_WRITE, base);
0039
0040     /* Set register address */
0041     tmp = readl(base);
0042     tmp &= ~(ADDA_PR_ADDR_MASK << ADDA_PR_ADDR_SHIFT);
0043     tmp |= (reg & ADDA_PR_ADDR_MASK) << ADDA_PR_ADDR_SHIFT;
0044     writel(tmp, base);
0045
0046     /* Read back value */
0047     *val = readl(base) & ADDA_PR_DATA_OUT_MASK;
0048
0049     return 0;
0050 }
0051
0052 static int adda_reg_write(void *context, unsigned int reg, unsigned int val)
0053 {
0054     void __iomem *base = (void __iomem *)context;
0055     u32 tmp;
0056
0057     /* De-assert reset */
0058     writel(readl(base) | ADDA_PR_RESET, base);
0059
0060     /* Set register address */
0061     tmp = readl(base);
0062     tmp &= ~(ADDA_PR_ADDR_MASK << ADDA_PR_ADDR_SHIFT);
0063     tmp |= (reg & ADDA_PR_ADDR_MASK) << ADDA_PR_ADDR_SHIFT;
0064     writel(tmp, base);
0065
0066     /* Set data to write */
0067     tmp = readl(base);
0068     tmp &= ~(ADDA_PR_DATA_IN_MASK << ADDA_PR_DATA_IN_SHIFT);
0069     tmp |= (val & ADDA_PR_DATA_IN_MASK) << ADDA_PR_DATA_IN_SHIFT;
0070     writel(tmp, base);
0071
0072     /* Set write bit to signal a write */
0073     writel(readl(base) | ADDA_PR_WRITE, base);
0074
0075     /* Clear write bit */
0076     writel(readl(base) & ~ADDA_PR_WRITE, base);
0077
0078     return 0;
0079 }
0080
0081 static const struct regmap_config adda_pr_regmap_cfg = {
0082     .name       = "adda-pr",
0083     .reg_bits   = 5,
0084     .reg_stride = 1,
0085     .val_bits   = 8,
0086     .reg_read   = adda_reg_read,
0087     .reg_write  = adda_reg_write,
0088     .fast_io    = true,
0089     .max_register   = 31,
0090 };
0091
0092 struct regmap *sun8i_adda_pr_regmap_init(struct device *dev,
0093                      void __iomem *base)
0094 {
0095     return devm_regmap_init(dev, NULL, base, &adda_pr_regmap_cfg);
0096 }
0097 EXPORT_SYMBOL_GPL(sun8i_adda_pr_regmap_init);
0098
0099 MODULE_DESCRIPTION("Allwinner analog audio codec regmap driver");
0100 MODULE_AUTHOR("Vasily Khoruzhick <anarsoul@gmail.com>");
0101 MODULE_LICENSE("GPL");
0102 MODULE_ALIAS("platform:sunxi-adda-pr");