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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) STMicroelectronics SA 2015
0004  * Authors: Arnaud Pouliquen <arnaud.pouliquen@st.com>
0005  *          for STMicroelectronics.
0006  */
0007 
0008 #ifndef __SND_ST_AUD_UNIPERIF_H
0009 #define __SND_ST_AUD_UNIPERIF_H
0010 
0011 #include <linux/regmap.h>
0012 
0013 #include <sound/dmaengine_pcm.h>
0014 
0015 /*
0016  * Register access macros
0017  */
0018 
0019 #define GET_UNIPERIF_REG(ip, offset, shift, mask) \
0020     ((readl_relaxed(ip->base + offset) >> shift) & mask)
0021 #define SET_UNIPERIF_REG(ip, offset, shift, mask, value) \
0022     writel_relaxed(((readl_relaxed(ip->base + offset) & \
0023     ~(mask << shift)) | (((value) & mask) << shift)), ip->base + offset)
0024 #define SET_UNIPERIF_BIT_REG(ip, offset, shift, mask, value) \
0025     writel_relaxed((((value) & mask) << shift), ip->base + offset)
0026 
0027 /*
0028  * UNIPERIF_SOFT_RST reg
0029  */
0030 
0031 #define UNIPERIF_SOFT_RST_OFFSET(ip) 0x0000
0032 #define GET_UNIPERIF_SOFT_RST(ip) \
0033     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0034         readl_relaxed(ip->base + UNIPERIF_SOFT_RST_OFFSET(ip)) : 0)
0035 #define SET_UNIPERIF_SOFT_RST(ip, value) \
0036     writel_relaxed(value, ip->base + UNIPERIF_SOFT_RST_OFFSET(ip))
0037 
0038 /* SOFT_RST */
0039 #define UNIPERIF_SOFT_RST_SOFT_RST_SHIFT(ip) 0x0
0040 #define UNIPERIF_SOFT_RST_SOFT_RST_MASK(ip) 0x1
0041 #define SET_UNIPERIF_SOFT_RST_SOFT_RST(ip) \
0042     SET_UNIPERIF_BIT_REG(ip, \
0043         UNIPERIF_SOFT_RST_OFFSET(ip), \
0044         UNIPERIF_SOFT_RST_SOFT_RST_SHIFT(ip), \
0045         UNIPERIF_SOFT_RST_SOFT_RST_MASK(ip), 1)
0046 #define GET_UNIPERIF_SOFT_RST_SOFT_RST(ip) \
0047     GET_UNIPERIF_REG(ip, \
0048         UNIPERIF_SOFT_RST_OFFSET(ip), \
0049         UNIPERIF_SOFT_RST_SOFT_RST_SHIFT(ip), \
0050         UNIPERIF_SOFT_RST_SOFT_RST_MASK(ip))
0051 
0052 /*
0053  * UNIPERIF_FIFO_DATA reg
0054  */
0055 
0056 #define UNIPERIF_FIFO_DATA_OFFSET(ip) 0x0004
0057 #define SET_UNIPERIF_DATA(ip, value) \
0058     writel_relaxed(value, ip->base + UNIPERIF_FIFO_DATA_OFFSET(ip))
0059 
0060 /*
0061  * UNIPERIF_CHANNEL_STA_REGN reg
0062  */
0063 
0064 #define UNIPERIF_CHANNEL_STA_REGN(ip, n) (0x0060 + (4 * n))
0065 #define GET_UNIPERIF_CHANNEL_STA_REGN(ip) \
0066     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REGN(ip, n))
0067 #define SET_UNIPERIF_CHANNEL_STA_REGN(ip, n, value) \
0068     writel_relaxed(value, ip->base + \
0069             UNIPERIF_CHANNEL_STA_REGN(ip, n))
0070 
0071 #define UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip) 0x0060
0072 #define GET_UNIPERIF_CHANNEL_STA_REG0(ip) \
0073     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip))
0074 #define SET_UNIPERIF_CHANNEL_STA_REG0(ip, value) \
0075     writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG0_OFFSET(ip))
0076 
0077 #define UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip) 0x0064
0078 #define GET_UNIPERIF_CHANNEL_STA_REG1(ip) \
0079     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip))
0080 #define SET_UNIPERIF_CHANNEL_STA_REG1(ip, value) \
0081     writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG1_OFFSET(ip))
0082 
0083 #define UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip) 0x0068
0084 #define GET_UNIPERIF_CHANNEL_STA_REG2(ip) \
0085     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip))
0086 #define SET_UNIPERIF_CHANNEL_STA_REG2(ip, value) \
0087     writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG2_OFFSET(ip))
0088 
0089 #define UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip) 0x006C
0090 #define GET_UNIPERIF_CHANNEL_STA_REG3(ip) \
0091     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip))
0092 #define SET_UNIPERIF_CHANNEL_STA_REG3(ip, value) \
0093     writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG3_OFFSET(ip))
0094 
0095 #define UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip) 0x0070
0096 #define GET_UNIPERIF_CHANNEL_STA_REG4(ip) \
0097     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip))
0098 #define SET_UNIPERIF_CHANNEL_STA_REG4(ip, value) \
0099     writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG4_OFFSET(ip))
0100 
0101 #define UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip) 0x0074
0102 #define GET_UNIPERIF_CHANNEL_STA_REG5(ip) \
0103     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip))
0104 #define SET_UNIPERIF_CHANNEL_STA_REG5(ip, value) \
0105     writel_relaxed(value, ip->base + UNIPERIF_CHANNEL_STA_REG5_OFFSET(ip))
0106 
0107 /*
0108  *  UNIPERIF_ITS reg
0109  */
0110 
0111 #define UNIPERIF_ITS_OFFSET(ip) 0x000C
0112 #define GET_UNIPERIF_ITS(ip) \
0113     readl_relaxed(ip->base + UNIPERIF_ITS_OFFSET(ip))
0114 
0115 /* MEM_BLK_READ */
0116 #define UNIPERIF_ITS_MEM_BLK_READ_SHIFT(ip) 5
0117 #define UNIPERIF_ITS_MEM_BLK_READ_MASK(ip) \
0118     (BIT(UNIPERIF_ITS_MEM_BLK_READ_SHIFT(ip)))
0119 
0120 /* FIFO_ERROR */
0121 #define UNIPERIF_ITS_FIFO_ERROR_SHIFT(ip) \
0122     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
0123 #define UNIPERIF_ITS_FIFO_ERROR_MASK(ip) \
0124     (BIT(UNIPERIF_ITS_FIFO_ERROR_SHIFT(ip)))
0125 
0126 /* DMA_ERROR */
0127 #define UNIPERIF_ITS_DMA_ERROR_SHIFT(ip) 9
0128 #define UNIPERIF_ITS_DMA_ERROR_MASK(ip) \
0129     (BIT(UNIPERIF_ITS_DMA_ERROR_SHIFT(ip)))
0130 
0131 /* UNDERFLOW_REC_DONE */
0132 #define UNIPERIF_ITS_UNDERFLOW_REC_DONE_SHIFT(ip) \
0133     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 12)
0134 #define UNIPERIF_ITS_UNDERFLOW_REC_DONE_MASK(ip) \
0135     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0136         0 : (BIT(UNIPERIF_ITS_UNDERFLOW_REC_DONE_SHIFT(ip))))
0137 
0138 /* UNDERFLOW_REC_FAILED */
0139 #define UNIPERIF_ITS_UNDERFLOW_REC_FAILED_SHIFT(ip) \
0140     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 13)
0141 #define UNIPERIF_ITS_UNDERFLOW_REC_FAILED_MASK(ip) \
0142     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0143         0 : (BIT(UNIPERIF_ITS_UNDERFLOW_REC_FAILED_SHIFT(ip))))
0144 
0145 /*
0146  *  UNIPERIF_ITS_BCLR reg
0147  */
0148 
0149 /* FIFO_ERROR */
0150 #define UNIPERIF_ITS_BCLR_FIFO_ERROR_SHIFT(ip) \
0151     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
0152 #define UNIPERIF_ITS_BCLR_FIFO_ERROR_MASK(ip) \
0153     (BIT(UNIPERIF_ITS_BCLR_FIFO_ERROR_SHIFT(ip)))
0154 #define SET_UNIPERIF_ITS_BCLR_FIFO_ERROR(ip) \
0155     SET_UNIPERIF_ITS_BCLR(ip, \
0156         UNIPERIF_ITS_BCLR_FIFO_ERROR_MASK(ip))
0157 
0158 #define UNIPERIF_ITS_BCLR_OFFSET(ip) 0x0010
0159 #define SET_UNIPERIF_ITS_BCLR(ip, value) \
0160     writel_relaxed(value, ip->base + UNIPERIF_ITS_BCLR_OFFSET(ip))
0161 
0162 /*
0163  *  UNIPERIF_ITM reg
0164  */
0165 
0166 #define UNIPERIF_ITM_OFFSET(ip) 0x0018
0167 #define GET_UNIPERIF_ITM(ip) \
0168     readl_relaxed(ip->base + UNIPERIF_ITM_OFFSET(ip))
0169 
0170 /* FIFO_ERROR */
0171 #define UNIPERIF_ITM_FIFO_ERROR_SHIFT(ip) \
0172     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
0173 #define UNIPERIF_ITM_FIFO_ERROR_MASK(ip) \
0174     (BIT(UNIPERIF_ITM_FIFO_ERROR_SHIFT(ip)))
0175 
0176 /* UNDERFLOW_REC_DONE */
0177 #define UNIPERIF_ITM_UNDERFLOW_REC_DONE_SHIFT(ip) \
0178     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 12)
0179 #define UNIPERIF_ITM_UNDERFLOW_REC_DONE_MASK(ip) \
0180     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0181         0 : (BIT(UNIPERIF_ITM_UNDERFLOW_REC_DONE_SHIFT(ip))))
0182 
0183 /* UNDERFLOW_REC_FAILED */
0184 #define UNIPERIF_ITM_UNDERFLOW_REC_FAILED_SHIFT(ip) \
0185     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 13)
0186 #define UNIPERIF_ITM_UNDERFLOW_REC_FAILED_MASK(ip) \
0187     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0188         0 : (BIT(UNIPERIF_ITM_UNDERFLOW_REC_FAILED_SHIFT(ip))))
0189 
0190 /*
0191  *  UNIPERIF_ITM_BCLR reg
0192  */
0193 
0194 #define UNIPERIF_ITM_BCLR_OFFSET(ip) 0x001c
0195 #define SET_UNIPERIF_ITM_BCLR(ip, value) \
0196     writel_relaxed(value, ip->base + UNIPERIF_ITM_BCLR_OFFSET(ip))
0197 
0198 /* FIFO_ERROR */
0199 #define UNIPERIF_ITM_BCLR_FIFO_ERROR_SHIFT(ip) \
0200     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
0201 #define UNIPERIF_ITM_BCLR_FIFO_ERROR_MASK(ip) \
0202     (BIT(UNIPERIF_ITM_BCLR_FIFO_ERROR_SHIFT(ip)))
0203 #define SET_UNIPERIF_ITM_BCLR_FIFO_ERROR(ip) \
0204     SET_UNIPERIF_ITM_BCLR(ip, \
0205         UNIPERIF_ITM_BCLR_FIFO_ERROR_MASK(ip))
0206 
0207 /* DMA_ERROR */
0208 #define UNIPERIF_ITM_BCLR_DMA_ERROR_SHIFT(ip) 9
0209 #define UNIPERIF_ITM_BCLR_DMA_ERROR_MASK(ip) \
0210     (BIT(UNIPERIF_ITM_BCLR_DMA_ERROR_SHIFT(ip)))
0211 #define SET_UNIPERIF_ITM_BCLR_DMA_ERROR(ip) \
0212     SET_UNIPERIF_ITM_BCLR(ip, \
0213         UNIPERIF_ITM_BCLR_DMA_ERROR_MASK(ip))
0214 
0215 /*
0216  *  UNIPERIF_ITM_BSET reg
0217  */
0218 
0219 #define UNIPERIF_ITM_BSET_OFFSET(ip) 0x0020
0220 #define SET_UNIPERIF_ITM_BSET(ip, value) \
0221     writel_relaxed(value, ip->base + UNIPERIF_ITM_BSET_OFFSET(ip))
0222 
0223 /* FIFO_ERROR */
0224 #define UNIPERIF_ITM_BSET_FIFO_ERROR_SHIFT(ip) \
0225     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 8)
0226 #define UNIPERIF_ITM_BSET_FIFO_ERROR_MASK(ip) \
0227     (BIT(UNIPERIF_ITM_BSET_FIFO_ERROR_SHIFT(ip)))
0228 #define SET_UNIPERIF_ITM_BSET_FIFO_ERROR(ip) \
0229     SET_UNIPERIF_ITM_BSET(ip, \
0230         UNIPERIF_ITM_BSET_FIFO_ERROR_MASK(ip))
0231 
0232 /* MEM_BLK_READ */
0233 #define UNIPERIF_ITM_BSET_MEM_BLK_READ_SHIFT(ip) 5
0234 #define UNIPERIF_ITM_BSET_MEM_BLK_READ_MASK(ip) \
0235     (BIT(UNIPERIF_ITM_BSET_MEM_BLK_READ_SHIFT(ip)))
0236 #define SET_UNIPERIF_ITM_BSET_MEM_BLK_READ(ip) \
0237     SET_UNIPERIF_ITM_BSET(ip, \
0238         UNIPERIF_ITM_BSET_MEM_BLK_READ_MASK(ip))
0239 
0240 /* DMA_ERROR */
0241 #define UNIPERIF_ITM_BSET_DMA_ERROR_SHIFT(ip) 9
0242 #define UNIPERIF_ITM_BSET_DMA_ERROR_MASK(ip) \
0243     (BIT(UNIPERIF_ITM_BSET_DMA_ERROR_SHIFT(ip)))
0244 #define SET_UNIPERIF_ITM_BSET_DMA_ERROR(ip) \
0245     SET_UNIPERIF_ITM_BSET(ip, \
0246         UNIPERIF_ITM_BSET_DMA_ERROR_MASK(ip))
0247 
0248 /* UNDERFLOW_REC_DONE */
0249 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_SHIFT(ip) \
0250     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 12)
0251 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_MASK(ip) \
0252     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0253         0 : (BIT(UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_SHIFT(ip))))
0254 #define SET_UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE(ip) \
0255     SET_UNIPERIF_ITM_BSET(ip, \
0256         UNIPERIF_ITM_BSET_UNDERFLOW_REC_DONE_MASK(ip))
0257 
0258 /* UNDERFLOW_REC_FAILED */
0259 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_SHIFT(ip) \
0260     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 13)
0261 #define UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_MASK(ip) \
0262     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? \
0263         0 : (BIT(UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_SHIFT(ip))))
0264 #define SET_UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED(ip) \
0265     SET_UNIPERIF_ITM_BSET(ip, \
0266         UNIPERIF_ITM_BSET_UNDERFLOW_REC_FAILED_MASK(ip))
0267 
0268 /*
0269  * UNIPERIF_CONFIG reg
0270  */
0271 
0272 #define UNIPERIF_CONFIG_OFFSET(ip) 0x0040
0273 #define GET_UNIPERIF_CONFIG(ip) \
0274     readl_relaxed(ip->base + UNIPERIF_CONFIG_OFFSET(ip))
0275 #define SET_UNIPERIF_CONFIG(ip, value) \
0276     writel_relaxed(value, ip->base + UNIPERIF_CONFIG_OFFSET(ip))
0277 
0278 /* PARITY_CNTR */
0279 #define UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip) 0
0280 #define UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip) 0x1
0281 #define GET_UNIPERIF_CONFIG_PARITY_CNTR(ip) \
0282     GET_UNIPERIF_REG(ip, \
0283         UNIPERIF_CONFIG_OFFSET(ip), \
0284         UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip), \
0285         UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip))
0286 #define SET_UNIPERIF_CONFIG_PARITY_CNTR_BY_HW(ip) \
0287     SET_UNIPERIF_REG(ip, \
0288         UNIPERIF_CONFIG_OFFSET(ip), \
0289         UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip), \
0290         UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip), 0)
0291 #define SET_UNIPERIF_CONFIG_PARITY_CNTR_BY_SW(ip) \
0292     SET_UNIPERIF_REG(ip, \
0293         UNIPERIF_CONFIG_OFFSET(ip), \
0294         UNIPERIF_CONFIG_PARITY_CNTR_SHIFT(ip), \
0295         UNIPERIF_CONFIG_PARITY_CNTR_MASK(ip), 1)
0296 
0297 /* CHANNEL_STA_CNTR */
0298 #define UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip) 1
0299 #define UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip) 0x1
0300 #define GET_UNIPERIF_CONFIG_CHANNEL_STA_CNTR(ip) \
0301     GET_UNIPERIF_REG(ip, \
0302         UNIPERIF_CONFIG_OFFSET(ip), \
0303         UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip), \
0304         UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip))
0305 #define SET_UNIPERIF_CONFIG_CHANNEL_STA_CNTR_BY_SW(ip) \
0306     SET_UNIPERIF_REG(ip, \
0307         UNIPERIF_CONFIG_OFFSET(ip), \
0308         UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip), \
0309         UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip), 0)
0310 #define SET_UNIPERIF_CONFIG_CHANNEL_STA_CNTR_BY_HW(ip) \
0311     SET_UNIPERIF_REG(ip, \
0312         UNIPERIF_CONFIG_OFFSET(ip),    \
0313         UNIPERIF_CONFIG_CHANNEL_STA_CNTR_SHIFT(ip), \
0314         UNIPERIF_CONFIG_CHANNEL_STA_CNTR_MASK(ip), 1)
0315 
0316 /* USER_DAT_CNTR */
0317 #define UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip) 2
0318 #define UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip) 0x1
0319 #define GET_UNIPERIF_CONFIG_USER_DAT_CNTR(ip) \
0320     GET_UNIPERIF_REG(ip, \
0321         UNIPERIF_CONFIG_OFFSET(ip), \
0322         UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip), \
0323         UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip))
0324 #define SET_UNIPERIF_CONFIG_USER_DAT_CNTR_BY_HW(ip) \
0325     SET_UNIPERIF_REG(ip, \
0326         UNIPERIF_CONFIG_OFFSET(ip), \
0327         UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip), \
0328         UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip), 1)
0329 #define SET_UNIPERIF_CONFIG_USER_DAT_CNTR_BY_SW(ip) \
0330     SET_UNIPERIF_REG(ip, \
0331         UNIPERIF_CONFIG_OFFSET(ip), \
0332         UNIPERIF_CONFIG_USER_DAT_CNTR_SHIFT(ip), \
0333         UNIPERIF_CONFIG_USER_DAT_CNTR_MASK(ip), 0)
0334 
0335 /* VALIDITY_DAT_CNTR */
0336 #define UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip) 3
0337 #define UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip) 0x1
0338 #define GET_UNIPERIF_CONFIG_VALIDITY_DAT_CNTR(ip) \
0339     GET_UNIPERIF_REG(ip, \
0340         UNIPERIF_CONFIG_OFFSET(ip), \
0341         UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip), \
0342         UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip))
0343 #define SET_UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_BY_SW(ip) \
0344     SET_UNIPERIF_REG(ip, \
0345         UNIPERIF_CONFIG_OFFSET(ip), \
0346         UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip), \
0347         UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip), 0)
0348 #define SET_UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_BY_HW(ip) \
0349     SET_UNIPERIF_REG(ip, \
0350         UNIPERIF_CONFIG_OFFSET(ip), \
0351         UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_SHIFT(ip), \
0352         UNIPERIF_CONFIG_VALIDITY_DAT_CNTR_MASK(ip), 1)
0353 
0354 /* ONE_BIT_AUD_SUPPORT */
0355 #define UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip) 4
0356 #define UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip) 0x1
0357 #define GET_UNIPERIF_CONFIG_ONE_BIT_AUD(ip) \
0358     GET_UNIPERIF_REG(ip, \
0359         UNIPERIF_CONFIG_OFFSET(ip), \
0360         UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip), \
0361         UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip))
0362 #define SET_UNIPERIF_CONFIG_ONE_BIT_AUD_DISABLE(ip) \
0363     SET_UNIPERIF_REG(ip, \
0364         UNIPERIF_CONFIG_OFFSET(ip), \
0365         UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip), \
0366         UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip), 0)
0367 #define SET_UNIPERIF_CONFIG_ONE_BIT_AUD_ENABLE(ip) \
0368     SET_UNIPERIF_REG(ip, \
0369         UNIPERIF_CONFIG_OFFSET(ip), \
0370         UNIPERIF_CONFIG_ONE_BIT_AUD_SHIFT(ip), \
0371         UNIPERIF_CONFIG_ONE_BIT_AUD_MASK(ip), 1)
0372 
0373 /* MEMORY_FMT */
0374 #define UNIPERIF_CONFIG_MEM_FMT_SHIFT(ip) 5
0375 #define UNIPERIF_CONFIG_MEM_FMT_MASK(ip) 0x1
0376 #define VALUE_UNIPERIF_CONFIG_MEM_FMT_16_0(ip) 0
0377 #define VALUE_UNIPERIF_CONFIG_MEM_FMT_16_16(ip) 1
0378 #define GET_UNIPERIF_CONFIG_MEM_FMT(ip) \
0379     GET_UNIPERIF_REG(ip, \
0380         UNIPERIF_CONFIG_OFFSET(ip), \
0381         UNIPERIF_CONFIG_MEM_FMT_SHIFT(ip), \
0382         UNIPERIF_CONFIG_MEM_FMT_MASK(ip))
0383 #define SET_UNIPERIF_CONFIG_MEM_FMT(ip, value)  \
0384     SET_UNIPERIF_REG(ip, \
0385         UNIPERIF_CONFIG_OFFSET(ip), \
0386         UNIPERIF_CONFIG_MEM_FMT_SHIFT(ip), \
0387         UNIPERIF_CONFIG_MEM_FMT_MASK(ip), value)
0388 #define SET_UNIPERIF_CONFIG_MEM_FMT_16_0(ip)   \
0389     SET_UNIPERIF_CONFIG_MEM_FMT(ip, \
0390         VALUE_UNIPERIF_CONFIG_MEM_FMT_16_0(ip))
0391 #define SET_UNIPERIF_CONFIG_MEM_FMT_16_16(ip) \
0392     SET_UNIPERIF_CONFIG_MEM_FMT(ip, \
0393         VALUE_UNIPERIF_CONFIG_MEM_FMT_16_16(ip))
0394 
0395 /* REPEAT_CHL_STS */
0396 #define UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip) 6
0397 #define UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip) 0x1
0398 #define GET_UNIPERIF_CONFIG_REPEAT_CHL_STS(ip) \
0399     GET_UNIPERIF_REG(ip, \
0400         UNIPERIF_CONFIG_OFFSET(ip), \
0401         UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip), \
0402         UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip))
0403 #define SET_UNIPERIF_CONFIG_REPEAT_CHL_STS_ENABLE(ip) \
0404     SET_UNIPERIF_REG(ip, \
0405         UNIPERIF_CONFIG_OFFSET(ip), \
0406         UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip), \
0407         UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip), 0)
0408 #define SET_UNIPERIF_CONFIG_REPEAT_CHL_STS_DISABLE(ip) \
0409     SET_UNIPERIF_REG(ip, \
0410         UNIPERIF_CONFIG_OFFSET(ip), \
0411         UNIPERIF_CONFIG_REPEAT_CHL_STS_SHIFT(ip), \
0412         UNIPERIF_CONFIG_REPEAT_CHL_STS_MASK(ip), 1)
0413 
0414 /* BACK_STALL_REQ */
0415 #define UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip) \
0416     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 7 : -1)
0417 #define UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip) 0x1
0418 #define GET_UNIPERIF_CONFIG_BACK_STALL_REQ(ip) \
0419     GET_UNIPERIF_REG(ip, \
0420         UNIPERIF_CONFIG_OFFSET(ip), \
0421         UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip), \
0422         UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip))
0423 #define SET_UNIPERIF_CONFIG_BACK_STALL_REQ_DISABLE(ip) \
0424     SET_UNIPERIF_REG(ip, \
0425         UNIPERIF_CONFIG_OFFSET(ip), \
0426         UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip), \
0427         UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip), 0)
0428 #define SET_UNIPERIF_CONFIG_BACK_STALL_REQ_ENABLE(ip) \
0429     SET_UNIPERIF_REG(ip, \
0430         UNIPERIF_CONFIG_OFFSET(ip), \
0431         UNIPERIF_CONFIG_BACK_STALL_REQ_SHIFT(ip), \
0432         UNIPERIF_CONFIG_BACK_STALL_REQ_MASK(ip), 1)
0433 
0434 /* FDMA_TRIGGER_LIMIT */
0435 #define UNIPERIF_CONFIG_DMA_TRIG_LIMIT_SHIFT(ip) 8
0436 #define UNIPERIF_CONFIG_DMA_TRIG_LIMIT_MASK(ip) 0x7F
0437 #define GET_UNIPERIF_CONFIG_DMA_TRIG_LIMIT(ip) \
0438     GET_UNIPERIF_REG(ip, \
0439         UNIPERIF_CONFIG_OFFSET(ip), \
0440         UNIPERIF_CONFIG_DMA_TRIG_LIMIT_SHIFT(ip), \
0441         UNIPERIF_CONFIG_DMA_TRIG_LIMIT_MASK(ip))
0442 #define SET_UNIPERIF_CONFIG_DMA_TRIG_LIMIT(ip, value) \
0443     SET_UNIPERIF_REG(ip, \
0444         UNIPERIF_CONFIG_OFFSET(ip), \
0445         UNIPERIF_CONFIG_DMA_TRIG_LIMIT_SHIFT(ip), \
0446         UNIPERIF_CONFIG_DMA_TRIG_LIMIT_MASK(ip), value)
0447 
0448 /* CHL_STS_UPDATE */
0449 #define UNIPERIF_CONFIG_CHL_STS_UPDATE_SHIFT(ip) \
0450     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 16 : -1)
0451 #define UNIPERIF_CONFIG_CHL_STS_UPDATE_MASK(ip) 0x1
0452 #define GET_UNIPERIF_CONFIG_CHL_STS_UPDATE(ip) \
0453     GET_UNIPERIF_REG(ip, \
0454         UNIPERIF_CONFIG_OFFSET(ip),  \
0455         UNIPERIF_CONFIG_CHL_STS_UPDATE_SHIFT(ip), \
0456         UNIPERIF_CONFIG_CHL_STS_UPDATE_MASK(ip))
0457 #define SET_UNIPERIF_CONFIG_CHL_STS_UPDATE(ip) \
0458     SET_UNIPERIF_REG(ip, \
0459         UNIPERIF_CONFIG_OFFSET(ip), \
0460         UNIPERIF_CONFIG_CHL_STS_UPDATE_SHIFT(ip), \
0461         UNIPERIF_CONFIG_CHL_STS_UPDATE_MASK(ip), 1)
0462 
0463 /* IDLE_MOD */
0464 #define UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip) 18
0465 #define UNIPERIF_CONFIG_IDLE_MOD_MASK(ip) 0x1
0466 #define GET_UNIPERIF_CONFIG_IDLE_MOD(ip) \
0467     GET_UNIPERIF_REG(ip, \
0468         UNIPERIF_CONFIG_OFFSET(ip), \
0469         UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip), \
0470         UNIPERIF_CONFIG_IDLE_MOD_MASK(ip))
0471 #define SET_UNIPERIF_CONFIG_IDLE_MOD_DISABLE(ip) \
0472     SET_UNIPERIF_REG(ip, \
0473         UNIPERIF_CONFIG_OFFSET(ip), \
0474         UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip), \
0475         UNIPERIF_CONFIG_IDLE_MOD_MASK(ip), 0)
0476 #define SET_UNIPERIF_CONFIG_IDLE_MOD_ENABLE(ip) \
0477     SET_UNIPERIF_REG(ip, \
0478         UNIPERIF_CONFIG_OFFSET(ip), \
0479         UNIPERIF_CONFIG_IDLE_MOD_SHIFT(ip), \
0480         UNIPERIF_CONFIG_IDLE_MOD_MASK(ip), 1)
0481 
0482 /* SUBFRAME_SELECTION */
0483 #define UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip) 19
0484 #define UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip) 0x1
0485 #define GET_UNIPERIF_CONFIG_SUBFRAME_SEL(ip) \
0486     GET_UNIPERIF_REG(ip, \
0487         UNIPERIF_CONFIG_OFFSET(ip), \
0488         UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip), \
0489         UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip))
0490 #define SET_UNIPERIF_CONFIG_SUBFRAME_SEL_SUBF1_SUBF0(ip) \
0491     SET_UNIPERIF_REG(ip, \
0492         UNIPERIF_CONFIG_OFFSET(ip), \
0493         UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip), \
0494         UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip), 1)
0495 #define SET_UNIPERIF_CONFIG_SUBFRAME_SEL_SUBF0_SUBF1(ip) \
0496     SET_UNIPERIF_REG(ip, \
0497         UNIPERIF_CONFIG_OFFSET(ip), \
0498         UNIPERIF_CONFIG_SUBFRAME_SEL_SHIFT(ip), \
0499         UNIPERIF_CONFIG_SUBFRAME_SEL_MASK(ip), 0)
0500 
0501 /* FULL_SW_CONTROL */
0502 #define UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip) 20
0503 #define UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip) 0x1
0504 #define GET_UNIPERIF_CONFIG_SPDIF_SW_CTRL(ip) \
0505     GET_UNIPERIF_REG(ip, \
0506         UNIPERIF_CONFIG_OFFSET(ip), \
0507         UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip), \
0508         UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip))
0509 #define SET_UNIPERIF_CONFIG_SPDIF_SW_CTRL_ENABLE(ip) \
0510     SET_UNIPERIF_REG(ip, \
0511         UNIPERIF_CONFIG_OFFSET(ip), \
0512         UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip), \
0513         UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip), 1)
0514 #define SET_UNIPERIF_CONFIG_SPDIF_SW_CTRL_DISABLE(ip) \
0515     SET_UNIPERIF_REG(ip, \
0516         UNIPERIF_CONFIG_OFFSET(ip), \
0517         UNIPERIF_CONFIG_SPDIF_SW_CTRL_SHIFT(ip), \
0518         UNIPERIF_CONFIG_SPDIF_SW_CTRL_MASK(ip), 0)
0519 
0520 /* MASTER_CLKEDGE */
0521 #define UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip) \
0522     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 24 : -1)
0523 #define UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip) 0x1
0524 #define GET_UNIPERIF_CONFIG_MSTR_CLKEDGE(ip) \
0525     GET_UNIPERIF_REG(ip, \
0526         UNIPERIF_CONFIG_OFFSET(ip), \
0527         UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip), \
0528         UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip))
0529 #define SET_UNIPERIF_CONFIG_MSTR_CLKEDGE_FALLING(ip) \
0530     SET_UNIPERIF_REG(ip, \
0531         UNIPERIF_CONFIG_OFFSET(ip), \
0532         UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip), \
0533         UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip), 1)
0534 #define SET_UNIPERIF_CONFIG_MSTR_CLKEDGE_RISING(ip) \
0535     SET_UNIPERIF_REG(ip, \
0536         UNIPERIF_CONFIG_OFFSET(ip), \
0537         UNIPERIF_CONFIG_MSTR_CLKEDGE_SHIFT(ip), \
0538         UNIPERIF_CONFIG_MSTR_CLKEDGE_MASK(ip), 0)
0539 
0540 /*
0541  * UNIPERIF_CTRL reg
0542  */
0543 
0544 #define UNIPERIF_CTRL_OFFSET(ip) 0x0044
0545 #define GET_UNIPERIF_CTRL(ip) \
0546     readl_relaxed(ip->base + UNIPERIF_CTRL_OFFSET(ip))
0547 #define SET_UNIPERIF_CTRL(ip, value) \
0548     writel_relaxed(value, ip->base + UNIPERIF_CTRL_OFFSET(ip))
0549 
0550 /* OPERATION */
0551 #define UNIPERIF_CTRL_OPERATION_SHIFT(ip) 0
0552 #define UNIPERIF_CTRL_OPERATION_MASK(ip) 0x7
0553 #define GET_UNIPERIF_CTRL_OPERATION(ip) \
0554     GET_UNIPERIF_REG(ip, \
0555         UNIPERIF_CTRL_OFFSET(ip), \
0556         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0557         UNIPERIF_CTRL_OPERATION_MASK(ip))
0558 #define VALUE_UNIPERIF_CTRL_OPERATION_OFF(ip) 0
0559 #define SET_UNIPERIF_CTRL_OPERATION_OFF(ip) \
0560     SET_UNIPERIF_REG(ip, \
0561         UNIPERIF_CTRL_OFFSET(ip), \
0562         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0563         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0564         VALUE_UNIPERIF_CTRL_OPERATION_OFF(ip))
0565 #define VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PCM_NULL(ip) \
0566     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 1 : -1)
0567 #define SET_UNIPERIF_CTRL_OPERATION_MUTE_PCM_NULL(ip) \
0568     SET_UNIPERIF_REG(ip, \
0569         UNIPERIF_CTRL_OFFSET(ip), \
0570         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0571         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0572         VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PCM_NULL(ip))
0573 #define VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PAUSE_BURST(ip) \
0574     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 2 : -1)
0575 #define SET_UNIPERIF_CTRL_OPERATION_MUTE_PAUSE_BURST(ip) \
0576     SET_UNIPERIF_REG(ip, \
0577         UNIPERIF_CTRL_OFFSET(ip), \
0578         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0579         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0580         VALUE_UNIPERIF_CTRL_OPERATION_MUTE_PAUSE_BURST(ip))
0581 #define VALUE_UNIPERIF_CTRL_OPERATION_PCM_DATA(ip) 3
0582 #define SET_UNIPERIF_CTRL_OPERATION_PCM_DATA(ip) \
0583     SET_UNIPERIF_REG(ip, \
0584         UNIPERIF_CTRL_OFFSET(ip), \
0585         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0586         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0587         VALUE_UNIPERIF_CTRL_OPERATION_PCM_DATA(ip))
0588 /* This is the same as above! */
0589 #define VALUE_UNIPERIF_CTRL_OPERATION_AUDIO_DATA(ip) 3
0590 #define SET_UNIPERIF_CTRL_OPERATION_AUDIO_DATA(ip) \
0591     SET_UNIPERIF_REG(ip, \
0592         UNIPERIF_CTRL_OFFSET(ip), \
0593         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0594         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0595         VALUE_UNIPERIF_CTRL_OPERATION_AUDIO_DATA(ip))
0596 #define VALUE_UNIPERIF_CTRL_OPERATION_ENC_DATA(ip) 4
0597 #define SET_UNIPERIF_CTRL_OPERATION_ENC_DATA(ip) \
0598     SET_UNIPERIF_REG(ip, \
0599         UNIPERIF_CTRL_OFFSET(ip), \
0600         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0601         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0602         VALUE_UNIPERIF_CTRL_OPERATION_ENC_DATA(ip))
0603 #define VALUE_UNIPERIF_CTRL_OPERATION_CD_DATA(ip) \
0604     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 5 : -1)
0605 #define SET_UNIPERIF_CTRL_OPERATION_CD_DATA(ip) \
0606     SET_UNIPERIF_REG(ip, \
0607         UNIPERIF_CTRL_OFFSET(ip), \
0608         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0609         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0610         VALUE_UNIPERIF_CTRL_OPERATION_CD_DATA(ip))
0611 #define VALUE_UNIPERIF_CTRL_OPERATION_STANDBY(ip) \
0612     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 7)
0613 #define SET_UNIPERIF_CTRL_OPERATION_STANDBY(ip) \
0614     SET_UNIPERIF_REG(ip, \
0615         UNIPERIF_CTRL_OFFSET(ip), \
0616         UNIPERIF_CTRL_OPERATION_SHIFT(ip), \
0617         UNIPERIF_CTRL_OPERATION_MASK(ip), \
0618         VALUE_UNIPERIF_CTRL_OPERATION_STANDBY(ip))
0619 
0620 /* EXIT_STBY_ON_EOBLOCK */
0621 #define UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip) \
0622     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 3)
0623 #define UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip) 0x1
0624 #define GET_UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK(ip) \
0625     GET_UNIPERIF_REG(ip, \
0626         UNIPERIF_CTRL_OFFSET(ip), \
0627         UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip), \
0628         UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip))
0629 #define SET_UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_OFF(ip) \
0630     SET_UNIPERIF_REG(ip, \
0631         UNIPERIF_CTRL_OFFSET(ip), \
0632         UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip), \
0633         UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip), 0)
0634 #define SET_UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_ON(ip) \
0635     SET_UNIPERIF_REG(ip, \
0636         UNIPERIF_CTRL_OFFSET(ip), \
0637         UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_SHIFT(ip), \
0638         UNIPERIF_CTRL_EXIT_STBY_ON_EOBLOCK_MASK(ip), 1)
0639 
0640 /* ROUNDING */
0641 #define UNIPERIF_CTRL_ROUNDING_SHIFT(ip) 4
0642 #define UNIPERIF_CTRL_ROUNDING_MASK(ip) 0x1
0643 #define GET_UNIPERIF_CTRL_ROUNDING(ip) \
0644     GET_UNIPERIF_REG(ip, \
0645         UNIPERIF_CTRL_OFFSET(ip), \
0646         UNIPERIF_CTRL_ROUNDING_SHIFT(ip), \
0647         UNIPERIF_CTRL_ROUNDING_MASK(ip))
0648 #define SET_UNIPERIF_CTRL_ROUNDING_OFF(ip) \
0649     SET_UNIPERIF_REG(ip, \
0650         UNIPERIF_CTRL_OFFSET(ip), \
0651         UNIPERIF_CTRL_ROUNDING_SHIFT(ip), \
0652         UNIPERIF_CTRL_ROUNDING_MASK(ip), 0)
0653 #define SET_UNIPERIF_CTRL_ROUNDING_ON(ip) \
0654     SET_UNIPERIF_REG(ip, \
0655         UNIPERIF_CTRL_OFFSET(ip), \
0656         UNIPERIF_CTRL_ROUNDING_SHIFT(ip), \
0657         UNIPERIF_CTRL_ROUNDING_MASK(ip), 1)
0658 
0659 /* DIVIDER */
0660 #define UNIPERIF_CTRL_DIVIDER_SHIFT(ip) 5
0661 #define UNIPERIF_CTRL_DIVIDER_MASK(ip) 0xff
0662 #define GET_UNIPERIF_CTRL_DIVIDER(ip) \
0663     GET_UNIPERIF_REG(ip, \
0664         UNIPERIF_CTRL_OFFSET(ip), \
0665         UNIPERIF_CTRL_DIVIDER_SHIFT(ip), \
0666         UNIPERIF_CTRL_DIVIDER_MASK(ip))
0667 #define SET_UNIPERIF_CTRL_DIVIDER(ip, value) \
0668     SET_UNIPERIF_REG(ip, \
0669         UNIPERIF_CTRL_OFFSET(ip), \
0670         UNIPERIF_CTRL_DIVIDER_SHIFT(ip), \
0671         UNIPERIF_CTRL_DIVIDER_MASK(ip), value)
0672 
0673 /* BYTE_SWAP */
0674 #define UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip) \
0675     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 13 : -1)
0676 #define UNIPERIF_CTRL_BYTE_SWP_MASK(ip) 0x1
0677 #define GET_UNIPERIF_CTRL_BYTE_SWP(ip) \
0678     GET_UNIPERIF_REG(ip, \
0679         UNIPERIF_CTRL_OFFSET(ip), \
0680         UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip), \
0681         UNIPERIF_CTRL_BYTE_SWP_MASK(ip))
0682 #define SET_UNIPERIF_CTRL_BYTE_SWP_OFF(ip) \
0683     SET_UNIPERIF_REG(ip, \
0684         UNIPERIF_CTRL_OFFSET(ip), \
0685         UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip), \
0686         UNIPERIF_CTRL_BYTE_SWP_MASK(ip), 0)
0687 #define SET_UNIPERIF_CTRL_BYTE_SWP_ON(ip) \
0688     SET_UNIPERIF_REG(ip, \
0689         UNIPERIF_CTRL_OFFSET(ip), \
0690         UNIPERIF_CTRL_BYTE_SWP_SHIFT(ip), \
0691         UNIPERIF_CTRL_BYTE_SWP_MASK(ip), 1)
0692 
0693 /* ZERO_STUFFING_HW_SW */
0694 #define UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip) \
0695     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 14 : -1)
0696 #define UNIPERIF_CTRL_ZERO_STUFF_MASK(ip) 0x1
0697 #define GET_UNIPERIF_CTRL_ZERO_STUFF(ip) \
0698     GET_UNIPERIF_REG(ip, \
0699         UNIPERIF_CTRL_OFFSET(ip), \
0700         UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip), \
0701         UNIPERIF_CTRL_ZERO_STUFF_MASK(ip))
0702 #define SET_UNIPERIF_CTRL_ZERO_STUFF_HW(ip) \
0703     SET_UNIPERIF_REG(ip, \
0704         UNIPERIF_CTRL_OFFSET(ip), \
0705         UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip), \
0706         UNIPERIF_CTRL_ZERO_STUFF_MASK(ip), 1)
0707 #define SET_UNIPERIF_CTRL_ZERO_STUFF_SW(ip) \
0708     SET_UNIPERIF_REG(ip, \
0709         UNIPERIF_CTRL_OFFSET(ip), \
0710         UNIPERIF_CTRL_ZERO_STUFF_SHIFT(ip), \
0711         UNIPERIF_CTRL_ZERO_STUFF_MASK(ip), 0)
0712 
0713 /* SPDIF_LAT */
0714 #define UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip) \
0715     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 16 : -1)
0716 #define UNIPERIF_CTRL_SPDIF_LAT_MASK(ip) 0x1
0717 #define GET_UNIPERIF_CTRL_SPDIF_LAT(ip) \
0718     GET_UNIPERIF_REG(ip, \
0719         UNIPERIF_CTRL_OFFSET(ip), \
0720         UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip), \
0721         UNIPERIF_CTRL_SPDIF_LAT_MASK(ip))
0722 #define SET_UNIPERIF_CTRL_SPDIF_LAT_ON(ip) \
0723     SET_UNIPERIF_REG(ip, \
0724         UNIPERIF_CTRL_OFFSET(ip), \
0725         UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip), \
0726         UNIPERIF_CTRL_SPDIF_LAT_MASK(ip), 1)
0727 #define SET_UNIPERIF_CTRL_SPDIF_LAT_OFF(ip) \
0728     SET_UNIPERIF_REG(ip, \
0729         UNIPERIF_CTRL_OFFSET(ip), \
0730         UNIPERIF_CTRL_SPDIF_LAT_SHIFT(ip), \
0731         UNIPERIF_CTRL_SPDIF_LAT_MASK(ip), 0)
0732 
0733 /* EN_SPDIF_FORMATTING */
0734 #define UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip) 17
0735 #define UNIPERIF_CTRL_SPDIF_FMT_MASK(ip) 0x1
0736 #define GET_UNIPERIF_CTRL_SPDIF_FMT(ip) \
0737     GET_UNIPERIF_REG(ip, \
0738         UNIPERIF_CTRL_OFFSET(ip), \
0739         UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip), \
0740         UNIPERIF_CTRL_SPDIF_FMT_MASK(ip))
0741 #define SET_UNIPERIF_CTRL_SPDIF_FMT_ON(ip) \
0742     SET_UNIPERIF_REG(ip, \
0743         UNIPERIF_CTRL_OFFSET(ip), \
0744         UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip), \
0745         UNIPERIF_CTRL_SPDIF_FMT_MASK(ip), 1)
0746 #define SET_UNIPERIF_CTRL_SPDIF_FMT_OFF(ip) \
0747     SET_UNIPERIF_REG(ip, \
0748         UNIPERIF_CTRL_OFFSET(ip), \
0749         UNIPERIF_CTRL_SPDIF_FMT_SHIFT(ip), \
0750         UNIPERIF_CTRL_SPDIF_FMT_MASK(ip), 0)
0751 
0752 /* READER_OUT_SELECT */
0753 #define UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip) \
0754     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 18 : -1)
0755 #define UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip) 0x1
0756 #define GET_UNIPERIF_CTRL_READER_OUT_SEL(ip) \
0757     GET_UNIPERIF_REG(ip, \
0758         UNIPERIF_CTRL_OFFSET(ip), \
0759         UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip), \
0760         UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip))
0761 #define SET_UNIPERIF_CTRL_READER_OUT_SEL_IN_MEM(ip) \
0762     SET_UNIPERIF_REG(ip, \
0763         UNIPERIF_CTRL_OFFSET(ip), \
0764         UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip), \
0765         UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip), 0)
0766 #define SET_UNIPERIF_CTRL_READER_OUT_SEL_ON_I2S_LINE(ip) \
0767     SET_UNIPERIF_REG(ip, \
0768         UNIPERIF_CTRL_OFFSET(ip), \
0769         UNIPERIF_CTRL_READER_OUT_SEL_SHIFT(ip), \
0770         UNIPERIF_CTRL_READER_OUT_SEL_MASK(ip), 1)
0771 
0772 /* UNDERFLOW_REC_WINDOW */
0773 #define UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_SHIFT(ip) 20
0774 #define UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_MASK(ip) 0xff
0775 #define GET_UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW(ip) \
0776     GET_UNIPERIF_REG(ip, \
0777         UNIPERIF_CTRL_OFFSET(ip), \
0778         UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_SHIFT(ip), \
0779         UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_MASK(ip))
0780 #define SET_UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW(ip, value) \
0781     SET_UNIPERIF_REG(ip, \
0782         UNIPERIF_CTRL_OFFSET(ip), \
0783         UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_SHIFT(ip), \
0784         UNIPERIF_CTRL_UNDERFLOW_REC_WINDOW_MASK(ip), value)
0785 
0786 /*
0787  * UNIPERIF_I2S_FMT a.k.a UNIPERIF_FORMAT reg
0788  */
0789 
0790 #define UNIPERIF_I2S_FMT_OFFSET(ip) 0x0048
0791 #define GET_UNIPERIF_I2S_FMT(ip) \
0792     readl_relaxed(ip->base + UNIPERIF_I2S_FMT_OFFSET(ip))
0793 #define SET_UNIPERIF_I2S_FMT(ip, value) \
0794     writel_relaxed(value, ip->base + UNIPERIF_I2S_FMT_OFFSET(ip))
0795 
0796 /* NBIT */
0797 #define UNIPERIF_I2S_FMT_NBIT_SHIFT(ip) 0
0798 #define UNIPERIF_I2S_FMT_NBIT_MASK(ip) 0x1
0799 #define GET_UNIPERIF_I2S_FMT_NBIT(ip) \
0800     GET_UNIPERIF_REG(ip, \
0801         UNIPERIF_I2S_FMT_OFFSET(ip), \
0802         UNIPERIF_I2S_FMT_NBIT_SHIFT(ip), \
0803         UNIPERIF_I2S_FMT_NBIT_MASK(ip))
0804 #define SET_UNIPERIF_I2S_FMT_NBIT_32(ip) \
0805     SET_UNIPERIF_REG(ip, \
0806         UNIPERIF_I2S_FMT_OFFSET(ip), \
0807         UNIPERIF_I2S_FMT_NBIT_SHIFT(ip), \
0808         UNIPERIF_I2S_FMT_NBIT_MASK(ip), 0)
0809 #define SET_UNIPERIF_I2S_FMT_NBIT_16(ip) \
0810     SET_UNIPERIF_REG(ip, \
0811         UNIPERIF_I2S_FMT_OFFSET(ip), \
0812         UNIPERIF_I2S_FMT_NBIT_SHIFT(ip), \
0813         UNIPERIF_I2S_FMT_NBIT_MASK(ip), 1)
0814 
0815 /* DATA_SIZE */
0816 #define UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip) 1
0817 #define UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip) 0x7
0818 #define GET_UNIPERIF_I2S_FMT_DATA_SIZE(ip) \
0819     GET_UNIPERIF_REG(ip, \
0820         UNIPERIF_I2S_FMT_OFFSET(ip), \
0821         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0822         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip))
0823 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_16(ip) \
0824     SET_UNIPERIF_REG(ip, \
0825         UNIPERIF_I2S_FMT_OFFSET(ip), \
0826         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0827         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 0)
0828 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_18(ip) \
0829     SET_UNIPERIF_REG(ip, \
0830         UNIPERIF_I2S_FMT_OFFSET(ip), \
0831         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0832         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 1)
0833 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_20(ip) \
0834     SET_UNIPERIF_REG(ip, \
0835         UNIPERIF_I2S_FMT_OFFSET(ip), \
0836         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0837         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 2)
0838 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_24(ip) \
0839     SET_UNIPERIF_REG(ip, \
0840         UNIPERIF_I2S_FMT_OFFSET(ip), \
0841         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0842         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 3)
0843 #define SET_UNIPERIF_I2S_FMTL_DATA_SIZE_28(ip) \
0844     SET_UNIPERIF_REG(ip, \
0845         UNIPERIF_I2S_FMT_OFFSET(ip), \
0846         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0847         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 4)
0848 #define SET_UNIPERIF_I2S_FMT_DATA_SIZE_32(ip) \
0849     SET_UNIPERIF_REG(ip, \
0850         UNIPERIF_I2S_FMT_OFFSET(ip), \
0851         UNIPERIF_I2S_FMT_DATA_SIZE_SHIFT(ip), \
0852         UNIPERIF_I2S_FMT_DATA_SIZE_MASK(ip), 5)
0853 
0854 /* LR_POL */
0855 #define UNIPERIF_I2S_FMT_LR_POL_SHIFT(ip) 4
0856 #define UNIPERIF_I2S_FMT_LR_POL_MASK(ip) 0x1
0857 #define VALUE_UNIPERIF_I2S_FMT_LR_POL_LOW(ip) 0x0
0858 #define VALUE_UNIPERIF_I2S_FMT_LR_POL_HIG(ip) 0x1
0859 #define GET_UNIPERIF_I2S_FMT_LR_POL(ip) \
0860     GET_UNIPERIF_REG(ip, \
0861         UNIPERIF_I2S_FMT_OFFSET(ip), \
0862         UNIPERIF_I2S_FMT_LR_POL_SHIFT(ip), \
0863         UNIPERIF_I2S_FMT_LR_POL_MASK(ip))
0864 #define SET_UNIPERIF_I2S_FMT_LR_POL(ip, value) \
0865     SET_UNIPERIF_REG(ip, \
0866         UNIPERIF_I2S_FMT_OFFSET(ip), \
0867         UNIPERIF_I2S_FMT_LR_POL_SHIFT(ip), \
0868         UNIPERIF_I2S_FMT_LR_POL_MASK(ip), value)
0869 #define SET_UNIPERIF_I2S_FMT_LR_POL_LOW(ip) \
0870     SET_UNIPERIF_I2S_FMT_LR_POL(ip, \
0871         VALUE_UNIPERIF_I2S_FMT_LR_POL_LOW(ip))
0872 #define SET_UNIPERIF_I2S_FMT_LR_POL_HIG(ip) \
0873     SET_UNIPERIF_I2S_FMT_LR_POL(ip, \
0874         VALUE_UNIPERIF_I2S_FMT_LR_POL_HIG(ip))
0875 
0876 /* SCLK_EDGE */
0877 #define UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip) 5
0878 #define UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip) 0x1
0879 #define GET_UNIPERIF_I2S_FMT_SCLK_EDGE(ip) \
0880     GET_UNIPERIF_REG(ip, \
0881         UNIPERIF_I2S_FMT_OFFSET(ip), \
0882         UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip), \
0883         UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip))
0884 #define SET_UNIPERIF_I2S_FMT_SCLK_EDGE_RISING(ip) \
0885     SET_UNIPERIF_REG(ip, \
0886         UNIPERIF_I2S_FMT_OFFSET(ip), \
0887         UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip), \
0888         UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip), 0)
0889 #define SET_UNIPERIF_I2S_FMT_SCLK_EDGE_FALLING(ip) \
0890     SET_UNIPERIF_REG(ip, \
0891         UNIPERIF_I2S_FMT_OFFSET(ip), \
0892         UNIPERIF_I2S_FMT_SCLK_EDGE_SHIFT(ip), \
0893         UNIPERIF_I2S_FMT_SCLK_EDGE_MASK(ip), 1)
0894 
0895 /* PADDING */
0896 #define UNIPERIF_I2S_FMT_PADDING_SHIFT(ip) 6
0897 #define UNIPERIF_I2S_FMT_PADDING_MASK(ip) 0x1
0898 #define UNIPERIF_I2S_FMT_PADDING_MASK(ip) 0x1
0899 #define VALUE_UNIPERIF_I2S_FMT_PADDING_I2S_MODE(ip) 0x0
0900 #define VALUE_UNIPERIF_I2S_FMT_PADDING_SONY_MODE(ip) 0x1
0901 #define GET_UNIPERIF_I2S_FMT_PADDING(ip) \
0902     GET_UNIPERIF_REG(ip, \
0903         UNIPERIF_I2S_FMT_OFFSET(ip), \
0904         UNIPERIF_I2S_FMT_PADDING_SHIFT(ip), \
0905         UNIPERIF_I2S_FMT_PADDING_MASK(ip))
0906 #define SET_UNIPERIF_I2S_FMT_PADDING(ip, value) \
0907     SET_UNIPERIF_REG(ip, \
0908         UNIPERIF_I2S_FMT_OFFSET(ip), \
0909         UNIPERIF_I2S_FMT_PADDING_SHIFT(ip), \
0910         UNIPERIF_I2S_FMT_PADDING_MASK(ip), value)
0911 #define SET_UNIPERIF_I2S_FMT_PADDING_I2S_MODE(ip) \
0912     SET_UNIPERIF_I2S_FMT_PADDING(ip, \
0913         VALUE_UNIPERIF_I2S_FMT_PADDING_I2S_MODE(ip))
0914 #define SET_UNIPERIF_I2S_FMT_PADDING_SONY_MODE(ip) \
0915     SET_UNIPERIF_I2S_FMT_PADDING(ip, \
0916         VALUE_UNIPERIF_I2S_FMT_PADDING_SONY_MODE(ip))
0917 
0918 /* ALIGN */
0919 #define UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip) 7
0920 #define UNIPERIF_I2S_FMT_ALIGN_MASK(ip) 0x1
0921 #define GET_UNIPERIF_I2S_FMT_ALIGN(ip) \
0922     GET_UNIPERIF_REG(ip, \
0923         UNIPERIF_I2S_FMT_OFFSET(ip), \
0924         UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip), \
0925         UNIPERIF_I2S_FMT_ALIGN_MASK(ip))
0926 #define SET_UNIPERIF_I2S_FMT_ALIGN_LEFT(ip) \
0927     SET_UNIPERIF_REG(ip, \
0928         UNIPERIF_I2S_FMT_OFFSET(ip), \
0929         UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip), \
0930         UNIPERIF_I2S_FMT_ALIGN_MASK(ip), 0)
0931 #define SET_UNIPERIF_I2S_FMT_ALIGN_RIGHT(ip) \
0932     SET_UNIPERIF_REG(ip, \
0933         UNIPERIF_I2S_FMT_OFFSET(ip), \
0934         UNIPERIF_I2S_FMT_ALIGN_SHIFT(ip), \
0935         UNIPERIF_I2S_FMT_ALIGN_MASK(ip), 1)
0936 
0937 /* ORDER */
0938 #define UNIPERIF_I2S_FMT_ORDER_SHIFT(ip) 8
0939 #define UNIPERIF_I2S_FMT_ORDER_MASK(ip) 0x1
0940 #define GET_UNIPERIF_I2S_FMT_ORDER(ip) \
0941     GET_UNIPERIF_REG(ip, \
0942         UNIPERIF_I2S_FMT_OFFSET(ip), \
0943         UNIPERIF_I2S_FMT_ORDER_SHIFT(ip), \
0944         UNIPERIF_I2S_FMT_ORDER_MASK(ip))
0945 #define SET_UNIPERIF_I2S_FMT_ORDER_LSB(ip) \
0946     SET_UNIPERIF_REG(ip, \
0947         UNIPERIF_I2S_FMT_OFFSET(ip), \
0948         UNIPERIF_I2S_FMT_ORDER_SHIFT(ip), \
0949         UNIPERIF_I2S_FMT_ORDER_MASK(ip), 0)
0950 #define SET_UNIPERIF_I2S_FMT_ORDER_MSB(ip) \
0951     SET_UNIPERIF_REG(ip, \
0952         UNIPERIF_I2S_FMT_OFFSET(ip), \
0953         UNIPERIF_I2S_FMT_ORDER_SHIFT(ip), \
0954         UNIPERIF_I2S_FMT_ORDER_MASK(ip), 1)
0955 
0956 /* NUM_CH */
0957 #define UNIPERIF_I2S_FMT_NUM_CH_SHIFT(ip) 9
0958 #define UNIPERIF_I2S_FMT_NUM_CH_MASK(ip) 0x7
0959 #define GET_UNIPERIF_I2S_FMT_NUM_CH(ip) \
0960     GET_UNIPERIF_REG(ip, \
0961         UNIPERIF_I2S_FMT_OFFSET(ip), \
0962         UNIPERIF_I2S_FMT_NUM_CH_SHIFT(ip), \
0963         UNIPERIF_I2S_FMT_NUM_CH_MASK(ip))
0964 #define SET_UNIPERIF_I2S_FMT_NUM_CH(ip, value) \
0965     SET_UNIPERIF_REG(ip, \
0966         UNIPERIF_I2S_FMT_OFFSET(ip), \
0967         UNIPERIF_I2S_FMT_NUM_CH_SHIFT(ip), \
0968         UNIPERIF_I2S_FMT_NUM_CH_MASK(ip), value)
0969 
0970 /* NO_OF_SAMPLES_TO_READ */
0971 #define UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_SHIFT(ip) 12
0972 #define UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_MASK(ip) 0xfffff
0973 #define GET_UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ(ip) \
0974     GET_UNIPERIF_REG(ip, \
0975         UNIPERIF_I2S_FMT_OFFSET(ip), \
0976         UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_SHIFT(ip), \
0977         UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_MASK(ip))
0978 #define SET_UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ(ip, value) \
0979     SET_UNIPERIF_REG(ip, \
0980         UNIPERIF_I2S_FMT_OFFSET(ip), \
0981         UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_SHIFT(ip), \
0982         UNIPERIF_I2S_FMT_NO_OF_SAMPLES_TO_READ_MASK(ip), value)
0983 
0984 /*
0985  * UNIPERIF_BIT_CONTROL reg
0986  */
0987 
0988 #define UNIPERIF_BIT_CONTROL_OFFSET(ip)  \
0989     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 0x004c)
0990 #define GET_UNIPERIF_BIT_CONTROL(ip) \
0991     readl_relaxed(ip->base + UNIPERIF_BIT_CONTROL_OFFSET(ip))
0992 #define SET_UNIPERIF_BIT_CONTROL(ip, value) \
0993     writel_relaxed(value, ip->base + UNIPERIF_BIT_CONTROL_OFFSET(ip))
0994 
0995 /* CLR_UNDERFLOW_DURATION */
0996 #define UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_SHIFT(ip) 0
0997 #define UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_MASK(ip) 0x1
0998 #define GET_UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION(ip) \
0999     GET_UNIPERIF_REG(ip, \
1000         UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1001         UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_SHIFT(ip), \
1002         UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_MASK(ip))
1003 #define SET_UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION(ip) \
1004     SET_UNIPERIF_REG(ip, \
1005         UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1006         UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_SHIFT(ip), \
1007         UNIPERIF_BIT_CONTROL_CLR_UNDERFLOW_DURATION_MASK(ip), 1)
1008 
1009 /* CHL_STS_UPDATE */
1010 #define UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_SHIFT(ip) 1
1011 #define UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_MASK(ip) 0x1
1012 #define GET_UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE(ip) \
1013     GET_UNIPERIF_REG(ip, \
1014         UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1015         UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_SHIFT(ip), \
1016         UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_MASK(ip))
1017 #define SET_UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE(ip) \
1018     SET_UNIPERIF_BIT_REG(ip, \
1019         UNIPERIF_BIT_CONTROL_OFFSET(ip), \
1020         UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_SHIFT(ip), \
1021         UNIPERIF_BIT_CONTROL_CHL_STS_UPDATE_MASK(ip), 1)
1022 
1023 /*
1024  * UNIPERIF_STATUS_1 reg
1025  */
1026 
1027 #define UNIPERIF_STATUS_1_OFFSET(ip) 0x0050
1028 #define GET_UNIPERIF_STATUS_1(ip) \
1029     readl_relaxed(ip->base + UNIPERIF_STATUS_1_OFFSET(ip))
1030 #define SET_UNIPERIF_STATUS_1(ip, value) \
1031     writel_relaxed(value, ip->base + UNIPERIF_STATUS_1_OFFSET(ip))
1032 
1033 /* UNDERFLOW_DURATION */
1034 #define UNIPERIF_STATUS_1_UNDERFLOW_DURATION_SHIFT(ip) \
1035     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 0)
1036 #define UNIPERIF_STATUS_1_UNDERFLOW_DURATION_MASK(ip) 0xff
1037 #define GET_UNIPERIF_STATUS_1_UNDERFLOW_DURATION(ip) \
1038     GET_UNIPERIF_REG(ip, \
1039         UNIPERIF_STATUS_1_OFFSET(ip), \
1040         UNIPERIF_STATUS_1_UNDERFLOW_DURATION_SHIFT(ip), \
1041         UNIPERIF_STATUS_1_UNDERFLOW_DURATION_MASK(ip))
1042 #define SET_UNIPERIF_STATUS_1_UNDERFLOW_DURATION(ip, value) \
1043     SET_UNIPERIF_REG(ip, \
1044         UNIPERIF_STATUS_1_OFFSET(ip), \
1045         UNIPERIF_STATUS_1_UNDERFLOW_DURATION_SHIFT(ip), \
1046         UNIPERIF_STATUS_1_UNDERFLOW_DURATION_MASK(ip), value)
1047 
1048 /*
1049  * UNIPERIF_CHANNEL_STA_REGN reg
1050  */
1051 
1052 #define UNIPERIF_CHANNEL_STA_REGN(ip, n) (0x0060 + (4 * n))
1053 #define GET_UNIPERIF_CHANNEL_STA_REGN(ip) \
1054     readl_relaxed(ip->base + UNIPERIF_CHANNEL_STA_REGN(ip, n))
1055 #define SET_UNIPERIF_CHANNEL_STA_REGN(ip, n, value) \
1056     writel_relaxed(value, ip->base + \
1057             UNIPERIF_CHANNEL_STA_REGN(ip, n))
1058 
1059 /*
1060  * UNIPERIF_USER_VALIDITY reg
1061  */
1062 
1063 #define UNIPERIF_USER_VALIDITY_OFFSET(ip) 0x0090
1064 #define GET_UNIPERIF_USER_VALIDITY(ip) \
1065     readl_relaxed(ip->base + UNIPERIF_USER_VALIDITY_OFFSET(ip))
1066 #define SET_UNIPERIF_USER_VALIDITY(ip, value) \
1067     writel_relaxed(value, ip->base + UNIPERIF_USER_VALIDITY_OFFSET(ip))
1068 
1069 /* VALIDITY_LEFT_AND_RIGHT */
1070 #define UNIPERIF_USER_VALIDITY_VALIDITY_LR_SHIFT(ip) 0
1071 #define UNIPERIF_USER_VALIDITY_VALIDITY_LR_MASK(ip) 0x3
1072 #define GET_UNIPERIF_USER_VALIDITY_VALIDITY_LR(ip) \
1073     GET_UNIPERIF_REG(ip, \
1074         UNIPERIF_USER_VALIDITY_OFFSET(ip), \
1075         UNIPERIF_USER_VALIDITY_VALIDITY_LR_SHIFT(ip), \
1076         UNIPERIF_USER_VALIDITY_VALIDITY_LR_MASK(ip))
1077 #define SET_UNIPERIF_USER_VALIDITY_VALIDITY_LR(ip, value) \
1078     SET_UNIPERIF_REG(ip, \
1079         UNIPERIF_USER_VALIDITY_OFFSET(ip), \
1080         UNIPERIF_USER_VALIDITY_VALIDITY_LR_SHIFT(ip), \
1081         UNIPERIF_USER_VALIDITY_VALIDITY_LR_MASK(ip), \
1082         value ? 0x3 : 0)
1083 
1084 /*
1085  * UNIPERIF_DBG_STANDBY_LEFT_SP reg
1086  */
1087 #define UNIPERIF_DBG_STANDBY_LEFT_SP_OFFSET(ip) 0x0150
1088 #define UNIPERIF_DBG_STANDBY_LEFT_SP_SHIFT(ip) \
1089     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? -1 : 0)
1090 #define UNIPERIF_DBG_STANDBY_LEFT_SP_MASK(ip) \
1091     ((ip)->ver < SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0 ? 0 : 0xFFFFFF)
1092 #define GET_UNIPERIF_DBG_STANDBY_LEFT_SP(ip) \
1093     GET_UNIPERIF_REG(ip, \
1094         UNIPERIF_DBG_STANDBY_LEFT_SP_OFFSET(ip), \
1095         UNIPERIF_DBG_STANDBY_LEFT_SP_SHIFT(ip), \
1096         UNIPERIF_DBG_STANDBY_LEFT_SP_MASK(ip))
1097 #define SET_UNIPERIF_DBG_STANDBY_LEFT_SP(ip, value) \
1098     SET_UNIPERIF_REG(ip, \
1099         UNIPERIF_DBG_STANDBY_LEFT_SP_OFFSET(ip), \
1100         UNIPERIF_DBG_STANDBY_LEFT_SP_SHIFT(ip), \
1101         UNIPERIF_DBG_STANDBY_LEFT_SP_MASK(ip), value)
1102 
1103 /*
1104  * UNIPERIF_TDM_ENABLE
1105  */
1106 #define UNIPERIF_TDM_ENABLE_OFFSET(ip) 0x0118
1107 #define GET_UNIPERIF_TDM_ENABLE(ip) \
1108     readl_relaxed(ip->base + UNIPERIF_TDM_ENABLE_OFFSET(ip))
1109 #define SET_UNIPERIF_TDM_ENABLE(ip, value) \
1110     writel_relaxed(value, ip->base + UNIPERIF_TDM_ENABLE_OFFSET(ip))
1111 
1112 /* TDM_ENABLE */
1113 #define UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip) 0x0
1114 #define UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip) 0x1
1115 #define GET_UNIPERIF_TDM_ENABLE_EN_TDM(ip) \
1116         GET_UNIPERIF_REG(ip, \
1117         UNIPERIF_TDM_ENABLE_OFFSET(ip), \
1118         UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip), \
1119         UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip))
1120 #define SET_UNIPERIF_TDM_ENABLE_TDM_ENABLE(ip) \
1121         SET_UNIPERIF_REG(ip, \
1122         UNIPERIF_TDM_ENABLE_OFFSET(ip), \
1123         UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip), \
1124         UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip), 1)
1125 #define SET_UNIPERIF_TDM_ENABLE_TDM_DISABLE(ip) \
1126         SET_UNIPERIF_REG(ip, \
1127         UNIPERIF_TDM_ENABLE_OFFSET(ip), \
1128         UNIPERIF_TDM_ENABLE_EN_TDM_SHIFT(ip), \
1129         UNIPERIF_TDM_ENABLE_EN_TDM_MASK(ip), 0)
1130 
1131 /*
1132  * UNIPERIF_TDM_FS_REF_FREQ
1133  */
1134 #define UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip) 0x011c
1135 #define GET_UNIPERIF_TDM_FS_REF_FREQ(ip) \
1136     readl_relaxed(ip->base + UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip))
1137 #define SET_UNIPERIF_TDM_FS_REF_FREQ(ip, value) \
1138     writel_relaxed(value, ip->base + \
1139             UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip))
1140 
1141 /* REF_FREQ */
1142 #define UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip) 0x0
1143 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_8KHZ(ip) 0
1144 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_16KHZ(ip) 1
1145 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_32KHZ(ip) 2
1146 #define VALUE_UNIPERIF_TDM_FS_REF_FREQ_48KHZ(ip) 3
1147 #define UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip) 0x3
1148 #define GET_UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ(ip) \
1149         GET_UNIPERIF_REG(ip, \
1150         UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1151         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1152         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip))
1153 #define SET_UNIPERIF_TDM_FS_REF_FREQ_8KHZ(ip) \
1154         SET_UNIPERIF_REG(ip, \
1155         UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1156         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1157         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1158         VALUE_UNIPERIF_TDM_FS_REF_FREQ_8KHZ(ip))
1159 #define SET_UNIPERIF_TDM_FS_REF_FREQ_16KHZ(ip) \
1160         SET_UNIPERIF_REG(ip, \
1161         UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1162         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1163         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1164         VALUE_UNIPERIF_TDM_FS_REF_FREQ_16KHZ(ip))
1165 #define SET_UNIPERIF_TDM_FS_REF_FREQ_32KHZ(ip) \
1166         SET_UNIPERIF_REG(ip, \
1167         UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1168         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1169         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1170         VALUE_UNIPERIF_TDM_FS_REF_FREQ_32KHZ(ip))
1171 #define SET_UNIPERIF_TDM_FS_REF_FREQ_48KHZ(ip) \
1172         SET_UNIPERIF_REG(ip, \
1173         UNIPERIF_TDM_FS_REF_FREQ_OFFSET(ip), \
1174         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_SHIFT(ip), \
1175         UNIPERIF_TDM_FS_REF_FREQ_REF_FREQ_MASK(ip), \
1176         VALUE_UNIPERIF_TDM_FS_REF_FREQ_48KHZ(ip))
1177 
1178 /*
1179  * UNIPERIF_TDM_FS_REF_DIV
1180  */
1181 #define UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip) 0x0120
1182 #define GET_UNIPERIF_TDM_FS_REF_DIV(ip) \
1183     readl_relaxed(ip->base + UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip))
1184 #define SET_UNIPERIF_TDM_FS_REF_DIV(ip, value) \
1185         writel_relaxed(value, ip->base + \
1186             UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip))
1187 
1188 /* NUM_TIMESLOT */
1189 #define UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_SHIFT(ip) 0x0
1190 #define UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_MASK(ip) 0xff
1191 #define GET_UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT(ip) \
1192         GET_UNIPERIF_REG(ip, \
1193         UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip), \
1194         UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_SHIFT(ip), \
1195         UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_MASK(ip))
1196 #define SET_UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT(ip, value) \
1197         SET_UNIPERIF_REG(ip, \
1198         UNIPERIF_TDM_FS_REF_DIV_OFFSET(ip), \
1199         UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_SHIFT(ip), \
1200         UNIPERIF_TDM_FS_REF_DIV_NUM_TIMESLOT_MASK(ip), value)
1201 
1202 /*
1203  * UNIPERIF_TDM_WORD_POS_X_Y
1204  * 32 bits of UNIPERIF_TDM_WORD_POS_X_Y register shall be set in 1 shot
1205  */
1206 #define UNIPERIF_TDM_WORD_POS_1_2_OFFSET(ip) 0x013c
1207 #define UNIPERIF_TDM_WORD_POS_3_4_OFFSET(ip) 0x0140
1208 #define UNIPERIF_TDM_WORD_POS_5_6_OFFSET(ip) 0x0144
1209 #define UNIPERIF_TDM_WORD_POS_7_8_OFFSET(ip) 0x0148
1210 #define GET_UNIPERIF_TDM_WORD_POS(ip, words) \
1211     readl_relaxed(ip->base + UNIPERIF_TDM_WORD_POS_##words##_OFFSET(ip))
1212 #define SET_UNIPERIF_TDM_WORD_POS(ip, words, value) \
1213         writel_relaxed(value, ip->base + \
1214         UNIPERIF_TDM_WORD_POS_##words##_OFFSET(ip))
1215 /*
1216  * uniperipheral IP capabilities
1217  */
1218 
1219 #define UNIPERIF_FIFO_SIZE      70 /* FIFO is 70 cells deep */
1220 #define UNIPERIF_FIFO_FRAMES        4  /* FDMA trigger limit in frames */
1221 
1222 #define UNIPERIF_TYPE_IS_HDMI(p) \
1223     ((p)->type == SND_ST_UNIPERIF_TYPE_HDMI)
1224 #define UNIPERIF_TYPE_IS_PCM(p) \
1225     ((p)->type == SND_ST_UNIPERIF_TYPE_PCM)
1226 #define UNIPERIF_TYPE_IS_SPDIF(p) \
1227     ((p)->type == SND_ST_UNIPERIF_TYPE_SPDIF)
1228 #define UNIPERIF_TYPE_IS_IEC958(p) \
1229     (UNIPERIF_TYPE_IS_HDMI(p) || \
1230         UNIPERIF_TYPE_IS_SPDIF(p))
1231 #define UNIPERIF_TYPE_IS_TDM(p) \
1232     ((p)->type == SND_ST_UNIPERIF_TYPE_TDM)
1233 
1234 /*
1235  * Uniperipheral IP revisions
1236  */
1237 enum uniperif_version {
1238     SND_ST_UNIPERIF_VERSION_UNKNOWN,
1239     /* SASG1 (Orly), Newman */
1240     SND_ST_UNIPERIF_VERSION_C6AUD0_UNI_1_0,
1241     /* SASC1, SASG2 (Orly2) */
1242     SND_ST_UNIPERIF_VERSION_UNI_PLR_1_0,
1243     /* SASC1, SASG2 (Orly2), TELSS, Cannes */
1244     SND_ST_UNIPERIF_VERSION_UNI_RDR_1_0,
1245     /* TELSS (SASC1) */
1246     SND_ST_UNIPERIF_VERSION_TDM_PLR_1_0,
1247     /* Cannes/Monaco */
1248     SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0
1249 };
1250 
1251 enum uniperif_type {
1252     SND_ST_UNIPERIF_TYPE_NONE   = 0x00,
1253     SND_ST_UNIPERIF_TYPE_HDMI   = 0x01,
1254     SND_ST_UNIPERIF_TYPE_PCM    = 0x02,
1255     SND_ST_UNIPERIF_TYPE_SPDIF  = 0x04,
1256     SND_ST_UNIPERIF_TYPE_TDM    = 0x08
1257 };
1258 
1259 enum uniperif_state {
1260     UNIPERIF_STATE_STOPPED,
1261     UNIPERIF_STATE_STARTED,
1262     UNIPERIF_STATE_STANDBY,
1263     UNIPERIF_STATE_UNDERFLOW,
1264     UNIPERIF_STATE_OVERFLOW = UNIPERIF_STATE_UNDERFLOW,
1265     UNIPERIF_STATE_XRUN
1266 };
1267 
1268 enum uniperif_iec958_encoding_mode {
1269     UNIPERIF_IEC958_ENCODING_MODE_PCM,
1270     UNIPERIF_IEC958_ENCODING_MODE_ENCODED
1271 };
1272 
1273 enum uniperif_word_pos {
1274     WORD_1_2,
1275     WORD_3_4,
1276     WORD_5_6,
1277     WORD_7_8,
1278     WORD_MAX
1279 };
1280 
1281 struct uniperif_iec958_settings {
1282     enum uniperif_iec958_encoding_mode encoding_mode;
1283     struct snd_aes_iec958 iec958;
1284 };
1285 
1286 struct dai_tdm_slot {
1287     unsigned int mask;
1288     int slots;
1289     int slot_width;
1290     unsigned int avail_slots;
1291 };
1292 
1293 struct uniperif {
1294     /* System information */
1295     enum uniperif_type type;
1296     int underflow_enabled; /* Underflow recovery mode */
1297     struct device *dev;
1298     int id; /* instance value of the uniperipheral IP */
1299     int ver; /* IP version, used by register access macros */
1300     struct regmap_field *clk_sel;
1301     struct regmap_field *valid_sel;
1302     spinlock_t irq_lock; /* use to prevent race condition with IRQ */
1303 
1304     /* capabilities */
1305     const struct snd_pcm_hardware *hw;
1306 
1307     /* Resources */
1308     struct resource *mem_region;
1309     void __iomem *base;
1310     unsigned long fifo_phys_address;
1311     int irq;
1312 
1313     /* Clocks */
1314     struct clk *clk;
1315     int mclk;
1316     int clk_adj;
1317 
1318     /* Runtime data */
1319     enum uniperif_state state;
1320 
1321     struct snd_pcm_substream *substream;
1322 
1323     /* Specific to IEC958 player */
1324     struct uniperif_iec958_settings stream_settings;
1325     struct mutex ctrl_lock; /* For resource updated by stream and controls*/
1326 
1327     /*alsa ctrl*/
1328     struct snd_kcontrol_new *snd_ctrls;
1329     int num_ctrls;
1330 
1331     /* dai properties */
1332     unsigned int daifmt;
1333     struct dai_tdm_slot tdm_slot;
1334 
1335     /* DAI callbacks */
1336     const struct snd_soc_dai_ops *dai_ops;
1337 };
1338 
1339 struct sti_uniperiph_dai {
1340     int stream;
1341     struct uniperif *uni;
1342     struct snd_dmaengine_dai_dma_data dma_data;
1343 };
1344 
1345 struct sti_uniperiph_data {
1346     struct platform_device *pdev;
1347     struct snd_soc_dai_driver *dai;
1348     struct sti_uniperiph_dai dai_data;
1349 };
1350 
1351 static __maybe_unused const struct snd_pcm_hardware uni_tdm_hw = {
1352     .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
1353         SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP |
1354         SNDRV_PCM_INFO_MMAP_VALID,
1355 
1356     .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE,
1357 
1358     .rates = SNDRV_PCM_RATE_CONTINUOUS,
1359     .rate_min = 8000,
1360     .rate_max = 48000,
1361 
1362     .channels_min = 1,
1363     .channels_max = 32,
1364 
1365     .periods_min = 2,
1366     .periods_max = 10,
1367 
1368     .period_bytes_min = 128,
1369     .period_bytes_max = 64 * PAGE_SIZE,
1370     .buffer_bytes_max = 256 * PAGE_SIZE
1371 };
1372 
1373 /* uniperiph player*/
1374 int uni_player_init(struct platform_device *pdev,
1375             struct uniperif *player);
1376 int uni_player_resume(struct uniperif *player);
1377 
1378 /* uniperiph reader */
1379 int uni_reader_init(struct platform_device *pdev,
1380             struct uniperif *reader);
1381 
1382 /* common */
1383 int sti_uniperiph_dai_set_fmt(struct snd_soc_dai *dai,
1384                   unsigned int fmt);
1385 
1386 int sti_uniperiph_dai_hw_params(struct snd_pcm_substream *substream,
1387                 struct snd_pcm_hw_params *params,
1388                 struct snd_soc_dai *dai);
1389 
1390 static inline int sti_uniperiph_get_user_frame_size(
1391     struct snd_pcm_runtime *runtime)
1392 {
1393     return (runtime->channels * snd_pcm_format_width(runtime->format) / 8);
1394 }
1395 
1396 static inline int sti_uniperiph_get_unip_tdm_frame_size(struct uniperif *uni)
1397 {
1398     return (uni->tdm_slot.slots * uni->tdm_slot.slot_width / 8);
1399 }
1400 
1401 int  sti_uniperiph_reset(struct uniperif *uni);
1402 
1403 int sti_uniperiph_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1404                    unsigned int rx_mask, int slots,
1405                    int slot_width);
1406 
1407 int sti_uniperiph_get_tdm_word_pos(struct uniperif *uni,
1408                    unsigned int *word_pos);
1409 
1410 int sti_uniperiph_fix_tdm_chan(struct snd_pcm_hw_params *params,
1411                    struct snd_pcm_hw_rule *rule);
1412 
1413 int sti_uniperiph_fix_tdm_format(struct snd_pcm_hw_params *params,
1414                  struct snd_pcm_hw_rule *rule);
1415 
1416 #endif
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