soc/spear/spdif_out_regs.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * SPEAr SPDIF OUT controller header file
0004  *
0005  * Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com)
0006  */
0007
0008 #ifndef SPDIF_OUT_REGS_H
0009 #define SPDIF_OUT_REGS_H
0010
0011 #define SPDIF_OUT_SOFT_RST  0x00
0012     #define SPDIF_OUT_RESET     (1 << 0)
0013 #define SPDIF_OUT_FIFO_DATA 0x04
0014 #define SPDIF_OUT_INT_STA   0x08
0015 #define SPDIF_OUT_INT_STA_CLR   0x0C
0016     #define SPDIF_INT_UNDERFLOW (1 << 0)
0017     #define SPDIF_INT_EODATA    (1 << 1)
0018     #define SPDIF_INT_EOBLOCK   (1 << 2)
0019     #define SPDIF_INT_EOLATENCY (1 << 3)
0020     #define SPDIF_INT_EOPD_DATA (1 << 4)
0021     #define SPDIF_INT_MEMFULLREAD   (1 << 5)
0022     #define SPDIF_INT_EOPD_PAUSE    (1 << 6)
0023
0024 #define SPDIF_OUT_INT_EN    0x10
0025 #define SPDIF_OUT_INT_EN_SET    0x14
0026 #define SPDIF_OUT_INT_EN_CLR    0x18
0027 #define SPDIF_OUT_CTRL      0x1C
0028     #define SPDIF_OPMODE_MASK   (7 << 0)
0029     #define SPDIF_OPMODE_OFF    (0 << 0)
0030     #define SPDIF_OPMODE_MUTE_PCM   (1 << 0)
0031     #define SPDIF_OPMODE_MUTE_PAUSE (2 << 0)
0032     #define SPDIF_OPMODE_AUD_DATA   (3 << 0)
0033     #define SPDIF_OPMODE_ENCODE (4 << 0)
0034     #define SPDIF_STATE_NORMAL  (1 << 3)
0035     #define SPDIF_DIVIDER_MASK  (0xff << 5)
0036     #define SPDIF_DIVIDER_SHIFT (5)
0037     #define SPDIF_SAMPLEREAD_MASK   (0x1ffff << 15)
0038     #define SPDIF_SAMPLEREAD_SHIFT  (15)
0039 #define SPDIF_OUT_STA       0x20
0040 #define SPDIF_OUT_PA_PB     0x24
0041 #define SPDIF_OUT_PC_PD     0x28
0042 #define SPDIF_OUT_CL1       0x2C
0043 #define SPDIF_OUT_CR1       0x30
0044 #define SPDIF_OUT_CL2_CR2_UV    0x34
0045 #define SPDIF_OUT_PAUSE_LAT 0x38
0046 #define SPDIF_OUT_FRMLEN_BRST   0x3C
0047 #define SPDIF_OUT_CFG       0x40
0048     #define SPDIF_OUT_MEMFMT_16_0   (0 << 5)
0049     #define SPDIF_OUT_MEMFMT_16_16  (1 << 5)
0050     #define SPDIF_OUT_VALID_DMA (0 << 3)
0051     #define SPDIF_OUT_VALID_HW  (1 << 3)
0052     #define SPDIF_OUT_USER_DMA  (0 << 2)
0053     #define SPDIF_OUT_USER_HW   (1 << 2)
0054     #define SPDIF_OUT_CHNLSTA_DMA   (0 << 1)
0055     #define SPDIF_OUT_CHNLSTA_HW    (1 << 1)
0056     #define SPDIF_OUT_PARITY_HW (0 << 0)
0057     #define SPDIF_OUT_PARITY_DMA    (1 << 0)
0058     #define SPDIF_OUT_FDMA_TRIG_2   (2 << 8)
0059     #define SPDIF_OUT_FDMA_TRIG_6   (6 << 8)
0060     #define SPDIF_OUT_FDMA_TRIG_8   (8 << 8)
0061     #define SPDIF_OUT_FDMA_TRIG_10  (10 << 8)
0062     #define SPDIF_OUT_FDMA_TRIG_12  (12 << 8)
0063     #define SPDIF_OUT_FDMA_TRIG_16  (16 << 8)
0064     #define SPDIF_OUT_FDMA_TRIG_18  (18 << 8)
0065
0066 #endif /* SPDIF_OUT_REGS_H */