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0001 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
0002 //
0003 // This file is provided under a dual BSD/GPLv2 license.  When using or
0004 // redistributing this file, you may do so under either license.
0005 //
0006 // Copyright(c) 2018 Intel Corporation. All rights reserved.
0007 //
0008 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
0009 //      Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
0010 //      Rander Wang <rander.wang@intel.com>
0011 //          Keyon Jie <yang.jie@linux.intel.com>
0012 //
0013 
0014 /*
0015  * Hardware interface for generic Intel audio DSP HDA IP
0016  */
0017 
0018 #include <sound/hdaudio_ext.h>
0019 #include <sound/hda_register.h>
0020 
0021 #include <linux/acpi.h>
0022 #include <linux/module.h>
0023 #include <linux/soundwire/sdw.h>
0024 #include <linux/soundwire/sdw_intel.h>
0025 #include <sound/intel-dsp-config.h>
0026 #include <sound/intel-nhlt.h>
0027 #include <sound/sof.h>
0028 #include <sound/sof/xtensa.h>
0029 #include "../sof-audio.h"
0030 #include "../sof-pci-dev.h"
0031 #include "../ops.h"
0032 #include "hda.h"
0033 
0034 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
0035 #include <sound/soc-acpi-intel-match.h>
0036 #endif
0037 
0038 /* platform specific devices */
0039 #include "shim.h"
0040 
0041 #define EXCEPT_MAX_HDR_SIZE 0x400
0042 #define HDA_EXT_ROM_STATUS_SIZE 8
0043 
0044 int hda_ctrl_dai_widget_setup(struct snd_soc_dapm_widget *w, unsigned int quirk_flags,
0045                   struct snd_sof_dai_config_data *data)
0046 {
0047     struct snd_sof_widget *swidget = w->dobj.private;
0048     struct snd_soc_component *component = swidget->scomp;
0049     struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
0050     const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg;
0051     struct snd_sof_dai *sof_dai = swidget->private;
0052     int ret;
0053 
0054     if (!sof_dai) {
0055         dev_err(sdev->dev, "%s: No DAI for DAI widget %s\n", __func__, w->name);
0056         return -EINVAL;
0057     }
0058 
0059     if (tplg_ops->dai_config) {
0060         unsigned int flags;
0061 
0062         /* set HW_PARAMS flag along with quirks */
0063         flags = SOF_DAI_CONFIG_FLAGS_HW_PARAMS |
0064             quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT;
0065 
0066         ret = tplg_ops->dai_config(sdev, swidget, flags, data);
0067         if (ret < 0) {
0068             dev_err(sdev->dev, "%s: DAI config failed for widget %s\n", __func__,
0069                 w->name);
0070             return ret;
0071         }
0072     }
0073 
0074     return 0;
0075 }
0076 
0077 int hda_ctrl_dai_widget_free(struct snd_soc_dapm_widget *w, unsigned int quirk_flags,
0078                  struct snd_sof_dai_config_data *data)
0079 {
0080     struct snd_sof_widget *swidget = w->dobj.private;
0081     struct snd_soc_component *component = swidget->scomp;
0082     struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
0083     const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg;
0084     struct snd_sof_dai *sof_dai = swidget->private;
0085 
0086     if (!sof_dai) {
0087         dev_err(sdev->dev, "%s: No DAI for BE DAI widget %s\n", __func__, w->name);
0088         return -EINVAL;
0089     }
0090 
0091     if (tplg_ops->dai_config) {
0092         unsigned int flags;
0093         int ret;
0094 
0095         /* set HW_FREE flag along with any quirks */
0096         flags = SOF_DAI_CONFIG_FLAGS_HW_FREE |
0097             quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT;
0098 
0099         ret = tplg_ops->dai_config(sdev, swidget, flags, data);
0100         if (ret < 0)
0101             dev_err(sdev->dev, "%s: DAI config failed for widget '%s'\n", __func__,
0102                 w->name);
0103     }
0104 
0105     return 0;
0106 }
0107 
0108 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
0109 
0110 /*
0111  * The default for SoundWire clock stop quirks is to power gate the IP
0112  * and do a Bus Reset, this will need to be modified when the DSP
0113  * needs to remain in D0i3 so that the Master does not lose context
0114  * and enumeration is not required on clock restart
0115  */
0116 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET;
0117 module_param(sdw_clock_stop_quirks, int, 0444);
0118 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks");
0119 
0120 static int sdw_params_stream(struct device *dev,
0121                  struct sdw_intel_stream_params_data *params_data)
0122 {
0123     struct snd_soc_dai *d = params_data->dai;
0124     struct snd_sof_dai_config_data data;
0125     struct snd_soc_dapm_widget *w;
0126 
0127     w = snd_soc_dai_get_widget(d, params_data->stream);
0128     data.dai_index = (params_data->link_id << 8) | d->id;
0129     data.dai_data = params_data->alh_stream_id;
0130 
0131     return hda_ctrl_dai_widget_setup(w, SOF_DAI_CONFIG_FLAGS_NONE, &data);
0132 }
0133 
0134 static int sdw_free_stream(struct device *dev,
0135                struct sdw_intel_stream_free_data *free_data)
0136 {
0137     struct snd_soc_dai *d = free_data->dai;
0138     struct snd_sof_dai_config_data data;
0139     struct snd_soc_dapm_widget *w;
0140 
0141     w = snd_soc_dai_get_widget(d, free_data->stream);
0142     data.dai_index = (free_data->link_id << 8) | d->id;
0143 
0144     /* send invalid stream_id */
0145     data.dai_data = 0xFFFF;
0146 
0147     return hda_ctrl_dai_widget_free(w, SOF_DAI_CONFIG_FLAGS_NONE, &data);
0148 }
0149 
0150 struct sdw_intel_ops sdw_callback = {
0151     .params_stream = sdw_params_stream,
0152     .free_stream = sdw_free_stream,
0153 };
0154 
0155 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
0156 {
0157     sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable);
0158 }
0159 
0160 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
0161 {
0162     struct sof_intel_hda_dev *hdev;
0163     acpi_handle handle;
0164     int ret;
0165 
0166     handle = ACPI_HANDLE(sdev->dev);
0167 
0168     /* save ACPI info for the probe step */
0169     hdev = sdev->pdata->hw_pdata;
0170 
0171     ret = sdw_intel_acpi_scan(handle, &hdev->info);
0172     if (ret < 0)
0173         return -EINVAL;
0174 
0175     return 0;
0176 }
0177 
0178 static int hda_sdw_probe(struct snd_sof_dev *sdev)
0179 {
0180     struct sof_intel_hda_dev *hdev;
0181     struct sdw_intel_res res;
0182     void *sdw;
0183 
0184     hdev = sdev->pdata->hw_pdata;
0185 
0186     memset(&res, 0, sizeof(res));
0187 
0188     res.mmio_base = sdev->bar[HDA_DSP_BAR];
0189     res.shim_base = hdev->desc->sdw_shim_base;
0190     res.alh_base = hdev->desc->sdw_alh_base;
0191     res.irq = sdev->ipc_irq;
0192     res.handle = hdev->info.handle;
0193     res.parent = sdev->dev;
0194     res.ops = &sdw_callback;
0195     res.dev = sdev->dev;
0196     res.clock_stop_quirks = sdw_clock_stop_quirks;
0197 
0198     /*
0199      * ops and arg fields are not populated for now,
0200      * they will be needed when the DAI callbacks are
0201      * provided
0202      */
0203 
0204     /* we could filter links here if needed, e.g for quirks */
0205     res.count = hdev->info.count;
0206     res.link_mask = hdev->info.link_mask;
0207 
0208     sdw = sdw_intel_probe(&res);
0209     if (!sdw) {
0210         dev_err(sdev->dev, "error: SoundWire probe failed\n");
0211         return -EINVAL;
0212     }
0213 
0214     /* save context */
0215     hdev->sdw = sdw;
0216 
0217     return 0;
0218 }
0219 
0220 int hda_sdw_startup(struct snd_sof_dev *sdev)
0221 {
0222     struct sof_intel_hda_dev *hdev;
0223     struct snd_sof_pdata *pdata = sdev->pdata;
0224 
0225     hdev = sdev->pdata->hw_pdata;
0226 
0227     if (!hdev->sdw)
0228         return 0;
0229 
0230     if (pdata->machine && !pdata->machine->mach_params.link_mask)
0231         return 0;
0232 
0233     return sdw_intel_startup(hdev->sdw);
0234 }
0235 
0236 static int hda_sdw_exit(struct snd_sof_dev *sdev)
0237 {
0238     struct sof_intel_hda_dev *hdev;
0239 
0240     hdev = sdev->pdata->hw_pdata;
0241 
0242     hda_sdw_int_enable(sdev, false);
0243 
0244     if (hdev->sdw)
0245         sdw_intel_exit(hdev->sdw);
0246     hdev->sdw = NULL;
0247 
0248     return 0;
0249 }
0250 
0251 bool hda_common_check_sdw_irq(struct snd_sof_dev *sdev)
0252 {
0253     struct sof_intel_hda_dev *hdev;
0254     bool ret = false;
0255     u32 irq_status;
0256 
0257     hdev = sdev->pdata->hw_pdata;
0258 
0259     if (!hdev->sdw)
0260         return ret;
0261 
0262     /* store status */
0263     irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2);
0264 
0265     /* invalid message ? */
0266     if (irq_status == 0xffffffff)
0267         goto out;
0268 
0269     /* SDW message ? */
0270     if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW)
0271         ret = true;
0272 
0273 out:
0274     return ret;
0275 }
0276 
0277 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
0278 {
0279     const struct sof_intel_dsp_desc *chip;
0280 
0281     chip = get_chip_info(sdev->pdata);
0282     if (chip && chip->check_sdw_irq)
0283         return chip->check_sdw_irq(sdev);
0284 
0285     return false;
0286 }
0287 
0288 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
0289 {
0290     return sdw_intel_thread(irq, context);
0291 }
0292 
0293 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
0294 {
0295     struct sof_intel_hda_dev *hdev;
0296 
0297     hdev = sdev->pdata->hw_pdata;
0298     if (hdev->sdw &&
0299         snd_sof_dsp_read(sdev, HDA_DSP_BAR,
0300                  hdev->desc->sdw_shim_base + SDW_SHIM_WAKESTS))
0301         return true;
0302 
0303     return false;
0304 }
0305 
0306 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
0307 {
0308     struct sof_intel_hda_dev *hdev;
0309 
0310     hdev = sdev->pdata->hw_pdata;
0311     if (!hdev->sdw)
0312         return;
0313 
0314     sdw_intel_process_wakeen_event(hdev->sdw);
0315 }
0316 
0317 #else /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */
0318 static inline int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
0319 {
0320     return 0;
0321 }
0322 
0323 static inline int hda_sdw_probe(struct snd_sof_dev *sdev)
0324 {
0325     return 0;
0326 }
0327 
0328 static inline int hda_sdw_exit(struct snd_sof_dev *sdev)
0329 {
0330     return 0;
0331 }
0332 
0333 static inline bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
0334 {
0335     return false;
0336 }
0337 
0338 static inline irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
0339 {
0340     return IRQ_HANDLED;
0341 }
0342 
0343 static inline bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
0344 {
0345     return false;
0346 }
0347 
0348 #endif /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */
0349 
0350 /*
0351  * Debug
0352  */
0353 
0354 struct hda_dsp_msg_code {
0355     u32 code;
0356     const char *text;
0357 };
0358 
0359 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
0360 static bool hda_use_msi = true;
0361 module_param_named(use_msi, hda_use_msi, bool, 0444);
0362 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
0363 #else
0364 #define hda_use_msi (1)
0365 #endif
0366 
0367 int sof_hda_position_quirk = SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS;
0368 module_param_named(position_quirk, sof_hda_position_quirk, int, 0444);
0369 MODULE_PARM_DESC(position_quirk, "SOF HDaudio position quirk");
0370 
0371 static char *hda_model;
0372 module_param(hda_model, charp, 0444);
0373 MODULE_PARM_DESC(hda_model, "Use the given HDA board model.");
0374 
0375 static int dmic_num_override = -1;
0376 module_param_named(dmic_num, dmic_num_override, int, 0444);
0377 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
0378 
0379 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
0380 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
0381 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
0382 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
0383 #endif
0384 
0385 static const struct hda_dsp_msg_code hda_dsp_rom_fw_error_texts[] = {
0386     {HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
0387     {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
0388     {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
0389     {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
0390     {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
0391     {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
0392     {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
0393     {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
0394     {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
0395     {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
0396     {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
0397     {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
0398     {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
0399     {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
0400     {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
0401     {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"},
0402 };
0403 
0404 #define FSR_ROM_STATE_ENTRY(state)  {FSR_STATE_ROM_##state, #state}
0405 static const struct hda_dsp_msg_code fsr_rom_state_names[] = {
0406     FSR_ROM_STATE_ENTRY(INIT),
0407     FSR_ROM_STATE_ENTRY(INIT_DONE),
0408     FSR_ROM_STATE_ENTRY(CSE_MANIFEST_LOADED),
0409     FSR_ROM_STATE_ENTRY(FW_MANIFEST_LOADED),
0410     FSR_ROM_STATE_ENTRY(FW_FW_LOADED),
0411     FSR_ROM_STATE_ENTRY(FW_ENTERED),
0412     FSR_ROM_STATE_ENTRY(VERIFY_FEATURE_MASK),
0413     FSR_ROM_STATE_ENTRY(GET_LOAD_OFFSET),
0414     FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT),
0415     FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT_DONE),
0416     /* CSE states */
0417     FSR_ROM_STATE_ENTRY(CSE_IMR_REQUEST),
0418     FSR_ROM_STATE_ENTRY(CSE_IMR_GRANTED),
0419     FSR_ROM_STATE_ENTRY(CSE_VALIDATE_IMAGE_REQUEST),
0420     FSR_ROM_STATE_ENTRY(CSE_IMAGE_VALIDATED),
0421     FSR_ROM_STATE_ENTRY(CSE_IPC_IFACE_INIT),
0422     FSR_ROM_STATE_ENTRY(CSE_IPC_RESET_PHASE_1),
0423     FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL_ENTRY),
0424     FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL),
0425     FSR_ROM_STATE_ENTRY(CSE_IPC_DOWN),
0426 };
0427 
0428 #define FSR_BRINGUP_STATE_ENTRY(state)  {FSR_STATE_BRINGUP_##state, #state}
0429 static const struct hda_dsp_msg_code fsr_bringup_state_names[] = {
0430     FSR_BRINGUP_STATE_ENTRY(INIT),
0431     FSR_BRINGUP_STATE_ENTRY(INIT_DONE),
0432     FSR_BRINGUP_STATE_ENTRY(HPSRAM_LOAD),
0433     FSR_BRINGUP_STATE_ENTRY(UNPACK_START),
0434     FSR_BRINGUP_STATE_ENTRY(IMR_RESTORE),
0435     FSR_BRINGUP_STATE_ENTRY(FW_ENTERED),
0436 };
0437 
0438 #define FSR_WAIT_STATE_ENTRY(state) {FSR_WAIT_FOR_##state, #state}
0439 static const struct hda_dsp_msg_code fsr_wait_state_names[] = {
0440     FSR_WAIT_STATE_ENTRY(IPC_BUSY),
0441     FSR_WAIT_STATE_ENTRY(IPC_DONE),
0442     FSR_WAIT_STATE_ENTRY(CACHE_INVALIDATION),
0443     FSR_WAIT_STATE_ENTRY(LP_SRAM_OFF),
0444     FSR_WAIT_STATE_ENTRY(DMA_BUFFER_FULL),
0445     FSR_WAIT_STATE_ENTRY(CSE_CSR),
0446 };
0447 
0448 #define FSR_MODULE_NAME_ENTRY(mod)  [FSR_MOD_##mod] = #mod
0449 static const char * const fsr_module_names[] = {
0450     FSR_MODULE_NAME_ENTRY(ROM),
0451     FSR_MODULE_NAME_ENTRY(ROM_BYP),
0452     FSR_MODULE_NAME_ENTRY(BASE_FW),
0453     FSR_MODULE_NAME_ENTRY(LP_BOOT),
0454     FSR_MODULE_NAME_ENTRY(BRNGUP),
0455     FSR_MODULE_NAME_ENTRY(ROM_EXT),
0456 };
0457 
0458 static const char *
0459 hda_dsp_get_state_text(u32 code, const struct hda_dsp_msg_code *msg_code,
0460                size_t array_size)
0461 {
0462     int i;
0463 
0464     for (i = 0; i < array_size; i++) {
0465         if (code == msg_code[i].code)
0466             return msg_code[i].text;
0467     }
0468 
0469     return NULL;
0470 }
0471 
0472 static void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level)
0473 {
0474     const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata);
0475     const char *state_text, *error_text, *module_text;
0476     u32 fsr, state, wait_state, module, error_code;
0477 
0478     fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg);
0479     state = FSR_TO_STATE_CODE(fsr);
0480     wait_state = FSR_TO_WAIT_STATE_CODE(fsr);
0481     module = FSR_TO_MODULE_CODE(fsr);
0482 
0483     if (module > FSR_MOD_ROM_EXT)
0484         module_text = "unknown";
0485     else
0486         module_text = fsr_module_names[module];
0487 
0488     if (module == FSR_MOD_BRNGUP)
0489         state_text = hda_dsp_get_state_text(state, fsr_bringup_state_names,
0490                             ARRAY_SIZE(fsr_bringup_state_names));
0491     else
0492         state_text = hda_dsp_get_state_text(state, fsr_rom_state_names,
0493                             ARRAY_SIZE(fsr_rom_state_names));
0494 
0495     /* not for us, must be generic sof message */
0496     if (!state_text) {
0497         dev_printk(level, sdev->dev, "%#010x: unknown ROM status value\n", fsr);
0498         return;
0499     }
0500 
0501     if (wait_state) {
0502         const char *wait_state_text;
0503 
0504         wait_state_text = hda_dsp_get_state_text(wait_state, fsr_wait_state_names,
0505                              ARRAY_SIZE(fsr_wait_state_names));
0506         if (!wait_state_text)
0507             wait_state_text = "unknown";
0508 
0509         dev_printk(level, sdev->dev,
0510                "%#010x: module: %s, state: %s, waiting for: %s, %s\n",
0511                fsr, module_text, state_text, wait_state_text,
0512                fsr & FSR_HALTED ? "not running" : "running");
0513     } else {
0514         dev_printk(level, sdev->dev, "%#010x: module: %s, state: %s, %s\n",
0515                fsr, module_text, state_text,
0516                fsr & FSR_HALTED ? "not running" : "running");
0517     }
0518 
0519     error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4);
0520     if (!error_code)
0521         return;
0522 
0523     error_text = hda_dsp_get_state_text(error_code, hda_dsp_rom_fw_error_texts,
0524                         ARRAY_SIZE(hda_dsp_rom_fw_error_texts));
0525     if (!error_text)
0526         error_text = "unknown";
0527 
0528     if (state == FSR_STATE_FW_ENTERED)
0529         dev_printk(level, sdev->dev, "status code: %#x (%s)\n", error_code,
0530                error_text);
0531     else
0532         dev_printk(level, sdev->dev, "error code: %#x (%s)\n", error_code,
0533                error_text);
0534 }
0535 
0536 static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
0537                   struct sof_ipc_dsp_oops_xtensa *xoops,
0538                   struct sof_ipc_panic_info *panic_info,
0539                   u32 *stack, size_t stack_words)
0540 {
0541     u32 offset = sdev->dsp_oops_offset;
0542 
0543     /* first read registers */
0544     sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
0545 
0546     /* note: variable AR register array is not read */
0547 
0548     /* then get panic info */
0549     if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
0550         dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
0551             xoops->arch_hdr.totalsize);
0552         return;
0553     }
0554     offset += xoops->arch_hdr.totalsize;
0555     sof_block_read(sdev, sdev->mmio_bar, offset,
0556                panic_info, sizeof(*panic_info));
0557 
0558     /* then get the stack */
0559     offset += sizeof(*panic_info);
0560     sof_block_read(sdev, sdev->mmio_bar, offset, stack,
0561                stack_words * sizeof(u32));
0562 }
0563 
0564 /* dump the first 8 dwords representing the extended ROM status */
0565 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level,
0566                     u32 flags)
0567 {
0568     const struct sof_intel_dsp_desc *chip;
0569     char msg[128];
0570     int len = 0;
0571     u32 value;
0572     int i;
0573 
0574     chip = get_chip_info(sdev->pdata);
0575     for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) {
0576         value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4);
0577         len += scnprintf(msg + len, sizeof(msg) - len, " 0x%x", value);
0578     }
0579 
0580     dev_printk(level, sdev->dev, "extended rom status: %s", msg);
0581 
0582 }
0583 
0584 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
0585 {
0586     char *level = (flags & SOF_DBG_DUMP_OPTIONAL) ? KERN_DEBUG : KERN_ERR;
0587     struct sof_ipc_dsp_oops_xtensa xoops;
0588     struct sof_ipc_panic_info panic_info;
0589     u32 stack[HDA_DSP_STACK_DUMP_SIZE];
0590 
0591     /* print ROM/FW status */
0592     hda_dsp_get_state(sdev, level);
0593 
0594     if (flags & SOF_DBG_DUMP_REGS) {
0595         u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS);
0596         u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
0597 
0598         hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
0599                       HDA_DSP_STACK_DUMP_SIZE);
0600         sof_print_oops_and_stack(sdev, level, status, panic, &xoops,
0601                      &panic_info, stack, HDA_DSP_STACK_DUMP_SIZE);
0602     } else {
0603         hda_dsp_dump_ext_rom_status(sdev, level, flags);
0604     }
0605 }
0606 
0607 static bool hda_check_ipc_irq(struct snd_sof_dev *sdev)
0608 {
0609     const struct sof_intel_dsp_desc *chip;
0610 
0611     chip = get_chip_info(sdev->pdata);
0612     if (chip && chip->check_ipc_irq)
0613         return chip->check_ipc_irq(sdev);
0614 
0615     return false;
0616 }
0617 
0618 void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
0619 {
0620     struct hdac_bus *bus = sof_to_bus(sdev);
0621     u32 adspis;
0622     u32 intsts;
0623     u32 intctl;
0624     u32 ppsts;
0625     u8 rirbsts;
0626 
0627     /* read key IRQ stats and config registers */
0628     adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
0629     intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
0630     intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
0631     ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
0632     rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
0633 
0634     dev_err(sdev->dev, "hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
0635         intsts, intctl, rirbsts);
0636     dev_err(sdev->dev, "dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", ppsts, adspis);
0637 }
0638 
0639 void hda_ipc_dump(struct snd_sof_dev *sdev)
0640 {
0641     u32 hipcie;
0642     u32 hipct;
0643     u32 hipcctl;
0644 
0645     hda_ipc_irq_dump(sdev);
0646 
0647     /* read IPC status */
0648     hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
0649     hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
0650     hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
0651 
0652     /* dump the IPC regs */
0653     /* TODO: parse the raw msg */
0654     dev_err(sdev->dev, "host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
0655         hipcie, hipct, hipcctl);
0656 }
0657 
0658 static int hda_init(struct snd_sof_dev *sdev)
0659 {
0660     struct hda_bus *hbus;
0661     struct hdac_bus *bus;
0662     struct pci_dev *pci = to_pci_dev(sdev->dev);
0663     int ret;
0664 
0665     hbus = sof_to_hbus(sdev);
0666     bus = sof_to_bus(sdev);
0667 
0668     /* HDA bus init */
0669     sof_hda_bus_init(bus, &pci->dev);
0670 
0671     if (sof_hda_position_quirk == SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS)
0672         bus->use_posbuf = 0;
0673     else
0674         bus->use_posbuf = 1;
0675     bus->bdl_pos_adj = 0;
0676     bus->sync_write = 1;
0677 
0678     mutex_init(&hbus->prepare_mutex);
0679     hbus->pci = pci;
0680     hbus->mixer_assigned = -1;
0681     hbus->modelname = hda_model;
0682 
0683     /* initialise hdac bus */
0684     bus->addr = pci_resource_start(pci, 0);
0685     bus->remap_addr = pci_ioremap_bar(pci, 0);
0686     if (!bus->remap_addr) {
0687         dev_err(bus->dev, "error: ioremap error\n");
0688         return -ENXIO;
0689     }
0690 
0691     /* HDA base */
0692     sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
0693 
0694     /* init i915 and HDMI codecs */
0695     ret = hda_codec_i915_init(sdev);
0696     if (ret < 0)
0697         dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n");
0698 
0699     /* get controller capabilities */
0700     ret = hda_dsp_ctrl_get_caps(sdev);
0701     if (ret < 0)
0702         dev_err(sdev->dev, "error: get caps error\n");
0703 
0704     return ret;
0705 }
0706 
0707 static int check_dmic_num(struct snd_sof_dev *sdev)
0708 {
0709     struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
0710     struct nhlt_acpi_table *nhlt;
0711     int dmic_num = 0;
0712 
0713     nhlt = hdev->nhlt;
0714     if (nhlt)
0715         dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
0716 
0717     /* allow for module parameter override */
0718     if (dmic_num_override != -1) {
0719         dev_dbg(sdev->dev,
0720             "overriding DMICs detected in NHLT tables %d by kernel param %d\n",
0721             dmic_num, dmic_num_override);
0722         dmic_num = dmic_num_override;
0723     }
0724 
0725     if (dmic_num < 0 || dmic_num > 4) {
0726         dev_dbg(sdev->dev, "invalid dmic_number %d\n", dmic_num);
0727         dmic_num = 0;
0728     }
0729 
0730     return dmic_num;
0731 }
0732 
0733 static int check_nhlt_ssp_mask(struct snd_sof_dev *sdev)
0734 {
0735     struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
0736     struct nhlt_acpi_table *nhlt;
0737     int ssp_mask = 0;
0738 
0739     nhlt = hdev->nhlt;
0740     if (!nhlt)
0741         return ssp_mask;
0742 
0743     if (intel_nhlt_has_endpoint_type(nhlt, NHLT_LINK_SSP)) {
0744         ssp_mask = intel_nhlt_ssp_endpoint_mask(nhlt, NHLT_DEVICE_I2S);
0745         if (ssp_mask)
0746             dev_info(sdev->dev, "NHLT_DEVICE_I2S detected, ssp_mask %#x\n", ssp_mask);
0747     }
0748 
0749     return ssp_mask;
0750 }
0751 
0752 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
0753 
0754 static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
0755                    const char *sof_tplg_filename,
0756                    const char *idisp_str,
0757                    const char *dmic_str)
0758 {
0759     const char *tplg_filename = NULL;
0760     char *filename, *tmp;
0761     const char *split_ext;
0762 
0763     filename = kstrdup(sof_tplg_filename, GFP_KERNEL);
0764     if (!filename)
0765         return NULL;
0766 
0767     /* this assumes a .tplg extension */
0768     tmp = filename;
0769     split_ext = strsep(&tmp, ".");
0770     if (split_ext)
0771         tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
0772                            "%s%s%s.tplg",
0773                            split_ext, idisp_str, dmic_str);
0774     kfree(filename);
0775 
0776     return tplg_filename;
0777 }
0778 
0779 static int dmic_detect_topology_fixup(struct snd_sof_dev *sdev,
0780                       const char **tplg_filename,
0781                       const char *idisp_str,
0782                       int *dmic_found,
0783                       bool tplg_fixup)
0784 {
0785     const char *dmic_str;
0786     int dmic_num;
0787 
0788     /* first check for DMICs (using NHLT or module parameter) */
0789     dmic_num = check_dmic_num(sdev);
0790 
0791     switch (dmic_num) {
0792     case 1:
0793         dmic_str = "-1ch";
0794         break;
0795     case 2:
0796         dmic_str = "-2ch";
0797         break;
0798     case 3:
0799         dmic_str = "-3ch";
0800         break;
0801     case 4:
0802         dmic_str = "-4ch";
0803         break;
0804     default:
0805         dmic_num = 0;
0806         dmic_str = "";
0807         break;
0808     }
0809 
0810     if (tplg_fixup) {
0811         const char *default_tplg_filename = *tplg_filename;
0812         const char *fixed_tplg_filename;
0813 
0814         fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename,
0815                               idisp_str, dmic_str);
0816         if (!fixed_tplg_filename)
0817             return -ENOMEM;
0818         *tplg_filename = fixed_tplg_filename;
0819     }
0820 
0821     dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num);
0822     *dmic_found = dmic_num;
0823 
0824     return 0;
0825 }
0826 #endif
0827 
0828 static int hda_init_caps(struct snd_sof_dev *sdev)
0829 {
0830     struct hdac_bus *bus = sof_to_bus(sdev);
0831     struct snd_sof_pdata *pdata = sdev->pdata;
0832 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
0833     struct hdac_ext_link *hlink;
0834 #endif
0835     struct sof_intel_hda_dev *hdev = pdata->hw_pdata;
0836     u32 link_mask;
0837     int ret = 0;
0838 
0839     /* check if dsp is there */
0840     if (bus->ppcap)
0841         dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
0842 
0843     /* Init HDA controller after i915 init */
0844     ret = hda_dsp_ctrl_init_chip(sdev, true);
0845     if (ret < 0) {
0846         dev_err(bus->dev, "error: init chip failed with ret: %d\n",
0847             ret);
0848         return ret;
0849     }
0850 
0851     /* scan SoundWire capabilities exposed by DSDT */
0852     ret = hda_sdw_acpi_scan(sdev);
0853     if (ret < 0) {
0854         dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n");
0855         goto skip_soundwire;
0856     }
0857 
0858     link_mask = hdev->info.link_mask;
0859     if (!link_mask) {
0860         dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n");
0861         goto skip_soundwire;
0862     }
0863 
0864     /*
0865      * probe/allocate SoundWire resources.
0866      * The hardware configuration takes place in hda_sdw_startup
0867      * after power rails are enabled.
0868      * It's entirely possible to have a mix of I2S/DMIC/SoundWire
0869      * devices, so we allocate the resources in all cases.
0870      */
0871     ret = hda_sdw_probe(sdev);
0872     if (ret < 0) {
0873         dev_err(sdev->dev, "error: SoundWire probe error\n");
0874         return ret;
0875     }
0876 
0877 skip_soundwire:
0878 
0879 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
0880     if (bus->mlcap)
0881         snd_hdac_ext_bus_get_ml_capabilities(bus);
0882 
0883     /* create codec instances */
0884     hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
0885 
0886     if (!HDA_IDISP_CODEC(bus->codec_mask))
0887         hda_codec_i915_display_power(sdev, false);
0888 
0889     /*
0890      * we are done probing so decrement link counts
0891      */
0892     list_for_each_entry(hlink, &bus->hlink_list, list)
0893         snd_hdac_ext_bus_link_put(bus, hlink);
0894 #endif
0895     return 0;
0896 }
0897 
0898 static void hda_check_for_state_change(struct snd_sof_dev *sdev)
0899 {
0900 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
0901     struct hdac_bus *bus = sof_to_bus(sdev);
0902     unsigned int codec_mask;
0903 
0904     codec_mask = snd_hdac_chip_readw(bus, STATESTS);
0905     if (codec_mask) {
0906         hda_codec_jack_check(sdev);
0907         snd_hdac_chip_writew(bus, STATESTS, codec_mask);
0908     }
0909 #endif
0910 }
0911 
0912 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context)
0913 {
0914     struct snd_sof_dev *sdev = context;
0915 
0916     /*
0917      * Get global interrupt status. It includes all hardware interrupt
0918      * sources in the Intel HD Audio controller.
0919      */
0920     if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) &
0921         SOF_HDA_INTSTS_GIS) {
0922 
0923         /* disable GIE interrupt */
0924         snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
0925                     SOF_HDA_INTCTL,
0926                     SOF_HDA_INT_GLOBAL_EN,
0927                     0);
0928 
0929         return IRQ_WAKE_THREAD;
0930     }
0931 
0932     return IRQ_NONE;
0933 }
0934 
0935 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
0936 {
0937     struct snd_sof_dev *sdev = context;
0938     struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
0939 
0940     /* deal with streams and controller first */
0941     if (hda_dsp_check_stream_irq(sdev))
0942         hda_dsp_stream_threaded_handler(irq, sdev);
0943 
0944     if (hda_check_ipc_irq(sdev))
0945         sof_ops(sdev)->irq_thread(irq, sdev);
0946 
0947     if (hda_dsp_check_sdw_irq(sdev))
0948         hda_dsp_sdw_thread(irq, hdev->sdw);
0949 
0950     if (hda_sdw_check_wakeen_irq(sdev))
0951         hda_sdw_process_wakeen(sdev);
0952 
0953     hda_check_for_state_change(sdev);
0954 
0955     /* enable GIE interrupt */
0956     snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
0957                 SOF_HDA_INTCTL,
0958                 SOF_HDA_INT_GLOBAL_EN,
0959                 SOF_HDA_INT_GLOBAL_EN);
0960 
0961     return IRQ_HANDLED;
0962 }
0963 
0964 int hda_dsp_probe(struct snd_sof_dev *sdev)
0965 {
0966     struct pci_dev *pci = to_pci_dev(sdev->dev);
0967     struct sof_intel_hda_dev *hdev;
0968     struct hdac_bus *bus;
0969     const struct sof_intel_dsp_desc *chip;
0970     int ret = 0;
0971 
0972     /*
0973      * detect DSP by checking class/subclass/prog-id information
0974      * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
0975      * class=04 subclass 01 prog-if 00: DSP is present
0976      *   (and may be required e.g. for DMIC or SSP support)
0977      * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
0978      */
0979     if (pci->class == 0x040300) {
0980         dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
0981         return -ENODEV;
0982     } else if (pci->class != 0x040100 && pci->class != 0x040380) {
0983         dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
0984         return -ENODEV;
0985     }
0986     dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
0987 
0988     chip = get_chip_info(sdev->pdata);
0989     if (!chip) {
0990         dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
0991             pci->device);
0992         ret = -EIO;
0993         goto err;
0994     }
0995 
0996     sdev->num_cores = chip->cores_num;
0997 
0998     hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
0999     if (!hdev)
1000         return -ENOMEM;
1001     sdev->pdata->hw_pdata = hdev;
1002     hdev->desc = chip;
1003 
1004     hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
1005                                PLATFORM_DEVID_NONE,
1006                                NULL, 0);
1007     if (IS_ERR(hdev->dmic_dev)) {
1008         dev_err(sdev->dev, "error: failed to create DMIC device\n");
1009         return PTR_ERR(hdev->dmic_dev);
1010     }
1011 
1012     /*
1013      * use position update IPC if either it is forced
1014      * or we don't have other choice
1015      */
1016 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
1017     hdev->no_ipc_position = 0;
1018 #else
1019     hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
1020 #endif
1021 
1022     /* set up HDA base */
1023     bus = sof_to_bus(sdev);
1024     ret = hda_init(sdev);
1025     if (ret < 0)
1026         goto hdac_bus_unmap;
1027 
1028     /* DSP base */
1029     sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
1030     if (!sdev->bar[HDA_DSP_BAR]) {
1031         dev_err(sdev->dev, "error: ioremap error\n");
1032         ret = -ENXIO;
1033         goto hdac_bus_unmap;
1034     }
1035 
1036     sdev->mmio_bar = HDA_DSP_BAR;
1037     sdev->mailbox_bar = HDA_DSP_BAR;
1038 
1039     /* allow 64bit DMA address if supported by H/W */
1040     if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) {
1041         dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
1042         dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32));
1043     }
1044     dma_set_max_seg_size(&pci->dev, UINT_MAX);
1045 
1046     /* init streams */
1047     ret = hda_dsp_stream_init(sdev);
1048     if (ret < 0) {
1049         dev_err(sdev->dev, "error: failed to init streams\n");
1050         /*
1051          * not all errors are due to memory issues, but trying
1052          * to free everything does not harm
1053          */
1054         goto free_streams;
1055     }
1056 
1057     /*
1058      * register our IRQ
1059      * let's try to enable msi firstly
1060      * if it fails, use legacy interrupt mode
1061      * TODO: support msi multiple vectors
1062      */
1063     if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
1064         dev_info(sdev->dev, "use msi interrupt mode\n");
1065         sdev->ipc_irq = pci_irq_vector(pci, 0);
1066         /* initialised to "false" by kzalloc() */
1067         sdev->msi_enabled = true;
1068     }
1069 
1070     if (!sdev->msi_enabled) {
1071         dev_info(sdev->dev, "use legacy interrupt mode\n");
1072         /*
1073          * in IO-APIC mode, hda->irq and ipc_irq are using the same
1074          * irq number of pci->irq
1075          */
1076         sdev->ipc_irq = pci->irq;
1077     }
1078 
1079     dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
1080     ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler,
1081                    hda_dsp_interrupt_thread,
1082                    IRQF_SHARED, "AudioDSP", sdev);
1083     if (ret < 0) {
1084         dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
1085             sdev->ipc_irq);
1086         goto free_irq_vector;
1087     }
1088 
1089     pci_set_master(pci);
1090     synchronize_irq(pci->irq);
1091 
1092     /*
1093      * clear TCSEL to clear playback on some HD Audio
1094      * codecs. PCI TCSEL is defined in the Intel manuals.
1095      */
1096     snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
1097 
1098     /* init HDA capabilities */
1099     ret = hda_init_caps(sdev);
1100     if (ret < 0)
1101         goto free_ipc_irq;
1102 
1103     /* enable ppcap interrupt */
1104     hda_dsp_ctrl_ppcap_enable(sdev, true);
1105     hda_dsp_ctrl_ppcap_int_enable(sdev, true);
1106 
1107     /* set default mailbox offset for FW ready message */
1108     sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
1109 
1110     INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
1111 
1112     hdev->nhlt = intel_nhlt_init(sdev->dev);
1113 
1114     return 0;
1115 
1116 free_ipc_irq:
1117     free_irq(sdev->ipc_irq, sdev);
1118 free_irq_vector:
1119     if (sdev->msi_enabled)
1120         pci_free_irq_vectors(pci);
1121 free_streams:
1122     hda_dsp_stream_free(sdev);
1123 /* dsp_unmap: not currently used */
1124     iounmap(sdev->bar[HDA_DSP_BAR]);
1125 hdac_bus_unmap:
1126     platform_device_unregister(hdev->dmic_dev);
1127     iounmap(bus->remap_addr);
1128     hda_codec_i915_exit(sdev);
1129 err:
1130     return ret;
1131 }
1132 
1133 int hda_dsp_remove(struct snd_sof_dev *sdev)
1134 {
1135     struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
1136     const struct sof_intel_dsp_desc *chip = hda->desc;
1137     struct hdac_bus *bus = sof_to_bus(sdev);
1138     struct pci_dev *pci = to_pci_dev(sdev->dev);
1139     struct nhlt_acpi_table *nhlt = hda->nhlt;
1140 
1141     if (nhlt)
1142         intel_nhlt_free(nhlt);
1143 
1144     /* cancel any attempt for DSP D0I3 */
1145     cancel_delayed_work_sync(&hda->d0i3_work);
1146 
1147 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
1148     /* codec removal, invoke bus_device_remove */
1149     snd_hdac_ext_bus_device_remove(bus);
1150 #endif
1151 
1152     hda_sdw_exit(sdev);
1153 
1154     if (!IS_ERR_OR_NULL(hda->dmic_dev))
1155         platform_device_unregister(hda->dmic_dev);
1156 
1157     /* disable DSP IRQ */
1158     snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
1159                 SOF_HDA_PPCTL_PIE, 0);
1160 
1161     /* disable CIE and GIE interrupts */
1162     snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
1163                 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
1164 
1165     /* disable cores */
1166     if (chip)
1167         hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
1168 
1169     /* disable DSP */
1170     snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
1171                 SOF_HDA_PPCTL_GPROCEN, 0);
1172 
1173     free_irq(sdev->ipc_irq, sdev);
1174     if (sdev->msi_enabled)
1175         pci_free_irq_vectors(pci);
1176 
1177     hda_dsp_stream_free(sdev);
1178 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
1179     snd_hdac_link_free_all(bus);
1180 #endif
1181 
1182     iounmap(sdev->bar[HDA_DSP_BAR]);
1183     iounmap(bus->remap_addr);
1184 
1185 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
1186     snd_hdac_ext_bus_exit(bus);
1187 #endif
1188     hda_codec_i915_exit(sdev);
1189 
1190     return 0;
1191 }
1192 
1193 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
1194 static void hda_generic_machine_select(struct snd_sof_dev *sdev,
1195                        struct snd_soc_acpi_mach **mach)
1196 {
1197     struct hdac_bus *bus = sof_to_bus(sdev);
1198     struct snd_soc_acpi_mach_params *mach_params;
1199     struct snd_soc_acpi_mach *hda_mach;
1200     struct snd_sof_pdata *pdata = sdev->pdata;
1201     const char *tplg_filename;
1202     const char *idisp_str;
1203     int dmic_num = 0;
1204     int codec_num = 0;
1205     int ret;
1206     int i;
1207 
1208     /* codec detection */
1209     if (!bus->codec_mask) {
1210         dev_info(bus->dev, "no hda codecs found!\n");
1211     } else {
1212         dev_info(bus->dev, "hda codecs found, mask %lx\n",
1213              bus->codec_mask);
1214 
1215         for (i = 0; i < HDA_MAX_CODECS; i++) {
1216             if (bus->codec_mask & (1 << i))
1217                 codec_num++;
1218         }
1219 
1220         /*
1221          * If no machine driver is found, then:
1222          *
1223          * generic hda machine driver can handle:
1224          *  - one HDMI codec, and/or
1225          *  - one external HDAudio codec
1226          */
1227         if (!*mach && codec_num <= 2) {
1228             bool tplg_fixup;
1229 
1230             hda_mach = snd_soc_acpi_intel_hda_machines;
1231 
1232             dev_info(bus->dev, "using HDA machine driver %s now\n",
1233                  hda_mach->drv_name);
1234 
1235             if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask))
1236                 idisp_str = "-idisp";
1237             else
1238                 idisp_str = "";
1239 
1240             /* topology: use the info from hda_machines */
1241             if (pdata->tplg_filename) {
1242                 tplg_fixup = false;
1243                 tplg_filename = pdata->tplg_filename;
1244             } else {
1245                 tplg_fixup = true;
1246                 tplg_filename = hda_mach->sof_tplg_filename;
1247             }
1248             ret = dmic_detect_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num,
1249                              tplg_fixup);
1250             if (ret < 0)
1251                 return;
1252 
1253             hda_mach->mach_params.dmic_num = dmic_num;
1254             pdata->tplg_filename = tplg_filename;
1255 
1256             if (codec_num == 2) {
1257                 /*
1258                  * Prevent SoundWire links from starting when an external
1259                  * HDaudio codec is used
1260                  */
1261                 hda_mach->mach_params.link_mask = 0;
1262             }
1263 
1264             *mach = hda_mach;
1265         }
1266     }
1267 
1268     /* used by hda machine driver to create dai links */
1269     if (*mach) {
1270         mach_params = &(*mach)->mach_params;
1271         mach_params->codec_mask = bus->codec_mask;
1272         mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
1273     }
1274 }
1275 #else
1276 static void hda_generic_machine_select(struct snd_sof_dev *sdev,
1277                        struct snd_soc_acpi_mach **mach)
1278 {
1279 }
1280 #endif
1281 
1282 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
1283 
1284 #define SDW_CODEC_ADR_MASK(_adr) ((_adr) & (SDW_DISCO_LINK_ID_MASK | SDW_VERSION_MASK | \
1285                   SDW_MFG_ID_MASK | SDW_PART_ID_MASK))
1286 
1287 /* Check if all Slaves defined on the link can be found */
1288 static bool link_slaves_found(struct snd_sof_dev *sdev,
1289                   const struct snd_soc_acpi_link_adr *link,
1290                   struct sdw_intel_ctx *sdw)
1291 {
1292     struct hdac_bus *bus = sof_to_bus(sdev);
1293     struct sdw_intel_slave_id *ids = sdw->ids;
1294     int num_slaves = sdw->num_slaves;
1295     unsigned int part_id, link_id, unique_id, mfg_id, version;
1296     int i, j, k;
1297 
1298     for (i = 0; i < link->num_adr; i++) {
1299         u64 adr = link->adr_d[i].adr;
1300         int reported_part_count = 0;
1301 
1302         mfg_id = SDW_MFG_ID(adr);
1303         part_id = SDW_PART_ID(adr);
1304         link_id = SDW_DISCO_LINK_ID(adr);
1305         version = SDW_VERSION(adr);
1306 
1307         for (j = 0; j < num_slaves; j++) {
1308             /* find out how many identical parts were reported on that link */
1309             if (ids[j].link_id == link_id &&
1310                 ids[j].id.part_id == part_id &&
1311                 ids[j].id.mfg_id == mfg_id &&
1312                 ids[j].id.sdw_version == version)
1313                 reported_part_count++;
1314         }
1315 
1316         for (j = 0; j < num_slaves; j++) {
1317             int expected_part_count = 0;
1318 
1319             if (ids[j].link_id != link_id ||
1320                 ids[j].id.part_id != part_id ||
1321                 ids[j].id.mfg_id != mfg_id ||
1322                 ids[j].id.sdw_version != version)
1323                 continue;
1324 
1325             /* find out how many identical parts are expected */
1326             for (k = 0; k < link->num_adr; k++) {
1327                 u64 adr2 = link->adr_d[k].adr;
1328 
1329                 if (SDW_CODEC_ADR_MASK(adr2) == SDW_CODEC_ADR_MASK(adr))
1330                     expected_part_count++;
1331             }
1332 
1333             if (reported_part_count == expected_part_count) {
1334                 /*
1335                  * we have to check unique id
1336                  * if there is more than one
1337                  * Slave on the link
1338                  */
1339                 unique_id = SDW_UNIQUE_ID(adr);
1340                 if (reported_part_count == 1 ||
1341                     ids[j].id.unique_id == unique_id) {
1342                     dev_dbg(bus->dev, "found %x at link %d\n",
1343                         part_id, link_id);
1344                     break;
1345                 }
1346             } else {
1347                 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n",
1348                     part_id, reported_part_count, expected_part_count, link_id);
1349             }
1350         }
1351         if (j == num_slaves) {
1352             dev_dbg(bus->dev,
1353                 "Slave %x not found\n",
1354                 part_id);
1355             return false;
1356         }
1357     }
1358     return true;
1359 }
1360 
1361 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev)
1362 {
1363     struct snd_sof_pdata *pdata = sdev->pdata;
1364     const struct snd_soc_acpi_link_adr *link;
1365     struct snd_soc_acpi_mach *mach;
1366     struct sof_intel_hda_dev *hdev;
1367     u32 link_mask;
1368     int i;
1369 
1370     hdev = pdata->hw_pdata;
1371     link_mask = hdev->info.link_mask;
1372 
1373     /*
1374      * Select SoundWire machine driver if needed using the
1375      * alternate tables. This case deals with SoundWire-only
1376      * machines, for mixed cases with I2C/I2S the detection relies
1377      * on the HID list.
1378      */
1379     if (link_mask) {
1380         for (mach = pdata->desc->alt_machines;
1381              mach && mach->link_mask; mach++) {
1382             /*
1383              * On some platforms such as Up Extreme all links
1384              * are enabled but only one link can be used by
1385              * external codec. Instead of exact match of two masks,
1386              * first check whether link_mask of mach is subset of
1387              * link_mask supported by hw and then go on searching
1388              * link_adr
1389              */
1390             if (~link_mask & mach->link_mask)
1391                 continue;
1392 
1393             /* No need to match adr if there is no links defined */
1394             if (!mach->links)
1395                 break;
1396 
1397             link = mach->links;
1398             for (i = 0; i < hdev->info.count && link->num_adr;
1399                  i++, link++) {
1400                 /*
1401                  * Try next machine if any expected Slaves
1402                  * are not found on this link.
1403                  */
1404                 if (!link_slaves_found(sdev, link, hdev->sdw))
1405                     break;
1406             }
1407             /* Found if all Slaves are checked */
1408             if (i == hdev->info.count || !link->num_adr)
1409                 break;
1410         }
1411         if (mach && mach->link_mask) {
1412             int dmic_num = 0;
1413             bool tplg_fixup;
1414             const char *tplg_filename;
1415 
1416             mach->mach_params.links = mach->links;
1417             mach->mach_params.link_mask = mach->link_mask;
1418             mach->mach_params.platform = dev_name(sdev->dev);
1419 
1420             if (pdata->tplg_filename) {
1421                 tplg_fixup = false;
1422             } else {
1423                 tplg_fixup = true;
1424                 tplg_filename = mach->sof_tplg_filename;
1425             }
1426 
1427             /*
1428              * DMICs use up to 4 pins and are typically pin-muxed with SoundWire
1429              * link 2 and 3, or link 1 and 2, thus we only try to enable dmics
1430              * if all conditions are true:
1431              * a) 2 or fewer links are used by SoundWire
1432              * b) the NHLT table reports the presence of microphones
1433              */
1434             if (hweight_long(mach->link_mask) <= 2) {
1435                 int ret;
1436 
1437                 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, "",
1438                                  &dmic_num, tplg_fixup);
1439                 if (ret < 0)
1440                     return NULL;
1441             }
1442             if (tplg_fixup)
1443                 pdata->tplg_filename = tplg_filename;
1444             mach->mach_params.dmic_num = dmic_num;
1445 
1446             dev_dbg(sdev->dev,
1447                 "SoundWire machine driver %s topology %s\n",
1448                 mach->drv_name,
1449                 pdata->tplg_filename);
1450 
1451             return mach;
1452         }
1453 
1454         dev_info(sdev->dev, "No SoundWire machine driver found\n");
1455     }
1456 
1457     return NULL;
1458 }
1459 #else
1460 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev)
1461 {
1462     return NULL;
1463 }
1464 #endif
1465 
1466 void hda_set_mach_params(struct snd_soc_acpi_mach *mach,
1467              struct snd_sof_dev *sdev)
1468 {
1469     struct snd_sof_pdata *pdata = sdev->pdata;
1470     const struct sof_dev_desc *desc = pdata->desc;
1471     struct snd_soc_acpi_mach_params *mach_params;
1472 
1473     mach_params = &mach->mach_params;
1474     mach_params->platform = dev_name(sdev->dev);
1475     mach_params->num_dai_drivers = desc->ops->num_drv;
1476     mach_params->dai_drivers = desc->ops->drv;
1477 }
1478 
1479 struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev)
1480 {
1481     struct snd_sof_pdata *sof_pdata = sdev->pdata;
1482     const struct sof_dev_desc *desc = sof_pdata->desc;
1483     struct snd_soc_acpi_mach *mach;
1484     const char *tplg_filename;
1485 
1486     mach = snd_soc_acpi_find_machine(desc->machines);
1487     if (mach) {
1488         bool add_extension = false;
1489         bool tplg_fixup = false;
1490 
1491         /*
1492          * If tplg file name is overridden, use it instead of
1493          * the one set in mach table
1494          */
1495         if (!sof_pdata->tplg_filename) {
1496             sof_pdata->tplg_filename = mach->sof_tplg_filename;
1497             tplg_fixup = true;
1498         }
1499 
1500         /* report to machine driver if any DMICs are found */
1501         mach->mach_params.dmic_num = check_dmic_num(sdev);
1502 
1503         if (tplg_fixup &&
1504             mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER &&
1505             mach->mach_params.dmic_num) {
1506             tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
1507                                "%s%s%d%s",
1508                                sof_pdata->tplg_filename,
1509                                "-dmic",
1510                                mach->mach_params.dmic_num,
1511                                "ch");
1512             if (!tplg_filename)
1513                 return NULL;
1514 
1515             sof_pdata->tplg_filename = tplg_filename;
1516             add_extension = true;
1517         }
1518 
1519         if (mach->link_mask) {
1520             mach->mach_params.links = mach->links;
1521             mach->mach_params.link_mask = mach->link_mask;
1522         }
1523 
1524         /* report SSP link mask to machine driver */
1525         mach->mach_params.i2s_link_mask = check_nhlt_ssp_mask(sdev);
1526 
1527         if (tplg_fixup &&
1528             mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER &&
1529             mach->mach_params.i2s_link_mask) {
1530             const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata);
1531             int ssp_num;
1532 
1533             if (hweight_long(mach->mach_params.i2s_link_mask) > 1 &&
1534                 !(mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_MSB))
1535                 dev_warn(sdev->dev, "More than one SSP exposed by NHLT, choosing MSB\n");
1536 
1537             /* fls returns 1-based results, SSPs indices are 0-based */
1538             ssp_num = fls(mach->mach_params.i2s_link_mask) - 1;
1539 
1540             if (ssp_num >= chip->ssp_count) {
1541                 dev_err(sdev->dev, "Invalid SSP %d, max on this platform is %d\n",
1542                     ssp_num, chip->ssp_count);
1543                 return NULL;
1544             }
1545 
1546             tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
1547                                "%s%s%d",
1548                                sof_pdata->tplg_filename,
1549                                "-ssp",
1550                                ssp_num);
1551             if (!tplg_filename)
1552                 return NULL;
1553 
1554             sof_pdata->tplg_filename = tplg_filename;
1555             add_extension = true;
1556         }
1557 
1558         if (tplg_fixup && add_extension) {
1559             tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
1560                                "%s%s",
1561                                sof_pdata->tplg_filename,
1562                                ".tplg");
1563             if (!tplg_filename)
1564                 return NULL;
1565 
1566             sof_pdata->tplg_filename = tplg_filename;
1567         }
1568     }
1569 
1570     /*
1571      * If I2S fails, try SoundWire
1572      */
1573     if (!mach)
1574         mach = hda_sdw_machine_select(sdev);
1575 
1576     /*
1577      * Choose HDA generic machine driver if mach is NULL.
1578      * Otherwise, set certain mach params.
1579      */
1580     hda_generic_machine_select(sdev, &mach);
1581     if (!mach)
1582         dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");
1583 
1584     return mach;
1585 }
1586 
1587 int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1588 {
1589     int ret;
1590 
1591     ret = snd_intel_dsp_driver_probe(pci);
1592     if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) {
1593         dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n");
1594         return -ENODEV;
1595     }
1596 
1597     return sof_pci_probe(pci, pci_id);
1598 }
1599 EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON);
1600 
1601 int hda_register_clients(struct snd_sof_dev *sdev)
1602 {
1603     return hda_probes_register(sdev);
1604 }
1605 
1606 void hda_unregister_clients(struct snd_sof_dev *sdev)
1607 {
1608     hda_probes_unregister(sdev);
1609 }
1610 
1611 MODULE_LICENSE("Dual BSD/GPL");
1612 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
1613 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC);
1614 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
1615 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
1616 MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI);
1617 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT);
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