0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018 #include <sound/sof/ext_manifest4.h>
0019 #include "../ipc4-priv.h"
0020 #include "../sof-priv.h"
0021 #include "hda.h"
0022 #include "../sof-audio.h"
0023
0024 static const struct snd_sof_debugfs_map apl_dsp_debugfs[] = {
0025 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
0026 {"pp", HDA_DSP_PP_BAR, 0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS},
0027 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
0028 };
0029
0030
0031 struct snd_sof_dsp_ops sof_apl_ops;
0032 EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
0033
0034 int sof_apl_ops_init(struct snd_sof_dev *sdev)
0035 {
0036
0037 memcpy(&sof_apl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
0038
0039
0040 sof_apl_ops.shutdown = hda_dsp_shutdown;
0041
0042 if (sdev->pdata->ipc_type == SOF_IPC) {
0043
0044 sof_apl_ops.irq_thread = hda_dsp_ipc_irq_thread;
0045
0046
0047 sof_apl_ops.send_msg = hda_dsp_ipc_send_msg;
0048 }
0049
0050 if (sdev->pdata->ipc_type == SOF_INTEL_IPC4) {
0051 struct sof_ipc4_fw_data *ipc4_data;
0052
0053 sdev->private = devm_kzalloc(sdev->dev, sizeof(*ipc4_data), GFP_KERNEL);
0054 if (!sdev->private)
0055 return -ENOMEM;
0056
0057 ipc4_data = sdev->private;
0058 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET;
0059
0060
0061 sof_apl_ops.irq_thread = hda_dsp_ipc4_irq_thread;
0062
0063
0064 sof_apl_ops.send_msg = hda_dsp_ipc4_send_msg;
0065 }
0066
0067
0068 hda_set_dai_drv_ops(sdev, &sof_apl_ops);
0069
0070
0071 sof_apl_ops.debug_map = apl_dsp_debugfs;
0072 sof_apl_ops.debug_map_count = ARRAY_SIZE(apl_dsp_debugfs);
0073 sof_apl_ops.ipc_dump = hda_ipc_dump;
0074
0075
0076 sof_apl_ops.run = hda_dsp_cl_boot_firmware;
0077
0078
0079 sof_apl_ops.post_fw_run = hda_dsp_post_fw_run;
0080
0081
0082 sof_apl_ops.core_get = hda_dsp_core_get;
0083
0084 return 0;
0085 };
0086 EXPORT_SYMBOL_NS(sof_apl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
0087
0088 const struct sof_intel_dsp_desc apl_chip_info = {
0089
0090 .cores_num = 2,
0091 .init_core_mask = 1,
0092 .host_managed_cores_mask = GENMASK(1, 0),
0093 .ipc_req = HDA_DSP_REG_HIPCI,
0094 .ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY,
0095 .ipc_ack = HDA_DSP_REG_HIPCIE,
0096 .ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE,
0097 .ipc_ctl = HDA_DSP_REG_HIPCCTL,
0098 .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
0099 .rom_init_timeout = 150,
0100 .ssp_count = APL_SSP_COUNT,
0101 .ssp_base_offset = APL_SSP_BASE_OFFSET,
0102 .quirks = SOF_INTEL_PROCEN_FMT_QUIRK,
0103 .check_ipc_irq = hda_dsp_check_ipc_irq,
0104 .cl_init = cl_dsp_init,
0105 .hw_ip_version = SOF_INTEL_CAVS_1_5_PLUS,
0106 };
0107 EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);