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0001 /* SPDX-License-Identifier: GPL-2.0+ */ 0002 /* 0003 * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver 0004 * 0005 * Copyright (c) 2007 Simtec Electronics 0006 * http://armlinux.simtec.co.uk/ 0007 * Ben Dooks <ben@simtec.co.uk> 0008 */ 0009 0010 /* This code is the core support for the I2S block found in a number of 0011 * Samsung SoC devices which is unofficially named I2S-V2. Currently the 0012 * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S 0013 * channels via configurable GPIO. 0014 */ 0015 0016 #ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H 0017 #define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__ 0018 0019 #define S3C_I2SV2_DIV_BCLK (1) 0020 #define S3C_I2SV2_DIV_RCLK (2) 0021 #define S3C_I2SV2_DIV_PRESCALER (3) 0022 0023 #define S3C_I2SV2_CLKSRC_PCLK 0 0024 #define S3C_I2SV2_CLKSRC_AUDIOBUS 1 0025 #define S3C_I2SV2_CLKSRC_CDCLK 2 0026 0027 /* Set this flag for I2S controllers that have the bit IISMOD[12] 0028 * bridge/break RCLK signal and external Xi2sCDCLK pin. 0029 */ 0030 #define S3C_FEATURE_CDCLKCON (1 << 0) 0031 0032 /** 0033 * struct s3c_i2sv2_info - S3C I2S-V2 information 0034 * @dev: The parent device passed to use from the probe. 0035 * @regs: The pointer to the device registe block. 0036 * @feature: Set of bit-flags indicating features of the controller. 0037 * @master: True if the I2S core is the I2S bit clock master. 0038 * @dma_playback: DMA information for playback channel. 0039 * @dma_capture: DMA information for capture channel. 0040 * @suspend_iismod: PM save for the IISMOD register. 0041 * @suspend_iiscon: PM save for the IISCON register. 0042 * @suspend_iispsr: PM save for the IISPSR register. 0043 * 0044 * This is the private codec state for the hardware associated with an 0045 * I2S channel such as the register mappings and clock sources. 0046 */ 0047 struct s3c_i2sv2_info { 0048 struct device *dev; 0049 void __iomem *regs; 0050 0051 u32 feature; 0052 0053 struct clk *iis_pclk; 0054 struct clk *iis_cclk; 0055 0056 unsigned char master; 0057 0058 struct snd_dmaengine_dai_dma_data *dma_playback; 0059 struct snd_dmaengine_dai_dma_data *dma_capture; 0060 0061 u32 suspend_iismod; 0062 u32 suspend_iiscon; 0063 u32 suspend_iispsr; 0064 0065 unsigned long base; 0066 }; 0067 0068 extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai); 0069 0070 struct s3c_i2sv2_rate_calc { 0071 unsigned int clk_div; /* for prescaler */ 0072 unsigned int fs_div; /* for root frame clock */ 0073 }; 0074 0075 extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info, 0076 unsigned int *fstab, 0077 unsigned int rate, struct clk *clk); 0078 0079 /** 0080 * s3c_i2sv2_probe - probe for i2s device helper 0081 * @dai: The ASoC DAI structure supplied to the original probe. 0082 * @i2s: Our local i2s structure to fill in. 0083 * @base: The base address for the registers. 0084 */ 0085 extern int s3c_i2sv2_probe(struct snd_soc_dai *dai, 0086 struct s3c_i2sv2_info *i2s); 0087 0088 /** 0089 * s3c_i2sv2_cleanup - cleanup resources allocated in s3c_i2sv2_probe 0090 * @dai: The ASoC DAI structure supplied to the original probe. 0091 * @i2s: Our local i2s structure to fill in. 0092 */ 0093 extern void s3c_i2sv2_cleanup(struct snd_soc_dai *dai, 0094 struct s3c_i2sv2_info *i2s); 0095 /** 0096 * s3c_i2sv2_register_component - register component and dai with soc core 0097 * @dev: DAI device 0098 * @id: DAI ID 0099 * @drv: The driver structure to register 0100 * 0101 * Fill in any missing fields and then register the given dai with the 0102 * soc core. 0103 */ 0104 extern int s3c_i2sv2_register_component(struct device *dev, int id, 0105 const struct snd_soc_component_driver *cmp_drv, 0106 struct snd_soc_dai_driver *dai_drv); 0107 0108 #endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */
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