Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // ALSA SoC Audio Layer - Samsung I2S Controller driver
0004 //
0005 // Copyright (c) 2010 Samsung Electronics Co. Ltd.
0006 //  Jaswinder Singh <jassisinghbrar@gmail.com>
0007 
0008 #include <dt-bindings/sound/samsung-i2s.h>
0009 #include <linux/delay.h>
0010 #include <linux/slab.h>
0011 #include <linux/clk.h>
0012 #include <linux/clk-provider.h>
0013 #include <linux/io.h>
0014 #include <linux/module.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/of_gpio.h>
0018 #include <linux/pm_runtime.h>
0019 
0020 #include <sound/soc.h>
0021 #include <sound/pcm_params.h>
0022 
0023 #include <linux/platform_data/asoc-s3c.h>
0024 
0025 #include "dma.h"
0026 #include "idma.h"
0027 #include "i2s.h"
0028 #include "i2s-regs.h"
0029 
0030 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
0031 
0032 #define SAMSUNG_I2S_ID_PRIMARY      1
0033 #define SAMSUNG_I2S_ID_SECONDARY    2
0034 
0035 struct samsung_i2s_variant_regs {
0036     unsigned int    bfs_off;
0037     unsigned int    rfs_off;
0038     unsigned int    sdf_off;
0039     unsigned int    txr_off;
0040     unsigned int    rclksrc_off;
0041     unsigned int    mss_off;
0042     unsigned int    cdclkcon_off;
0043     unsigned int    lrp_off;
0044     unsigned int    bfs_mask;
0045     unsigned int    rfs_mask;
0046     unsigned int    ftx0cnt_off;
0047 };
0048 
0049 struct samsung_i2s_dai_data {
0050     u32 quirks;
0051     unsigned int pcm_rates;
0052     const struct samsung_i2s_variant_regs *i2s_variant_regs;
0053 };
0054 
0055 struct i2s_dai {
0056     /* Platform device for this DAI */
0057     struct platform_device *pdev;
0058 
0059     /* Frame clock */
0060     unsigned frmclk;
0061     /*
0062      * Specifically requested RCLK, BCLK by machine driver.
0063      * 0 indicates CPU driver is free to choose any value.
0064      */
0065     unsigned rfs, bfs;
0066     /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
0067     struct i2s_dai *pri_dai;
0068     /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
0069     struct i2s_dai *sec_dai;
0070 
0071 #define DAI_OPENED  (1 << 0) /* DAI is opened */
0072 #define DAI_MANAGER (1 << 1) /* DAI is the manager */
0073     unsigned mode;
0074 
0075     /* Driver for this DAI */
0076     struct snd_soc_dai_driver *drv;
0077 
0078     /* DMA parameters */
0079     struct snd_dmaengine_dai_dma_data dma_playback;
0080     struct snd_dmaengine_dai_dma_data dma_capture;
0081     struct snd_dmaengine_dai_dma_data idma_playback;
0082     dma_filter_fn filter;
0083 
0084     struct samsung_i2s_priv *priv;
0085 };
0086 
0087 struct samsung_i2s_priv {
0088     struct platform_device *pdev;
0089     struct platform_device *pdev_sec;
0090 
0091     /* Lock for cross interface checks */
0092     spinlock_t pcm_lock;
0093 
0094     /* CPU DAIs and their corresponding drivers */
0095     struct i2s_dai *dai;
0096     struct snd_soc_dai_driver *dai_drv;
0097     int num_dais;
0098 
0099     /* The I2S controller's core clock */
0100     struct clk *clk;
0101 
0102     /* Clock for generating I2S signals */
0103     struct clk *op_clk;
0104 
0105     /* Rate of RCLK source clock */
0106     unsigned long rclk_srcrate;
0107 
0108     /* Cache of selected I2S registers for system suspend */
0109     u32 suspend_i2smod;
0110     u32 suspend_i2scon;
0111     u32 suspend_i2spsr;
0112 
0113     const struct samsung_i2s_variant_regs *variant_regs;
0114     u32 quirks;
0115 
0116     /* The clock provider's data */
0117     struct clk *clk_table[3];
0118     struct clk_onecell_data clk_data;
0119 
0120     /* Spinlock protecting member fields below */
0121     spinlock_t lock;
0122 
0123     /* Memory mapped SFR region */
0124     void __iomem *addr;
0125 
0126     /* A flag indicating the I2S slave mode operation */
0127     bool slave_mode;
0128 };
0129 
0130 /* Returns true if this is the 'overlay' stereo DAI */
0131 static inline bool is_secondary(struct i2s_dai *i2s)
0132 {
0133     return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY;
0134 }
0135 
0136 /* If this interface of the controller is transmitting data */
0137 static inline bool tx_active(struct i2s_dai *i2s)
0138 {
0139     u32 active;
0140 
0141     if (!i2s)
0142         return false;
0143 
0144     active = readl(i2s->priv->addr + I2SCON);
0145 
0146     if (is_secondary(i2s))
0147         active &= CON_TXSDMA_ACTIVE;
0148     else
0149         active &= CON_TXDMA_ACTIVE;
0150 
0151     return active ? true : false;
0152 }
0153 
0154 /* Return pointer to the other DAI */
0155 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
0156 {
0157     return i2s->pri_dai ? : i2s->sec_dai;
0158 }
0159 
0160 /* If the other interface of the controller is transmitting data */
0161 static inline bool other_tx_active(struct i2s_dai *i2s)
0162 {
0163     struct i2s_dai *other = get_other_dai(i2s);
0164 
0165     return tx_active(other);
0166 }
0167 
0168 /* If any interface of the controller is transmitting data */
0169 static inline bool any_tx_active(struct i2s_dai *i2s)
0170 {
0171     return tx_active(i2s) || other_tx_active(i2s);
0172 }
0173 
0174 /* If this interface of the controller is receiving data */
0175 static inline bool rx_active(struct i2s_dai *i2s)
0176 {
0177     u32 active;
0178 
0179     if (!i2s)
0180         return false;
0181 
0182     active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE;
0183 
0184     return active ? true : false;
0185 }
0186 
0187 /* If the other interface of the controller is receiving data */
0188 static inline bool other_rx_active(struct i2s_dai *i2s)
0189 {
0190     struct i2s_dai *other = get_other_dai(i2s);
0191 
0192     return rx_active(other);
0193 }
0194 
0195 /* If any interface of the controller is receiving data */
0196 static inline bool any_rx_active(struct i2s_dai *i2s)
0197 {
0198     return rx_active(i2s) || other_rx_active(i2s);
0199 }
0200 
0201 /* If the other DAI is transmitting or receiving data */
0202 static inline bool other_active(struct i2s_dai *i2s)
0203 {
0204     return other_rx_active(i2s) || other_tx_active(i2s);
0205 }
0206 
0207 /* If this DAI is transmitting or receiving data */
0208 static inline bool this_active(struct i2s_dai *i2s)
0209 {
0210     return tx_active(i2s) || rx_active(i2s);
0211 }
0212 
0213 /* If the controller is active anyway */
0214 static inline bool any_active(struct i2s_dai *i2s)
0215 {
0216     return this_active(i2s) || other_active(i2s);
0217 }
0218 
0219 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
0220 {
0221     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0222 
0223     return &priv->dai[dai->id - 1];
0224 }
0225 
0226 static inline bool is_opened(struct i2s_dai *i2s)
0227 {
0228     if (i2s && (i2s->mode & DAI_OPENED))
0229         return true;
0230     else
0231         return false;
0232 }
0233 
0234 static inline bool is_manager(struct i2s_dai *i2s)
0235 {
0236     if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
0237         return true;
0238     else
0239         return false;
0240 }
0241 
0242 /* Read RCLK of I2S (in multiples of LRCLK) */
0243 static inline unsigned get_rfs(struct i2s_dai *i2s)
0244 {
0245     struct samsung_i2s_priv *priv = i2s->priv;
0246     u32 rfs;
0247 
0248     rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off;
0249     rfs &= priv->variant_regs->rfs_mask;
0250 
0251     switch (rfs) {
0252     case 7: return 192;
0253     case 6: return 96;
0254     case 5: return 128;
0255     case 4: return 64;
0256     case 3: return 768;
0257     case 2: return 384;
0258     case 1: return 512;
0259     default: return 256;
0260     }
0261 }
0262 
0263 /* Write RCLK of I2S (in multiples of LRCLK) */
0264 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
0265 {
0266     struct samsung_i2s_priv *priv = i2s->priv;
0267     u32 mod = readl(priv->addr + I2SMOD);
0268     int rfs_shift = priv->variant_regs->rfs_off;
0269 
0270     mod &= ~(priv->variant_regs->rfs_mask << rfs_shift);
0271 
0272     switch (rfs) {
0273     case 192:
0274         mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
0275         break;
0276     case 96:
0277         mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
0278         break;
0279     case 128:
0280         mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
0281         break;
0282     case 64:
0283         mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
0284         break;
0285     case 768:
0286         mod |= (MOD_RCLK_768FS << rfs_shift);
0287         break;
0288     case 512:
0289         mod |= (MOD_RCLK_512FS << rfs_shift);
0290         break;
0291     case 384:
0292         mod |= (MOD_RCLK_384FS << rfs_shift);
0293         break;
0294     default:
0295         mod |= (MOD_RCLK_256FS << rfs_shift);
0296         break;
0297     }
0298 
0299     writel(mod, priv->addr + I2SMOD);
0300 }
0301 
0302 /* Read bit-clock of I2S (in multiples of LRCLK) */
0303 static inline unsigned get_bfs(struct i2s_dai *i2s)
0304 {
0305     struct samsung_i2s_priv *priv = i2s->priv;
0306     u32 bfs;
0307 
0308     bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off;
0309     bfs &= priv->variant_regs->bfs_mask;
0310 
0311     switch (bfs) {
0312     case 8: return 256;
0313     case 7: return 192;
0314     case 6: return 128;
0315     case 5: return 96;
0316     case 4: return 64;
0317     case 3: return 24;
0318     case 2: return 16;
0319     case 1: return 48;
0320     default: return 32;
0321     }
0322 }
0323 
0324 /* Write bit-clock of I2S (in multiples of LRCLK) */
0325 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
0326 {
0327     struct samsung_i2s_priv *priv = i2s->priv;
0328     u32 mod = readl(priv->addr + I2SMOD);
0329     int tdm = priv->quirks & QUIRK_SUPPORTS_TDM;
0330     int bfs_shift = priv->variant_regs->bfs_off;
0331 
0332     /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
0333     if (!tdm && bfs > 48) {
0334         dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
0335         return;
0336     }
0337 
0338     mod &= ~(priv->variant_regs->bfs_mask << bfs_shift);
0339 
0340     switch (bfs) {
0341     case 48:
0342         mod |= (MOD_BCLK_48FS << bfs_shift);
0343         break;
0344     case 32:
0345         mod |= (MOD_BCLK_32FS << bfs_shift);
0346         break;
0347     case 24:
0348         mod |= (MOD_BCLK_24FS << bfs_shift);
0349         break;
0350     case 16:
0351         mod |= (MOD_BCLK_16FS << bfs_shift);
0352         break;
0353     case 64:
0354         mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
0355         break;
0356     case 96:
0357         mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
0358         break;
0359     case 128:
0360         mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
0361         break;
0362     case 192:
0363         mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
0364         break;
0365     case 256:
0366         mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
0367         break;
0368     default:
0369         dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
0370         return;
0371     }
0372 
0373     writel(mod, priv->addr + I2SMOD);
0374 }
0375 
0376 /* Sample size */
0377 static inline int get_blc(struct i2s_dai *i2s)
0378 {
0379     int blc = readl(i2s->priv->addr + I2SMOD);
0380 
0381     blc = (blc >> 13) & 0x3;
0382 
0383     switch (blc) {
0384     case 2: return 24;
0385     case 1: return 8;
0386     default: return 16;
0387     }
0388 }
0389 
0390 /* TX channel control */
0391 static void i2s_txctrl(struct i2s_dai *i2s, int on)
0392 {
0393     struct samsung_i2s_priv *priv = i2s->priv;
0394     void __iomem *addr = priv->addr;
0395     int txr_off = priv->variant_regs->txr_off;
0396     u32 con = readl(addr + I2SCON);
0397     u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
0398 
0399     if (on) {
0400         con |= CON_ACTIVE;
0401         con &= ~CON_TXCH_PAUSE;
0402 
0403         if (is_secondary(i2s)) {
0404             con |= CON_TXSDMA_ACTIVE;
0405             con &= ~CON_TXSDMA_PAUSE;
0406         } else {
0407             con |= CON_TXDMA_ACTIVE;
0408             con &= ~CON_TXDMA_PAUSE;
0409         }
0410 
0411         if (any_rx_active(i2s))
0412             mod |= 2 << txr_off;
0413         else
0414             mod |= 0 << txr_off;
0415     } else {
0416         if (is_secondary(i2s)) {
0417             con |=  CON_TXSDMA_PAUSE;
0418             con &= ~CON_TXSDMA_ACTIVE;
0419         } else {
0420             con |=  CON_TXDMA_PAUSE;
0421             con &= ~CON_TXDMA_ACTIVE;
0422         }
0423 
0424         if (other_tx_active(i2s)) {
0425             writel(con, addr + I2SCON);
0426             return;
0427         }
0428 
0429         con |=  CON_TXCH_PAUSE;
0430 
0431         if (any_rx_active(i2s))
0432             mod |= 1 << txr_off;
0433         else
0434             con &= ~CON_ACTIVE;
0435     }
0436 
0437     writel(mod, addr + I2SMOD);
0438     writel(con, addr + I2SCON);
0439 }
0440 
0441 /* RX Channel Control */
0442 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
0443 {
0444     struct samsung_i2s_priv *priv = i2s->priv;
0445     void __iomem *addr = priv->addr;
0446     int txr_off = priv->variant_regs->txr_off;
0447     u32 con = readl(addr + I2SCON);
0448     u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
0449 
0450     if (on) {
0451         con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
0452         con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
0453 
0454         if (any_tx_active(i2s))
0455             mod |= 2 << txr_off;
0456         else
0457             mod |= 1 << txr_off;
0458     } else {
0459         con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
0460         con &= ~CON_RXDMA_ACTIVE;
0461 
0462         if (any_tx_active(i2s))
0463             mod |= 0 << txr_off;
0464         else
0465             con &= ~CON_ACTIVE;
0466     }
0467 
0468     writel(mod, addr + I2SMOD);
0469     writel(con, addr + I2SCON);
0470 }
0471 
0472 /* Flush FIFO of an interface */
0473 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
0474 {
0475     void __iomem *fic;
0476     u32 val;
0477 
0478     if (!i2s)
0479         return;
0480 
0481     if (is_secondary(i2s))
0482         fic = i2s->priv->addr + I2SFICS;
0483     else
0484         fic = i2s->priv->addr + I2SFIC;
0485 
0486     /* Flush the FIFO */
0487     writel(readl(fic) | flush, fic);
0488 
0489     /* Be patient */
0490     val = msecs_to_loops(1) / 1000; /* 1 usec */
0491     while (--val)
0492         cpu_relax();
0493 
0494     writel(readl(fic) & ~flush, fic);
0495 }
0496 
0497 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs,
0498               int dir)
0499 {
0500     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0501     struct i2s_dai *i2s = to_info(dai);
0502     struct i2s_dai *other = get_other_dai(i2s);
0503     const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs;
0504     unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
0505     unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
0506     u32 mod, mask, val = 0;
0507     unsigned long flags;
0508     int ret = 0;
0509 
0510     pm_runtime_get_sync(dai->dev);
0511 
0512     spin_lock_irqsave(&priv->lock, flags);
0513     mod = readl(priv->addr + I2SMOD);
0514     spin_unlock_irqrestore(&priv->lock, flags);
0515 
0516     switch (clk_id) {
0517     case SAMSUNG_I2S_OPCLK:
0518         mask = MOD_OPCLK_MASK;
0519         val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
0520         break;
0521     case SAMSUNG_I2S_CDCLK:
0522         mask = 1 << i2s_regs->cdclkcon_off;
0523         /* Shouldn't matter in GATING(CLOCK_IN) mode */
0524         if (dir == SND_SOC_CLOCK_IN)
0525             rfs = 0;
0526 
0527         if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
0528                 (any_active(i2s) &&
0529                 (((dir == SND_SOC_CLOCK_IN)
0530                     && !(mod & cdcon_mask)) ||
0531                 ((dir == SND_SOC_CLOCK_OUT)
0532                     && (mod & cdcon_mask))))) {
0533             dev_err(&i2s->pdev->dev,
0534                 "%s:%d Other DAI busy\n", __func__, __LINE__);
0535             ret = -EAGAIN;
0536             goto err;
0537         }
0538 
0539         if (dir == SND_SOC_CLOCK_IN)
0540             val = 1 << i2s_regs->cdclkcon_off;
0541 
0542         i2s->rfs = rfs;
0543         break;
0544 
0545     case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
0546     case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
0547         mask = 1 << i2s_regs->rclksrc_off;
0548 
0549         if ((priv->quirks & QUIRK_NO_MUXPSR)
0550                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
0551             clk_id = 0;
0552         else
0553             clk_id = 1;
0554 
0555         if (!any_active(i2s)) {
0556             if (priv->op_clk && !IS_ERR(priv->op_clk)) {
0557                 if ((clk_id && !(mod & rsrc_mask)) ||
0558                     (!clk_id && (mod & rsrc_mask))) {
0559                     clk_disable_unprepare(priv->op_clk);
0560                     clk_put(priv->op_clk);
0561                 } else {
0562                     priv->rclk_srcrate =
0563                         clk_get_rate(priv->op_clk);
0564                     goto done;
0565                 }
0566             }
0567 
0568             if (clk_id)
0569                 priv->op_clk = clk_get(&i2s->pdev->dev,
0570                         "i2s_opclk1");
0571             else
0572                 priv->op_clk = clk_get(&i2s->pdev->dev,
0573                         "i2s_opclk0");
0574 
0575             if (WARN_ON(IS_ERR(priv->op_clk))) {
0576                 ret = PTR_ERR(priv->op_clk);
0577                 priv->op_clk = NULL;
0578                 goto err;
0579             }
0580 
0581             ret = clk_prepare_enable(priv->op_clk);
0582             if (ret) {
0583                 clk_put(priv->op_clk);
0584                 priv->op_clk = NULL;
0585                 goto err;
0586             }
0587             priv->rclk_srcrate = clk_get_rate(priv->op_clk);
0588 
0589         } else if ((!clk_id && (mod & rsrc_mask))
0590                 || (clk_id && !(mod & rsrc_mask))) {
0591             dev_err(&i2s->pdev->dev,
0592                 "%s:%d Other DAI busy\n", __func__, __LINE__);
0593             ret = -EAGAIN;
0594             goto err;
0595         } else {
0596             /* Call can't be on the active DAI */
0597             goto done;
0598         }
0599 
0600         if (clk_id == 1)
0601             val = 1 << i2s_regs->rclksrc_off;
0602         break;
0603     default:
0604         dev_err(&i2s->pdev->dev, "We don't serve that!\n");
0605         ret = -EINVAL;
0606         goto err;
0607     }
0608 
0609     spin_lock_irqsave(&priv->lock, flags);
0610     mod = readl(priv->addr + I2SMOD);
0611     mod = (mod & ~mask) | val;
0612     writel(mod, priv->addr + I2SMOD);
0613     spin_unlock_irqrestore(&priv->lock, flags);
0614 done:
0615     pm_runtime_put(dai->dev);
0616 
0617     return 0;
0618 err:
0619     pm_runtime_put(dai->dev);
0620     return ret;
0621 }
0622 
0623 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
0624 {
0625     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0626     struct i2s_dai *i2s = to_info(dai);
0627     int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
0628     u32 mod, tmp = 0;
0629     unsigned long flags;
0630 
0631     lrp_shift = priv->variant_regs->lrp_off;
0632     sdf_shift = priv->variant_regs->sdf_off;
0633     mod_slave = 1 << priv->variant_regs->mss_off;
0634 
0635     sdf_mask = MOD_SDF_MASK << sdf_shift;
0636     lrp_rlow = MOD_LR_RLOW << lrp_shift;
0637 
0638     /* Format is priority */
0639     switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0640     case SND_SOC_DAIFMT_RIGHT_J:
0641         tmp |= lrp_rlow;
0642         tmp |= (MOD_SDF_MSB << sdf_shift);
0643         break;
0644     case SND_SOC_DAIFMT_LEFT_J:
0645         tmp |= lrp_rlow;
0646         tmp |= (MOD_SDF_LSB << sdf_shift);
0647         break;
0648     case SND_SOC_DAIFMT_I2S:
0649         tmp |= (MOD_SDF_IIS << sdf_shift);
0650         break;
0651     default:
0652         dev_err(&i2s->pdev->dev, "Format not supported\n");
0653         return -EINVAL;
0654     }
0655 
0656     /*
0657      * INV flag is relative to the FORMAT flag - if set it simply
0658      * flips the polarity specified by the Standard
0659      */
0660     switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
0661     case SND_SOC_DAIFMT_NB_NF:
0662         break;
0663     case SND_SOC_DAIFMT_NB_IF:
0664         if (tmp & lrp_rlow)
0665             tmp &= ~lrp_rlow;
0666         else
0667             tmp |= lrp_rlow;
0668         break;
0669     default:
0670         dev_err(&i2s->pdev->dev, "Polarity not supported\n");
0671         return -EINVAL;
0672     }
0673 
0674     switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0675     case SND_SOC_DAIFMT_BC_FC:
0676         tmp |= mod_slave;
0677         break;
0678     case SND_SOC_DAIFMT_BP_FP:
0679         /*
0680          * Set default source clock in Master mode, only when the
0681          * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
0682          * clock configuration assigned in DT is not overwritten.
0683          */
0684         if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
0685             i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
0686                             0, SND_SOC_CLOCK_IN);
0687         break;
0688     default:
0689         dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
0690         return -EINVAL;
0691     }
0692 
0693     pm_runtime_get_sync(dai->dev);
0694     spin_lock_irqsave(&priv->lock, flags);
0695     mod = readl(priv->addr + I2SMOD);
0696     /*
0697      * Don't change the I2S mode if any controller is active on this
0698      * channel.
0699      */
0700     if (any_active(i2s) &&
0701         ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
0702         spin_unlock_irqrestore(&priv->lock, flags);
0703         pm_runtime_put(dai->dev);
0704         dev_err(&i2s->pdev->dev,
0705                 "%s:%d Other DAI busy\n", __func__, __LINE__);
0706         return -EAGAIN;
0707     }
0708 
0709     mod &= ~(sdf_mask | lrp_rlow | mod_slave);
0710     mod |= tmp;
0711     writel(mod, priv->addr + I2SMOD);
0712     priv->slave_mode = (mod & mod_slave);
0713     spin_unlock_irqrestore(&priv->lock, flags);
0714     pm_runtime_put(dai->dev);
0715 
0716     return 0;
0717 }
0718 
0719 static int i2s_hw_params(struct snd_pcm_substream *substream,
0720     struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
0721 {
0722     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0723     struct i2s_dai *i2s = to_info(dai);
0724     u32 mod, mask = 0, val = 0;
0725     struct clk *rclksrc;
0726     unsigned long flags;
0727 
0728     WARN_ON(!pm_runtime_active(dai->dev));
0729 
0730     if (!is_secondary(i2s))
0731         mask |= (MOD_DC2_EN | MOD_DC1_EN);
0732 
0733     switch (params_channels(params)) {
0734     case 6:
0735         val |= MOD_DC2_EN;
0736         fallthrough;
0737     case 4:
0738         val |= MOD_DC1_EN;
0739         break;
0740     case 2:
0741         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
0742             i2s->dma_playback.addr_width = 4;
0743         else
0744             i2s->dma_capture.addr_width = 4;
0745         break;
0746     case 1:
0747         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
0748             i2s->dma_playback.addr_width = 2;
0749         else
0750             i2s->dma_capture.addr_width = 2;
0751 
0752         break;
0753     default:
0754         dev_err(&i2s->pdev->dev, "%d channels not supported\n",
0755                 params_channels(params));
0756         return -EINVAL;
0757     }
0758 
0759     if (is_secondary(i2s))
0760         mask |= MOD_BLCS_MASK;
0761     else
0762         mask |= MOD_BLCP_MASK;
0763 
0764     if (is_manager(i2s))
0765         mask |= MOD_BLC_MASK;
0766 
0767     switch (params_width(params)) {
0768     case 8:
0769         if (is_secondary(i2s))
0770             val |= MOD_BLCS_8BIT;
0771         else
0772             val |= MOD_BLCP_8BIT;
0773         if (is_manager(i2s))
0774             val |= MOD_BLC_8BIT;
0775         break;
0776     case 16:
0777         if (is_secondary(i2s))
0778             val |= MOD_BLCS_16BIT;
0779         else
0780             val |= MOD_BLCP_16BIT;
0781         if (is_manager(i2s))
0782             val |= MOD_BLC_16BIT;
0783         break;
0784     case 24:
0785         if (is_secondary(i2s))
0786             val |= MOD_BLCS_24BIT;
0787         else
0788             val |= MOD_BLCP_24BIT;
0789         if (is_manager(i2s))
0790             val |= MOD_BLC_24BIT;
0791         break;
0792     default:
0793         dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
0794                 params_format(params));
0795         return -EINVAL;
0796     }
0797 
0798     spin_lock_irqsave(&priv->lock, flags);
0799     mod = readl(priv->addr + I2SMOD);
0800     mod = (mod & ~mask) | val;
0801     writel(mod, priv->addr + I2SMOD);
0802     spin_unlock_irqrestore(&priv->lock, flags);
0803 
0804     snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
0805 
0806     i2s->frmclk = params_rate(params);
0807 
0808     rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC];
0809     if (rclksrc && !IS_ERR(rclksrc))
0810         priv->rclk_srcrate = clk_get_rate(rclksrc);
0811 
0812     return 0;
0813 }
0814 
0815 /* We set constraints on the substream according to the version of I2S */
0816 static int i2s_startup(struct snd_pcm_substream *substream,
0817       struct snd_soc_dai *dai)
0818 {
0819     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0820     struct i2s_dai *i2s = to_info(dai);
0821     struct i2s_dai *other = get_other_dai(i2s);
0822     unsigned long flags;
0823 
0824     pm_runtime_get_sync(dai->dev);
0825 
0826     spin_lock_irqsave(&priv->pcm_lock, flags);
0827 
0828     i2s->mode |= DAI_OPENED;
0829 
0830     if (is_manager(other))
0831         i2s->mode &= ~DAI_MANAGER;
0832     else
0833         i2s->mode |= DAI_MANAGER;
0834 
0835     if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR))
0836         writel(CON_RSTCLR, i2s->priv->addr + I2SCON);
0837 
0838     spin_unlock_irqrestore(&priv->pcm_lock, flags);
0839 
0840     return 0;
0841 }
0842 
0843 static void i2s_shutdown(struct snd_pcm_substream *substream,
0844     struct snd_soc_dai *dai)
0845 {
0846     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0847     struct i2s_dai *i2s = to_info(dai);
0848     struct i2s_dai *other = get_other_dai(i2s);
0849     unsigned long flags;
0850 
0851     spin_lock_irqsave(&priv->pcm_lock, flags);
0852 
0853     i2s->mode &= ~DAI_OPENED;
0854     i2s->mode &= ~DAI_MANAGER;
0855 
0856     if (is_opened(other))
0857         other->mode |= DAI_MANAGER;
0858 
0859     /* Reset any constraint on RFS and BFS */
0860     i2s->rfs = 0;
0861     i2s->bfs = 0;
0862 
0863     spin_unlock_irqrestore(&priv->pcm_lock, flags);
0864 
0865     pm_runtime_put(dai->dev);
0866 }
0867 
0868 static int config_setup(struct i2s_dai *i2s)
0869 {
0870     struct samsung_i2s_priv *priv = i2s->priv;
0871     struct i2s_dai *other = get_other_dai(i2s);
0872     unsigned rfs, bfs, blc;
0873     u32 psr;
0874 
0875     blc = get_blc(i2s);
0876 
0877     bfs = i2s->bfs;
0878 
0879     if (!bfs && other)
0880         bfs = other->bfs;
0881 
0882     /* Select least possible multiple(2) if no constraint set */
0883     if (!bfs)
0884         bfs = blc * 2;
0885 
0886     rfs = i2s->rfs;
0887 
0888     if (!rfs && other)
0889         rfs = other->rfs;
0890 
0891     if ((rfs == 256 || rfs == 512) && (blc == 24)) {
0892         dev_err(&i2s->pdev->dev,
0893             "%d-RFS not supported for 24-blc\n", rfs);
0894         return -EINVAL;
0895     }
0896 
0897     if (!rfs) {
0898         if (bfs == 16 || bfs == 32)
0899             rfs = 256;
0900         else
0901             rfs = 384;
0902     }
0903 
0904     /* If already setup and running */
0905     if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
0906         dev_err(&i2s->pdev->dev,
0907                 "%s:%d Other DAI busy\n", __func__, __LINE__);
0908         return -EAGAIN;
0909     }
0910 
0911     set_bfs(i2s, bfs);
0912     set_rfs(i2s, rfs);
0913 
0914     /* Don't bother with PSR in Slave mode */
0915     if (priv->slave_mode)
0916         return 0;
0917 
0918     if (!(priv->quirks & QUIRK_NO_MUXPSR)) {
0919         psr = priv->rclk_srcrate / i2s->frmclk / rfs;
0920         writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR);
0921         dev_dbg(&i2s->pdev->dev,
0922             "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
0923                 priv->rclk_srcrate, psr, rfs, bfs);
0924     }
0925 
0926     return 0;
0927 }
0928 
0929 static int i2s_trigger(struct snd_pcm_substream *substream,
0930     int cmd, struct snd_soc_dai *dai)
0931 {
0932     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
0933     int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
0934     struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
0935     struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0));
0936     unsigned long flags;
0937 
0938     switch (cmd) {
0939     case SNDRV_PCM_TRIGGER_START:
0940     case SNDRV_PCM_TRIGGER_RESUME:
0941     case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
0942         pm_runtime_get_sync(dai->dev);
0943         spin_lock_irqsave(&priv->lock, flags);
0944 
0945         if (config_setup(i2s)) {
0946             spin_unlock_irqrestore(&priv->lock, flags);
0947             return -EINVAL;
0948         }
0949 
0950         if (capture)
0951             i2s_rxctrl(i2s, 1);
0952         else
0953             i2s_txctrl(i2s, 1);
0954 
0955         spin_unlock_irqrestore(&priv->lock, flags);
0956         break;
0957     case SNDRV_PCM_TRIGGER_STOP:
0958     case SNDRV_PCM_TRIGGER_SUSPEND:
0959     case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
0960         spin_lock_irqsave(&priv->lock, flags);
0961 
0962         if (capture) {
0963             i2s_rxctrl(i2s, 0);
0964             i2s_fifo(i2s, FIC_RXFLUSH);
0965         } else {
0966             i2s_txctrl(i2s, 0);
0967             i2s_fifo(i2s, FIC_TXFLUSH);
0968         }
0969 
0970         spin_unlock_irqrestore(&priv->lock, flags);
0971         pm_runtime_put(dai->dev);
0972         break;
0973     }
0974 
0975     return 0;
0976 }
0977 
0978 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
0979     int div_id, int div)
0980 {
0981     struct i2s_dai *i2s = to_info(dai);
0982     struct i2s_dai *other = get_other_dai(i2s);
0983 
0984     switch (div_id) {
0985     case SAMSUNG_I2S_DIV_BCLK:
0986         pm_runtime_get_sync(dai->dev);
0987         if ((any_active(i2s) && div && (get_bfs(i2s) != div))
0988             || (other && other->bfs && (other->bfs != div))) {
0989             pm_runtime_put(dai->dev);
0990             dev_err(&i2s->pdev->dev,
0991                 "%s:%d Other DAI busy\n", __func__, __LINE__);
0992             return -EAGAIN;
0993         }
0994         i2s->bfs = div;
0995         pm_runtime_put(dai->dev);
0996         break;
0997     default:
0998         dev_err(&i2s->pdev->dev,
0999             "Invalid clock divider(%d)\n", div_id);
1000         return -EINVAL;
1001     }
1002 
1003     return 0;
1004 }
1005 
1006 static snd_pcm_sframes_t
1007 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
1008 {
1009     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1010     struct i2s_dai *i2s = to_info(dai);
1011     u32 reg = readl(priv->addr + I2SFIC);
1012     snd_pcm_sframes_t delay;
1013 
1014     WARN_ON(!pm_runtime_active(dai->dev));
1015 
1016     if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1017         delay = FIC_RXCOUNT(reg);
1018     else if (is_secondary(i2s))
1019         delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS));
1020     else
1021         delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f;
1022 
1023     return delay;
1024 }
1025 
1026 #ifdef CONFIG_PM
1027 static int i2s_suspend(struct snd_soc_component *component)
1028 {
1029     return pm_runtime_force_suspend(component->dev);
1030 }
1031 
1032 static int i2s_resume(struct snd_soc_component *component)
1033 {
1034     return pm_runtime_force_resume(component->dev);
1035 }
1036 #else
1037 #define i2s_suspend NULL
1038 #define i2s_resume  NULL
1039 #endif
1040 
1041 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1042 {
1043     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1044     struct i2s_dai *i2s = to_info(dai);
1045     struct i2s_dai *other = get_other_dai(i2s);
1046     unsigned long flags;
1047 
1048     pm_runtime_get_sync(dai->dev);
1049 
1050     if (is_secondary(i2s)) {
1051         /* If this is probe on the secondary DAI */
1052         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL);
1053     } else {
1054         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1055                       &i2s->dma_capture);
1056 
1057         if (priv->quirks & QUIRK_NEED_RSTCLR)
1058             writel(CON_RSTCLR, priv->addr + I2SCON);
1059 
1060         if (priv->quirks & QUIRK_SUPPORTS_IDMA)
1061             idma_reg_addr_init(priv->addr,
1062                        other->idma_playback.addr);
1063     }
1064 
1065     /* Reset any constraint on RFS and BFS */
1066     i2s->rfs = 0;
1067     i2s->bfs = 0;
1068 
1069     spin_lock_irqsave(&priv->lock, flags);
1070     i2s_txctrl(i2s, 0);
1071     i2s_rxctrl(i2s, 0);
1072     i2s_fifo(i2s, FIC_TXFLUSH);
1073     i2s_fifo(other, FIC_TXFLUSH);
1074     i2s_fifo(i2s, FIC_RXFLUSH);
1075     spin_unlock_irqrestore(&priv->lock, flags);
1076 
1077     /* Gate CDCLK by default */
1078     if (!is_opened(other))
1079         i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1080                 0, SND_SOC_CLOCK_IN);
1081     pm_runtime_put(dai->dev);
1082 
1083     return 0;
1084 }
1085 
1086 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1087 {
1088     struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1089     struct i2s_dai *i2s = to_info(dai);
1090     unsigned long flags;
1091 
1092     pm_runtime_get_sync(dai->dev);
1093 
1094     if (!is_secondary(i2s)) {
1095         if (priv->quirks & QUIRK_NEED_RSTCLR) {
1096             spin_lock_irqsave(&priv->lock, flags);
1097             writel(0, priv->addr + I2SCON);
1098             spin_unlock_irqrestore(&priv->lock, flags);
1099         }
1100     }
1101 
1102     pm_runtime_put(dai->dev);
1103 
1104     return 0;
1105 }
1106 
1107 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1108     .trigger = i2s_trigger,
1109     .hw_params = i2s_hw_params,
1110     .set_fmt = i2s_set_fmt,
1111     .set_clkdiv = i2s_set_clkdiv,
1112     .set_sysclk = i2s_set_sysclk,
1113     .startup = i2s_startup,
1114     .shutdown = i2s_shutdown,
1115     .delay = i2s_delay,
1116 };
1117 
1118 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = {
1119     /* Backend DAI  */
1120     SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1121     SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1122 
1123     /* Playback Mixer */
1124     SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1125 };
1126 
1127 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = {
1128     { "Playback Mixer", NULL, "Primary Playback" },
1129     { "Playback Mixer", NULL, "Secondary Playback" },
1130 
1131     { "Mixer DAI TX", NULL, "Playback Mixer" },
1132     { "Primary Capture", NULL, "Mixer DAI RX" },
1133 };
1134 
1135 static const struct snd_soc_component_driver samsung_i2s_component = {
1136     .name = "samsung-i2s",
1137 
1138     .dapm_widgets = samsung_i2s_widgets,
1139     .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets),
1140 
1141     .dapm_routes = samsung_i2s_dapm_routes,
1142     .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes),
1143 
1144     .suspend = i2s_suspend,
1145     .resume = i2s_resume,
1146 
1147     .legacy_dai_naming = 1,
1148 };
1149 
1150 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
1151               SNDRV_PCM_FMTBIT_S24_LE)
1152 
1153 static int i2s_alloc_dais(struct samsung_i2s_priv *priv,
1154               const struct samsung_i2s_dai_data *i2s_dai_data,
1155               int num_dais)
1156 {
1157     static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" };
1158     static const char *stream_names[] = { "Primary Playback",
1159                           "Secondary Playback" };
1160     struct snd_soc_dai_driver *dai_drv;
1161     int i;
1162 
1163     priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais,
1164                      sizeof(struct i2s_dai), GFP_KERNEL);
1165     if (!priv->dai)
1166         return -ENOMEM;
1167 
1168     priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais,
1169                      sizeof(*dai_drv), GFP_KERNEL);
1170     if (!priv->dai_drv)
1171         return -ENOMEM;
1172 
1173     for (i = 0; i < num_dais; i++) {
1174         dai_drv = &priv->dai_drv[i];
1175 
1176         dai_drv->probe = samsung_i2s_dai_probe;
1177         dai_drv->remove = samsung_i2s_dai_remove;
1178 
1179         dai_drv->symmetric_rate = 1;
1180         dai_drv->ops = &samsung_i2s_dai_ops;
1181 
1182         dai_drv->playback.channels_min = 1;
1183         dai_drv->playback.channels_max = 2;
1184         dai_drv->playback.rates = i2s_dai_data->pcm_rates;
1185         dai_drv->playback.formats = SAMSUNG_I2S_FMTS;
1186         dai_drv->playback.stream_name = stream_names[i];
1187 
1188         dai_drv->id = i + 1;
1189         dai_drv->name = dai_names[i];
1190 
1191         priv->dai[i].drv = &priv->dai_drv[i];
1192         priv->dai[i].pdev = priv->pdev;
1193     }
1194 
1195     /* Initialize capture only for the primary DAI */
1196     dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1];
1197 
1198     dai_drv->capture.channels_min = 1;
1199     dai_drv->capture.channels_max = 2;
1200     dai_drv->capture.rates = i2s_dai_data->pcm_rates;
1201     dai_drv->capture.formats = SAMSUNG_I2S_FMTS;
1202     dai_drv->capture.stream_name = "Primary Capture";
1203 
1204     return 0;
1205 }
1206 
1207 #ifdef CONFIG_PM
1208 static int i2s_runtime_suspend(struct device *dev)
1209 {
1210     struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1211 
1212     priv->suspend_i2smod = readl(priv->addr + I2SMOD);
1213     priv->suspend_i2scon = readl(priv->addr + I2SCON);
1214     priv->suspend_i2spsr = readl(priv->addr + I2SPSR);
1215 
1216     clk_disable_unprepare(priv->op_clk);
1217     clk_disable_unprepare(priv->clk);
1218 
1219     return 0;
1220 }
1221 
1222 static int i2s_runtime_resume(struct device *dev)
1223 {
1224     struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1225     int ret;
1226 
1227     ret = clk_prepare_enable(priv->clk);
1228     if (ret)
1229         return ret;
1230 
1231     if (priv->op_clk) {
1232         ret = clk_prepare_enable(priv->op_clk);
1233         if (ret) {
1234             clk_disable_unprepare(priv->clk);
1235             return ret;
1236         }
1237     }
1238 
1239     writel(priv->suspend_i2scon, priv->addr + I2SCON);
1240     writel(priv->suspend_i2smod, priv->addr + I2SMOD);
1241     writel(priv->suspend_i2spsr, priv->addr + I2SPSR);
1242 
1243     return 0;
1244 }
1245 #endif /* CONFIG_PM */
1246 
1247 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv)
1248 {
1249     int i;
1250 
1251     for (i = 0; i < priv->clk_data.clk_num; i++) {
1252         if (!IS_ERR(priv->clk_table[i]))
1253             clk_unregister(priv->clk_table[i]);
1254     }
1255 }
1256 
1257 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv)
1258 {
1259     of_clk_del_provider(priv->pdev->dev.of_node);
1260     i2s_unregister_clocks(priv);
1261 }
1262 
1263 
1264 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv)
1265 {
1266 
1267     const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1268     const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1269     const char *p_names[2] = { NULL };
1270     struct device *dev = &priv->pdev->dev;
1271     const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs;
1272     const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1273     struct clk *rclksrc;
1274     int ret, i;
1275 
1276     /* Register the clock provider only if it's expected in the DTB */
1277     if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1278         return 0;
1279 
1280     /* Get the RCLKSRC mux clock parent clock names */
1281     for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1282         rclksrc = clk_get(dev, clk_name[i]);
1283         if (IS_ERR(rclksrc))
1284             continue;
1285         p_names[i] = __clk_get_name(rclksrc);
1286         clk_put(rclksrc);
1287     }
1288 
1289     for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1290         i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1291                         dev_name(dev), i2s_clk_desc[i]);
1292         if (!i2s_clk_name[i])
1293             return -ENOMEM;
1294     }
1295 
1296     if (!(priv->quirks & QUIRK_NO_MUXPSR)) {
1297         /* Activate the prescaler */
1298         u32 val = readl(priv->addr + I2SPSR);
1299         writel(val | PSR_PSREN, priv->addr + I2SPSR);
1300 
1301         priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1302                 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1303                 ARRAY_SIZE(p_names),
1304                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1305                 priv->addr + I2SMOD, reg_info->rclksrc_off,
1306                 1, 0, &priv->lock);
1307 
1308         priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1309                 i2s_clk_name[CLK_I2S_RCLK_PSR],
1310                 i2s_clk_name[CLK_I2S_RCLK_SRC],
1311                 CLK_SET_RATE_PARENT,
1312                 priv->addr + I2SPSR, 8, 6, 0, &priv->lock);
1313 
1314         p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1315         priv->clk_data.clk_num = 2;
1316     }
1317 
1318     priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1319                 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1320                 CLK_SET_RATE_PARENT,
1321                 priv->addr + I2SMOD, reg_info->cdclkcon_off,
1322                 CLK_GATE_SET_TO_DISABLE, &priv->lock);
1323 
1324     priv->clk_data.clk_num += 1;
1325     priv->clk_data.clks = priv->clk_table;
1326 
1327     ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1328                   &priv->clk_data);
1329     if (ret < 0) {
1330         dev_err(dev, "failed to add clock provider: %d\n", ret);
1331         i2s_unregister_clocks(priv);
1332     }
1333 
1334     return ret;
1335 }
1336 
1337 /* Create platform device for the secondary PCM */
1338 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv)
1339 {
1340     struct platform_device *pdev_sec;
1341     const char *devname;
1342     int ret;
1343 
1344     devname = devm_kasprintf(&priv->pdev->dev, GFP_KERNEL, "%s-sec",
1345                  dev_name(&priv->pdev->dev));
1346     if (!devname)
1347         return -ENOMEM;
1348 
1349     pdev_sec = platform_device_alloc(devname, -1);
1350     if (!pdev_sec)
1351         return -ENOMEM;
1352 
1353     pdev_sec->driver_override = kstrdup("samsung-i2s", GFP_KERNEL);
1354     if (!pdev_sec->driver_override) {
1355         platform_device_put(pdev_sec);
1356         return -ENOMEM;
1357     }
1358 
1359     ret = platform_device_add(pdev_sec);
1360     if (ret < 0) {
1361         platform_device_put(pdev_sec);
1362         return ret;
1363     }
1364 
1365     ret = device_attach(&pdev_sec->dev);
1366     if (ret <= 0) {
1367         platform_device_unregister(priv->pdev_sec);
1368         dev_info(&pdev_sec->dev, "device_attach() failed\n");
1369         return ret;
1370     }
1371 
1372     priv->pdev_sec = pdev_sec;
1373 
1374     return 0;
1375 }
1376 
1377 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv)
1378 {
1379     platform_device_unregister(priv->pdev_sec);
1380     priv->pdev_sec = NULL;
1381 }
1382 
1383 static int samsung_i2s_probe(struct platform_device *pdev)
1384 {
1385     struct i2s_dai *pri_dai, *sec_dai = NULL;
1386     struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1387     u32 regs_base, idma_addr = 0;
1388     struct device_node *np = pdev->dev.of_node;
1389     const struct samsung_i2s_dai_data *i2s_dai_data;
1390     const struct platform_device_id *id;
1391     struct samsung_i2s_priv *priv;
1392     struct resource *res;
1393     int num_dais, ret;
1394 
1395     if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1396         i2s_dai_data = of_device_get_match_data(&pdev->dev);
1397     } else {
1398         id = platform_get_device_id(pdev);
1399 
1400         /* Nothing to do if it is the secondary device probe */
1401         if (!id)
1402             return 0;
1403 
1404         i2s_dai_data = (struct samsung_i2s_dai_data *)id->driver_data;
1405     }
1406 
1407     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1408     if (!priv)
1409         return -ENOMEM;
1410 
1411     if (np) {
1412         priv->quirks = i2s_dai_data->quirks;
1413     } else {
1414         if (!i2s_pdata) {
1415             dev_err(&pdev->dev, "Missing platform data\n");
1416             return -EINVAL;
1417         }
1418         priv->quirks = i2s_pdata->type.quirks;
1419     }
1420 
1421     num_dais = (priv->quirks & QUIRK_SEC_DAI) ? 2 : 1;
1422     priv->pdev = pdev;
1423     priv->variant_regs = i2s_dai_data->i2s_variant_regs;
1424 
1425     ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais);
1426     if (ret < 0)
1427         return ret;
1428 
1429     pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
1430 
1431     spin_lock_init(&priv->lock);
1432     spin_lock_init(&priv->pcm_lock);
1433 
1434     if (!np) {
1435         pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1436         pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1437         pri_dai->filter = i2s_pdata->dma_filter;
1438 
1439         idma_addr = i2s_pdata->type.idma_addr;
1440     } else {
1441         if (of_property_read_u32(np, "samsung,idma-addr",
1442                      &idma_addr)) {
1443             if (priv->quirks & QUIRK_SUPPORTS_IDMA) {
1444                 dev_info(&pdev->dev, "idma address is not"\
1445                         "specified");
1446             }
1447         }
1448     }
1449 
1450     priv->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1451     if (IS_ERR(priv->addr))
1452         return PTR_ERR(priv->addr);
1453 
1454     regs_base = res->start;
1455 
1456     priv->clk = devm_clk_get(&pdev->dev, "iis");
1457     if (IS_ERR(priv->clk)) {
1458         dev_err(&pdev->dev, "Failed to get iis clock\n");
1459         return PTR_ERR(priv->clk);
1460     }
1461 
1462     ret = clk_prepare_enable(priv->clk);
1463     if (ret != 0) {
1464         dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1465         return ret;
1466     }
1467     pri_dai->dma_playback.addr = regs_base + I2STXD;
1468     pri_dai->dma_capture.addr = regs_base + I2SRXD;
1469     pri_dai->dma_playback.chan_name = "tx";
1470     pri_dai->dma_capture.chan_name = "rx";
1471     pri_dai->dma_playback.addr_width = 4;
1472     pri_dai->dma_capture.addr_width = 4;
1473     pri_dai->priv = priv;
1474 
1475     if (priv->quirks & QUIRK_PRI_6CHAN)
1476         pri_dai->drv->playback.channels_max = 6;
1477 
1478     ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1479                          "tx", "rx", NULL);
1480     if (ret < 0)
1481         goto err_disable_clk;
1482 
1483     if (priv->quirks & QUIRK_SEC_DAI) {
1484         sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1];
1485 
1486         sec_dai->dma_playback.addr = regs_base + I2STXDS;
1487         sec_dai->dma_playback.chan_name = "tx-sec";
1488 
1489         if (!np) {
1490             sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1491             sec_dai->filter = i2s_pdata->dma_filter;
1492         }
1493 
1494         sec_dai->dma_playback.addr_width = 4;
1495         sec_dai->idma_playback.addr = idma_addr;
1496         sec_dai->pri_dai = pri_dai;
1497         sec_dai->priv = priv;
1498         pri_dai->sec_dai = sec_dai;
1499 
1500         ret = i2s_create_secondary_device(priv);
1501         if (ret < 0)
1502             goto err_disable_clk;
1503 
1504         ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev,
1505                         sec_dai->filter, "tx-sec", NULL,
1506                         &pdev->dev);
1507         if (ret < 0)
1508             goto err_del_sec;
1509 
1510     }
1511 
1512     if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1513         dev_err(&pdev->dev, "Unable to configure gpio\n");
1514         ret = -EINVAL;
1515         goto err_del_sec;
1516     }
1517 
1518     dev_set_drvdata(&pdev->dev, priv);
1519 
1520     ret = devm_snd_soc_register_component(&pdev->dev,
1521                     &samsung_i2s_component,
1522                     priv->dai_drv, num_dais);
1523     if (ret < 0)
1524         goto err_del_sec;
1525 
1526     pm_runtime_set_active(&pdev->dev);
1527     pm_runtime_enable(&pdev->dev);
1528 
1529     ret = i2s_register_clock_provider(priv);
1530     if (ret < 0)
1531         goto err_disable_pm;
1532 
1533     priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
1534 
1535     return 0;
1536 
1537 err_disable_pm:
1538     pm_runtime_disable(&pdev->dev);
1539 err_del_sec:
1540     i2s_delete_secondary_device(priv);
1541 err_disable_clk:
1542     clk_disable_unprepare(priv->clk);
1543     return ret;
1544 }
1545 
1546 static int samsung_i2s_remove(struct platform_device *pdev)
1547 {
1548     struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev);
1549 
1550     /* The secondary device has no driver data assigned */
1551     if (!priv)
1552         return 0;
1553 
1554     pm_runtime_get_sync(&pdev->dev);
1555     pm_runtime_disable(&pdev->dev);
1556 
1557     i2s_unregister_clock_provider(priv);
1558     i2s_delete_secondary_device(priv);
1559     clk_disable_unprepare(priv->clk);
1560 
1561     pm_runtime_put_noidle(&pdev->dev);
1562 
1563     return 0;
1564 }
1565 
1566 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1567     .bfs_off = 1,
1568     .rfs_off = 3,
1569     .sdf_off = 5,
1570     .txr_off = 8,
1571     .rclksrc_off = 10,
1572     .mss_off = 11,
1573     .cdclkcon_off = 12,
1574     .lrp_off = 7,
1575     .bfs_mask = 0x3,
1576     .rfs_mask = 0x3,
1577     .ftx0cnt_off = 8,
1578 };
1579 
1580 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1581     .bfs_off = 0,
1582     .rfs_off = 4,
1583     .sdf_off = 6,
1584     .txr_off = 8,
1585     .rclksrc_off = 10,
1586     .mss_off = 11,
1587     .cdclkcon_off = 12,
1588     .lrp_off = 15,
1589     .bfs_mask = 0xf,
1590     .rfs_mask = 0x3,
1591     .ftx0cnt_off = 8,
1592 };
1593 
1594 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1595     .bfs_off = 0,
1596     .rfs_off = 4,
1597     .sdf_off = 7,
1598     .txr_off = 9,
1599     .rclksrc_off = 11,
1600     .mss_off = 12,
1601     .cdclkcon_off = 22,
1602     .lrp_off = 15,
1603     .bfs_mask = 0xf,
1604     .rfs_mask = 0x7,
1605     .ftx0cnt_off = 0,
1606 };
1607 
1608 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1609     .bfs_off = 0,
1610     .rfs_off = 3,
1611     .sdf_off = 6,
1612     .txr_off = 8,
1613     .rclksrc_off = 10,
1614     .mss_off = 11,
1615     .cdclkcon_off = 12,
1616     .lrp_off = 15,
1617     .bfs_mask = 0x7,
1618     .rfs_mask = 0x7,
1619     .ftx0cnt_off = 8,
1620 };
1621 
1622 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1623     .quirks = QUIRK_NO_MUXPSR,
1624     .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1625     .i2s_variant_regs = &i2sv3_regs,
1626 };
1627 
1628 static const struct samsung_i2s_dai_data i2sv5_dai_type __maybe_unused = {
1629     .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1630             QUIRK_SUPPORTS_IDMA,
1631     .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1632     .i2s_variant_regs = &i2sv3_regs,
1633 };
1634 
1635 static const struct samsung_i2s_dai_data i2sv6_dai_type __maybe_unused = {
1636     .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1637             QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1638     .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1639     .i2s_variant_regs = &i2sv6_regs,
1640 };
1641 
1642 static const struct samsung_i2s_dai_data i2sv7_dai_type __maybe_unused = {
1643     .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1644             QUIRK_SUPPORTS_TDM,
1645     .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1646     .i2s_variant_regs = &i2sv7_regs,
1647 };
1648 
1649 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 __maybe_unused = {
1650     .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1651     .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1652     .i2s_variant_regs = &i2sv5_i2s1_regs,
1653 };
1654 
1655 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1656     {
1657         .name           = "samsung-i2s",
1658         .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1659     },
1660     {},
1661 };
1662 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1663 
1664 #ifdef CONFIG_OF
1665 static const struct of_device_id exynos_i2s_match[] = {
1666     {
1667         .compatible = "samsung,s3c6410-i2s",
1668         .data = &i2sv3_dai_type,
1669     }, {
1670         .compatible = "samsung,s5pv210-i2s",
1671         .data = &i2sv5_dai_type,
1672     }, {
1673         .compatible = "samsung,exynos5420-i2s",
1674         .data = &i2sv6_dai_type,
1675     }, {
1676         .compatible = "samsung,exynos7-i2s",
1677         .data = &i2sv7_dai_type,
1678     }, {
1679         .compatible = "samsung,exynos7-i2s1",
1680         .data = &i2sv5_dai_type_i2s1,
1681     },
1682     {},
1683 };
1684 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1685 #endif
1686 
1687 static const struct dev_pm_ops samsung_i2s_pm = {
1688     SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1689                 i2s_runtime_resume, NULL)
1690     SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1691                      pm_runtime_force_resume)
1692 };
1693 
1694 static struct platform_driver samsung_i2s_driver = {
1695     .probe  = samsung_i2s_probe,
1696     .remove = samsung_i2s_remove,
1697     .id_table = samsung_i2s_driver_ids,
1698     .driver = {
1699         .name = "samsung-i2s",
1700         .of_match_table = of_match_ptr(exynos_i2s_match),
1701         .pm = &samsung_i2s_pm,
1702     },
1703 };
1704 
1705 module_platform_driver(samsung_i2s_driver);
1706 
1707 /* Module information */
1708 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1709 MODULE_DESCRIPTION("Samsung I2S Interface");
1710 MODULE_ALIAS("platform:samsung-i2s");
1711 MODULE_LICENSE("GPL");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!