soc/rockchip/rockchip_pdm.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Rockchip PDM ALSA SoC Digital Audio Interface(DAI)  driver
0004  *
0005  * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
0006  */
0007
0008 #ifndef _ROCKCHIP_PDM_H
0009 #define _ROCKCHIP_PDM_H
0010
0011 /* PDM REGS */
0012 #define PDM_SYSCONFIG   (0x0000)
0013 #define PDM_CTRL0   (0x0004)
0014 #define PDM_CTRL1   (0x0008)
0015 #define PDM_CLK_CTRL    (0x000c)
0016 #define PDM_HPF_CTRL    (0x0010)
0017 #define PDM_FIFO_CTRL   (0x0014)
0018 #define PDM_DMA_CTRL    (0x0018)
0019 #define PDM_INT_EN  (0x001c)
0020 #define PDM_INT_CLR (0x0020)
0021 #define PDM_INT_ST  (0x0024)
0022 #define PDM_RXFIFO_DATA (0x0030)
0023 #define PDM_DATA_VALID  (0x0054)
0024 #define PDM_VERSION (0x0058)
0025
0026 /* PDM_SYSCONFIG */
0027 #define PDM_RX_MASK     (0x1 << 2)
0028 #define PDM_RX_START        (0x1 << 2)
0029 #define PDM_RX_STOP     (0x0 << 2)
0030 #define PDM_RX_CLR_MASK     (0x1 << 0)
0031 #define PDM_RX_CLR_WR       (0x1 << 0)
0032 #define PDM_RX_CLR_DONE     (0x0 << 0)
0033
0034 /* PDM CTRL0 */
0035 #define PDM_PATH_MSK        (0xf << 27)
0036 #define PDM_MODE_MSK        BIT(31)
0037 #define PDM_MODE_RJ     0
0038 #define PDM_MODE_LJ     BIT(31)
0039 #define PDM_PATH3_EN        BIT(30)
0040 #define PDM_PATH2_EN        BIT(29)
0041 #define PDM_PATH1_EN        BIT(28)
0042 #define PDM_PATH0_EN        BIT(27)
0043 #define PDM_HWT_EN      BIT(26)
0044 #define PDM_SAMPLERATE_MSK  GENMASK(7, 5)
0045 #define PDM_SAMPLERATE(x)   ((x) << 5)
0046 #define PDM_VDW_MSK     (0x1f << 0)
0047 #define PDM_VDW(X)      ((X - 1) << 0)
0048
0049 /* PDM CTRL1 */
0050 #define PDM_FD_NUMERATOR_SFT    16
0051 #define PDM_FD_NUMERATOR_MSK    GENMASK(31, 16)
0052 #define PDM_FD_DENOMINATOR_SFT  0
0053 #define PDM_FD_DENOMINATOR_MSK  GENMASK(15, 0)
0054
0055 /* PDM CLK CTRL */
0056 #define PDM_PATH_SHIFT(x)   (8 + (x) * 2)
0057 #define PDM_PATH_MASK(x)    (0x3 << PDM_PATH_SHIFT(x))
0058 #define PDM_PATH(x, v)      ((v) << PDM_PATH_SHIFT(x))
0059 #define PDM_CLK_FD_RATIO_MSK    BIT(6)
0060 #define PDM_CLK_FD_RATIO_40 (0X0 << 6)
0061 #define PDM_CLK_FD_RATIO_35 BIT(6)
0062 #define PDM_CLK_MSK     BIT(5)
0063 #define PDM_CLK_EN      BIT(5)
0064 #define PDM_CLK_DIS     (0x0 << 5)
0065 #define PDM_CKP_MSK     BIT(3)
0066 #define PDM_CKP_NORMAL      (0x0 << 3)
0067 #define PDM_CKP_INVERTED    BIT(3)
0068 #define PDM_DS_RATIO_MSK    (0x7 << 0)
0069 #define PDM_CLK_320FS       (0x0 << 0)
0070 #define PDM_CLK_640FS       (0x1 << 0)
0071 #define PDM_CLK_1280FS      (0x2 << 0)
0072 #define PDM_CLK_2560FS      (0x3 << 0)
0073 #define PDM_CLK_5120FS      (0x4 << 0)
0074 #define PDM_CIC_RATIO_MSK   (0x3 << 0)
0075
0076 /* PDM HPF CTRL */
0077 #define PDM_HPF_LE      BIT(3)
0078 #define PDM_HPF_RE      BIT(2)
0079 #define PDM_HPF_CF_MSK      (0x3 << 0)
0080 #define PDM_HPF_3P79HZ      (0x0 << 0)
0081 #define PDM_HPF_60HZ        (0x1 << 0)
0082 #define PDM_HPF_243HZ       (0x2 << 0)
0083 #define PDM_HPF_493HZ       (0x3 << 0)
0084
0085 /* PDM DMA CTRL */
0086 #define PDM_DMA_RD_MSK      BIT(8)
0087 #define PDM_DMA_RD_EN       BIT(8)
0088 #define PDM_DMA_RD_DIS      (0x0 << 8)
0089 #define PDM_DMA_RDL_MSK     (0x7f << 0)
0090 #define PDM_DMA_RDL(X)      ((X - 1) << 0)
0091
0092 #endif /* _ROCKCHIP_PDM_H */