qcom/qdsp6/q6afe-clocks.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2020, Linaro Limited
0003
0004 #include <linux/err.h>
0005 #include <linux/init.h>
0006 #include <linux/clk-provider.h>
0007 #include <linux/module.h>
0008 #include <linux/device.h>
0009 #include <linux/platform_device.h>
0010 #include "q6dsp-lpass-clocks.h"
0011 #include "q6afe.h"
0012
0013 #define Q6AFE_CLK(id) {                 \
0014         .clk_id = id,               \
0015         .q6dsp_clk_id   = Q6AFE_##id,       \
0016         .name = #id,                \
0017         .rate = 19200000,           \
0018     }
0019
0020
0021 static const struct q6dsp_clk_init q6afe_clks[] = {
0022     Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT),
0023     Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT),
0024     Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT),
0025     Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT),
0026     Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_IBIT),
0027     Q6AFE_CLK(LPASS_CLK_ID_TER_MI2S_EBIT),
0028     Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT),
0029     Q6AFE_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT),
0030     Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT),
0031     Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT),
0032     Q6AFE_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR),
0033     Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT),
0034     Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT),
0035     Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT),
0036     Q6AFE_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT),
0037     Q6AFE_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT),
0038     Q6AFE_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT),
0039     Q6AFE_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT),
0040     Q6AFE_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT),
0041     Q6AFE_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT),
0042     Q6AFE_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
0043     Q6AFE_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
0044     Q6AFE_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
0045     Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_IBIT),
0046     Q6AFE_CLK(LPASS_CLK_ID_PRI_PCM_EBIT),
0047     Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_IBIT),
0048     Q6AFE_CLK(LPASS_CLK_ID_SEC_PCM_EBIT),
0049     Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_IBIT),
0050     Q6AFE_CLK(LPASS_CLK_ID_TER_PCM_EBIT),
0051     Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_IBIT),
0052     Q6AFE_CLK(LPASS_CLK_ID_QUAD_PCM_EBIT),
0053     Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_IBIT),
0054     Q6AFE_CLK(LPASS_CLK_ID_QUIN_PCM_EBIT),
0055     Q6AFE_CLK(LPASS_CLK_ID_QUI_PCM_OSR),
0056     Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_IBIT),
0057     Q6AFE_CLK(LPASS_CLK_ID_PRI_TDM_EBIT),
0058     Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_IBIT),
0059     Q6AFE_CLK(LPASS_CLK_ID_SEC_TDM_EBIT),
0060     Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_IBIT),
0061     Q6AFE_CLK(LPASS_CLK_ID_TER_TDM_EBIT),
0062     Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_IBIT),
0063     Q6AFE_CLK(LPASS_CLK_ID_QUAD_TDM_EBIT),
0064     Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_IBIT),
0065     Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_EBIT),
0066     Q6AFE_CLK(LPASS_CLK_ID_QUIN_TDM_OSR),
0067     Q6AFE_CLK(LPASS_CLK_ID_MCLK_1),
0068     Q6AFE_CLK(LPASS_CLK_ID_MCLK_2),
0069     Q6AFE_CLK(LPASS_CLK_ID_MCLK_3),
0070     Q6AFE_CLK(LPASS_CLK_ID_MCLK_4),
0071     Q6AFE_CLK(LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE),
0072     Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_0),
0073     Q6AFE_CLK(LPASS_CLK_ID_INT_MCLK_1),
0074     Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
0075     Q6AFE_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
0076     Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
0077     Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
0078     Q6AFE_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
0079     Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
0080     Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
0081     Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
0082     Q6DSP_VOTE_CLK(LPASS_HW_AVTIMER_VOTE,
0083                Q6AFE_LPASS_CORE_AVTIMER_BLOCK,
0084                "LPASS_AVTIMER_MACRO"),
0085     Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE,
0086                Q6AFE_LPASS_CORE_HW_MACRO_BLOCK,
0087                "LPASS_HW_MACRO"),
0088     Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
0089                Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK,
0090                "LPASS_HW_DCODEC"),
0091 };
0092
0093 static const struct q6dsp_clk_desc q6dsp_clk_q6afe __maybe_unused = {
0094     .clks = q6afe_clks,
0095     .num_clks = ARRAY_SIZE(q6afe_clks),
0096     .lpass_set_clk = q6afe_set_lpass_clock,
0097     .lpass_vote_clk = q6afe_vote_lpass_core_hw,
0098     .lpass_unvote_clk = q6afe_unvote_lpass_core_hw,
0099 };
0100
0101 #ifdef CONFIG_OF
0102 static const struct of_device_id q6afe_clock_device_id[] = {
0103     { .compatible = "qcom,q6afe-clocks", .data = &q6dsp_clk_q6afe },
0104     {},
0105 };
0106 MODULE_DEVICE_TABLE(of, q6afe_clock_device_id);
0107 #endif
0108
0109 static struct platform_driver q6afe_clock_platform_driver = {
0110     .driver = {
0111         .name = "q6afe-clock",
0112         .of_match_table = of_match_ptr(q6afe_clock_device_id),
0113     },
0114     .probe = q6dsp_clock_dev_probe,
0115 };
0116 module_platform_driver(q6afe_clock_platform_driver);
0117
0118 MODULE_DESCRIPTION("Q6 Audio Frontend clock driver");
0119 MODULE_LICENSE("GPL v2");