qcom/qdsp6/audioreach.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002
0003 #ifndef __AUDIOREACH_H__
0004 #define __AUDIOREACH_H__
0005 #include <linux/types.h>
0006 #include <linux/soc/qcom/apr.h>
0007 #include <sound/soc.h>
0008 struct q6apm;
0009 struct q6apm_graph;
0010
0011 /* Module IDs */
0012 #define MODULE_ID_WR_SHARED_MEM_EP  0x07001000
0013 #define MODULE_ID_RD_SHARED_MEM_EP  0x07001001
0014 #define MODULE_ID_GAIN          0x07001002
0015 #define MODULE_ID_PCM_CNV       0x07001003
0016 #define MODULE_ID_PCM_ENC       0x07001004
0017 #define MODULE_ID_PCM_DEC       0x07001005
0018 #define MODULE_ID_CODEC_DMA_SINK    0x07001023
0019 #define MODULE_ID_CODEC_DMA_SOURCE  0x07001024
0020 #define MODULE_ID_I2S_SINK      0x0700100A
0021 #define MODULE_ID_I2S_SOURCE        0x0700100B
0022 #define MODULE_ID_DATA_LOGGING      0x0700101A
0023
0024 #define APM_CMD_GET_SPF_STATE       0x01001021
0025 #define APM_CMD_RSP_GET_SPF_STATE   0x02001007
0026
0027 #define APM_MODULE_INSTANCE_ID      0x00000001
0028 #define PRM_MODULE_INSTANCE_ID      0x00000002
0029 #define AMDB_MODULE_INSTANCE_ID     0x00000003
0030 #define VCPM_MODULE_INSTANCE_ID     0x00000004
0031 #define AR_MODULE_INSTANCE_ID_START 0x00006000
0032 #define AR_MODULE_INSTANCE_ID_END   0x00007000
0033 #define AR_MODULE_DYNAMIC_INSTANCE_ID_START 0x00007000
0034 #define AR_MODULE_DYNAMIC_INSTANCE_ID_END   0x00008000
0035 #define AR_CONT_INSTANCE_ID_START   0x00005000
0036 #define AR_CONT_INSTANCE_ID_END     0x00006000
0037 #define AR_SG_INSTANCE_ID_START     0x00004000
0038
0039 #define APM_CMD_GRAPH_OPEN          0x01001000
0040 #define APM_CMD_GRAPH_PREPARE           0x01001001
0041 #define APM_CMD_GRAPH_START         0x01001002
0042 #define APM_CMD_GRAPH_STOP          0x01001003
0043 #define APM_CMD_GRAPH_CLOSE         0x01001004
0044 #define APM_CMD_GRAPH_FLUSH         0x01001005
0045 #define APM_CMD_SET_CFG             0x01001006
0046 #define APM_CMD_GET_CFG             0x01001007
0047 #define APM_CMD_SHARED_MEM_MAP_REGIONS      0x0100100C
0048 #define APM_CMD_SHARED_MEM_UNMAP_REGIONS    0x0100100D
0049 #define APM_CMD_RSP_SHARED_MEM_MAP_REGIONS  0x02001001
0050 #define APM_CMD_RSP_GET_CFG         0x02001000
0051 #define APM_CMD_CLOSE_ALL           0x01001013
0052 #define APM_CMD_REGISTER_SHARED_CFG     0x0100100A
0053
0054 #define APM_MEMORY_MAP_SHMEM8_4K_POOL       3
0055
0056 struct apm_cmd_shared_mem_map_regions {
0057     uint16_t mem_pool_id;
0058     uint16_t num_regions;
0059     uint32_t property_flag;
0060 } __packed;
0061
0062 struct apm_shared_map_region_payload {
0063     uint32_t shm_addr_lsw;
0064     uint32_t shm_addr_msw;
0065     uint32_t mem_size_bytes;
0066 } __packed;
0067
0068 struct apm_cmd_shared_mem_unmap_regions {
0069     uint32_t mem_map_handle;
0070 } __packed;
0071
0072 struct apm_cmd_rsp_shared_mem_map_regions {
0073     uint32_t mem_map_handle;
0074 } __packed;
0075
0076 /* APM module */
0077 #define APM_PARAM_ID_SUB_GRAPH_LIST     0x08001005
0078
0079 #define APM_PARAM_ID_MODULE_LIST        0x08001002
0080
0081 struct apm_param_id_modules_list {
0082     uint32_t num_modules_list;
0083 } __packed;
0084
0085 #define APM_PARAM_ID_MODULE_PROP        0x08001003
0086
0087 struct apm_param_id_module_prop {
0088     uint32_t num_modules_prop_cfg;
0089 } __packed;
0090
0091 struct apm_module_prop_cfg {
0092     uint32_t instance_id;
0093     uint32_t num_props;
0094 } __packed;
0095
0096 #define APM_PARAM_ID_MODULE_CONN        0x08001004
0097
0098 struct apm_param_id_module_conn {
0099     uint32_t num_connections;
0100 } __packed;
0101
0102 struct apm_module_conn_obj {
0103     uint32_t src_mod_inst_id;
0104     uint32_t src_mod_op_port_id;
0105     uint32_t dst_mod_inst_id;
0106     uint32_t dst_mod_ip_port_id;
0107 } __packed;
0108
0109 #define APM_PARAM_ID_GAIN           0x08001006
0110
0111 struct param_id_gain_cfg {
0112     uint16_t gain;
0113     uint16_t reserved;
0114 } __packed;
0115
0116 #define PARAM_ID_PCM_OUTPUT_FORMAT_CFG      0x08001008
0117
0118 struct param_id_pcm_output_format_cfg {
0119     uint32_t data_format;
0120     uint32_t fmt_id;
0121     uint32_t payload_size;
0122 } __packed;
0123
0124 struct payload_pcm_output_format_cfg {
0125     uint16_t bit_width;
0126     uint16_t alignment;
0127     uint16_t bits_per_sample;
0128     uint16_t q_factor;
0129     uint16_t endianness;
0130     uint16_t interleaved;
0131     uint16_t reserved;
0132     uint16_t num_channels;
0133     uint8_t channel_mapping[];
0134 } __packed;
0135
0136 #define PARAM_ID_ENC_BITRATE            0x08001052
0137
0138 struct param_id_enc_bitrate_param {
0139     uint32_t bitrate;
0140 } __packed;
0141
0142 #define DATA_FORMAT_FIXED_POINT     1
0143 #define PCM_LSB_ALIGNED         1
0144 #define PCM_MSB_ALIGNED         2
0145 #define PCM_LITTLE_ENDIAN       1
0146 #define PCM_BIT_ENDIAN          2
0147
0148 #define MEDIA_FMT_ID_PCM    0x09001000
0149 #define PCM_CHANNEL_L       1
0150 #define PCM_CHANNEL_R       2
0151 #define SAMPLE_RATE_48K     48000
0152 #define BIT_WIDTH_16        16
0153
0154 #define APM_PARAM_ID_PROP_PORT_INFO     0x08001015
0155
0156 struct apm_modules_prop_info {
0157     uint32_t max_ip_port;
0158     uint32_t max_op_port;
0159 } __packed;
0160
0161 /* Shared memory module */
0162 #define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER   0x04001000
0163 #define WR_SH_MEM_EP_TIMESTAMP_VALID_FLAG   BIT(31)
0164 #define WR_SH_MEM_EP_LAST_BUFFER_FLAG       BIT(30)
0165 #define WR_SH_MEM_EP_TS_CONTINUE_FLAG       BIT(29)
0166 #define WR_SH_MEM_EP_EOF_FLAG           BIT(4)
0167
0168 struct apm_data_cmd_wr_sh_mem_ep_data_buffer {
0169     uint32_t buf_addr_lsw;
0170     uint32_t buf_addr_msw;
0171     uint32_t mem_map_handle;
0172     uint32_t buf_size;
0173     uint32_t timestamp_lsw;
0174     uint32_t timestamp_msw;
0175     uint32_t flags;
0176 } __packed;
0177
0178 #define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER_V2    0x0400100A
0179
0180 struct apm_data_cmd_wr_sh_mem_ep_data_buffer_v2 {
0181     uint32_t buf_addr_lsw;
0182     uint32_t buf_addr_msw;
0183     uint32_t mem_map_handle;
0184     uint32_t buf_size;
0185     uint32_t timestamp_lsw;
0186     uint32_t timestamp_msw;
0187     uint32_t flags;
0188     uint32_t md_addr_lsw;
0189     uint32_t md_addr_msw;
0190     uint32_t md_map_handle;
0191     uint32_t md_buf_size;
0192 } __packed;
0193
0194 #define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE  0x05001000
0195
0196 struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done {
0197     uint32_t buf_addr_lsw;
0198     uint32_t buf_addr_msw;
0199     uint32_t mem_map_handle;
0200     uint32_t status;
0201
0202 } __packed;
0203
0204 #define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2   0x05001004
0205
0206 struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 {
0207     uint32_t buf_addr_lsw;
0208     uint32_t buf_addr_msw;
0209     uint32_t mem_map_handle;
0210     uint32_t status;
0211     uint32_t md_buf_addr_lsw;
0212     uint32_t md_buf_addr_msw;
0213     uint32_t md_mem_map_handle;
0214     uint32_t md_status;
0215 } __packed;
0216
0217 #define PARAM_ID_MEDIA_FORMAT               0x0800100C
0218 #define DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT      0x04001001
0219
0220 struct apm_media_format {
0221     uint32_t data_format;
0222     uint32_t fmt_id;
0223     uint32_t payload_size;
0224 } __packed;
0225
0226 #define DATA_CMD_WR_SH_MEM_EP_EOS           0x04001002
0227 #define WR_SH_MEM_EP_EOS_POLICY_LAST    1
0228 #define WR_SH_MEM_EP_EOS_POLICY_EACH    2
0229
0230 struct data_cmd_wr_sh_mem_ep_eos {
0231     uint32_t policy;
0232
0233 } __packed;
0234
0235 #define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER       0x04001003
0236
0237 struct data_cmd_rd_sh_mem_ep_data_buffer {
0238     uint32_t buf_addr_lsw;
0239     uint32_t buf_addr_msw;
0240     uint32_t mem_map_handle;
0241     uint32_t buf_size;
0242 } __packed;
0243
0244 #define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER       0x05001002
0245
0246 struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done {
0247     uint32_t status;
0248     uint32_t buf_addr_lsw;
0249     uint32_t buf_addr_msw;
0250     uint32_t mem_map_handle;
0251     uint32_t data_size;
0252     uint32_t offset;
0253     uint32_t timestamp_lsw;
0254     uint32_t timestamp_msw;
0255     uint32_t flags;
0256     uint32_t num_frames;
0257 } __packed;
0258
0259 #define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER_V2        0x0400100B
0260
0261 struct data_cmd_rd_sh_mem_ep_data_buffer_v2 {
0262     uint32_t buf_addr_lsw;
0263     uint32_t buf_addr_msw;
0264     uint32_t mem_map_handle;
0265     uint32_t buf_size;
0266     uint32_t md_buf_addr_lsw;
0267     uint32_t md_buf_addr_msw;
0268     uint32_t md_mem_map_handle;
0269     uint32_t md_buf_size;
0270 } __packed;
0271
0272 #define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2    0x05001005
0273
0274 struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 {
0275     uint32_t status;
0276     uint32_t buf_addr_lsw;
0277     uint32_t buf_addr_msw;
0278     uint32_t mem_map_handle;
0279     uint32_t data_size;
0280     uint32_t offset;
0281     uint32_t timestamp_lsw;
0282     uint32_t timestamp_msw;
0283     uint32_t flags;
0284     uint32_t num_frames;
0285     uint32_t md_status;
0286     uint32_t md_buf_addr_lsw;
0287     uint32_t md_buf_addr_msw;
0288     uint32_t md_mem_map_handle;
0289     uint32_t md_size;
0290 } __packed;
0291
0292 #define PARAM_ID_RD_SH_MEM_CFG              0x08001007
0293
0294 struct param_id_rd_sh_mem_cfg {
0295     uint32_t num_frames_per_buffer;
0296     uint32_t metadata_control_flags;
0297
0298 } __packed;
0299
0300 #define DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED      0x05001001
0301
0302 struct data_cmd_wr_sh_mem_ep_eos_rendered {
0303     uint32_t module_instance_id;
0304     uint32_t render_status;
0305 } __packed;
0306
0307 #define MODULE_ID_WR_SHARED_MEM_EP          0x07001000
0308
0309 struct apm_cmd_header {
0310     uint32_t payload_address_lsw;
0311     uint32_t payload_address_msw;
0312     uint32_t mem_map_handle;
0313     uint32_t payload_size;
0314 } __packed;
0315
0316 #define APM_CMD_HDR_SIZE sizeof(struct apm_cmd_header)
0317
0318 struct apm_module_param_data  {
0319     uint32_t module_instance_id;
0320     uint32_t param_id;
0321     uint32_t param_size;
0322     uint32_t error_code;
0323 } __packed;
0324
0325 #define APM_MODULE_PARAM_DATA_SIZE  sizeof(struct apm_module_param_data)
0326
0327 struct apm_module_param_shared_data  {
0328     uint32_t param_id;
0329     uint32_t param_size;
0330 } __packed;
0331
0332 struct apm_prop_data {
0333     uint32_t prop_id;
0334     uint32_t prop_size;
0335 } __packed;
0336
0337 /* Sub-Graph Properties */
0338 #define APM_PARAM_ID_SUB_GRAPH_CONFIG   0x08001001
0339
0340 struct apm_param_id_sub_graph_cfg {
0341     uint32_t num_sub_graphs;
0342 } __packed;
0343
0344 struct apm_sub_graph_cfg {
0345     uint32_t sub_graph_id;
0346     uint32_t num_sub_graph_prop;
0347 } __packed;
0348
0349 #define APM_SUB_GRAPH_PROP_ID_PERF_MODE     0x0800100E
0350
0351 struct apm_sg_prop_id_perf_mode {
0352     uint32_t perf_mode;
0353 } __packed;
0354
0355 #define APM_SG_PROP_ID_PERF_MODE_SIZE   4
0356
0357 #define APM_SUB_GRAPH_PROP_ID_DIRECTION 0x0800100F
0358
0359 struct apm_sg_prop_id_direction {
0360     uint32_t direction;
0361 } __packed;
0362
0363 #define APM_SG_PROP_ID_DIR_SIZE     4
0364
0365 #define APM_SUB_GRAPH_PROP_ID_SCENARIO_ID   0x08001010
0366 #define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK    0x1
0367 #define APM_SUB_GRAPH_SID_AUDIO_RECORD      0x2
0368 #define APM_SUB_GRAPH_SID_AUDIO_VOICE_CALL  0x3
0369
0370 struct apm_sg_prop_id_scenario_id {
0371     uint32_t scenario_id;
0372 } __packed;
0373
0374 #define APM_SG_PROP_ID_SID_SIZE         4
0375 /* container api */
0376 #define APM_PARAM_ID_CONTAINER_CONFIG       0x08001000
0377
0378 struct apm_param_id_container_cfg {
0379     uint32_t num_containers;
0380 } __packed;
0381
0382 struct apm_container_cfg {
0383     uint32_t container_id;
0384     uint32_t num_prop;
0385 } __packed;
0386
0387 struct apm_cont_capability  {
0388     uint32_t capability_id;
0389 } __packed;
0390
0391 #define APM_CONTAINER_PROP_ID_CAPABILITY_LIST   0x08001011
0392 #define APM_CONTAINER_PROP_ID_CAPABILITY_SIZE   8
0393
0394 #define APM_PROP_ID_INVALID         0x0
0395 #define APM_CONTAINER_CAP_ID_PP         0x1
0396 #define APM_CONTAINER_CAP_ID_PP         0x1
0397
0398 struct apm_cont_prop_id_cap_list  {
0399     uint32_t num_capability_id;
0400 } __packed;
0401
0402 #define APM_CONTAINER_PROP_ID_GRAPH_POS     0x08001012
0403
0404 struct apm_cont_prop_id_graph_pos  {
0405     uint32_t graph_pos;
0406 } __packed;
0407
0408 #define APM_CONTAINER_PROP_ID_STACK_SIZE    0x08001013
0409
0410 struct apm_cont_prop_id_stack_size  {
0411     uint32_t stack_size;
0412 } __packed;
0413
0414 #define APM_CONTAINER_PROP_ID_PROC_DOMAIN   0x08001014
0415
0416 struct apm_cont_prop_id_domain  {
0417     uint32_t proc_domain;
0418 } __packed;
0419
0420 #define CONFIG_I2S_WS_SRC_EXTERNAL      0x0
0421 #define CONFIG_I2S_WS_SRC_INTERNAL      0x1
0422
0423 #define PARAM_ID_I2S_INTF_CFG           0x08001019
0424 struct param_id_i2s_intf_cfg {
0425     uint32_t lpaif_type;
0426     uint32_t intf_idx;
0427     uint16_t sd_line_idx;
0428     uint16_t ws_src;
0429 } __packed;
0430
0431 #define I2S_INTF_TYPE_PRIMARY       0
0432 #define I2S_INTF_TYPE_SECOINDARY    1
0433 #define I2S_INTF_TYPE_TERTINARY     2
0434 #define I2S_INTF_TYPE_QUATERNARY    3
0435 #define I2S_INTF_TYPE_QUINARY       4
0436 #define I2S_SD0             1
0437 #define I2S_SD1             2
0438 #define I2S_SD2             3
0439 #define I2S_SD3             4
0440
0441 #define PORT_ID_I2S_INPUT       2
0442 #define PORT_ID_I2S_OUPUT       1
0443 #define I2S_STACK_SIZE          2048
0444
0445 #define PARAM_ID_HW_EP_MF_CFG           0x08001017
0446 struct param_id_hw_ep_mf {
0447     uint32_t sample_rate;
0448     uint16_t bit_width;
0449     uint16_t num_channels;
0450     uint32_t data_format;
0451 } __packed;
0452
0453 #define PARAM_ID_HW_EP_FRAME_SIZE_FACTOR    0x08001018
0454
0455 struct param_id_fram_size_factor {
0456     uint32_t frame_size_factor;
0457 } __packed;
0458
0459 #define APM_CONTAINER_PROP_ID_PARENT_CONTAINER_ID   0x080010CB
0460
0461 struct apm_cont_prop_id_parent_container  {
0462     uint32_t parent_container_id;
0463 } __packed;
0464
0465 #define APM_CONTAINER_PROP_ID_HEAP_ID           0x08001174
0466 #define APM_CONT_HEAP_DEFAULT               0x1
0467 #define APM_CONT_HEAP_LOW_POWER             0x2
0468
0469 struct apm_cont_prop_id_headp_id  {
0470     uint32_t heap_id;
0471 } __packed;
0472
0473 struct apm_modules_list {
0474     uint32_t sub_graph_id;
0475     uint32_t container_id;
0476     uint32_t num_modules;
0477 } __packed;
0478
0479 struct apm_module_obj {
0480     uint32_t module_id;
0481     uint32_t instance_id;
0482 } __packed;
0483
0484 #define APM_MODULE_PROP_ID_PORT_INFO        0x08001015
0485 #define APM_MODULE_PROP_ID_PORT_INFO_SZ     8
0486 struct apm_module_prop_id_port_info {
0487     uint32_t max_ip_port;
0488     uint32_t max_op_port;
0489 } __packed;
0490
0491 #define DATA_LOGGING_MAX_INPUT_PORTS        0x1
0492 #define DATA_LOGGING_MAX_OUTPUT_PORTS       0x1
0493 #define DATA_LOGGING_STACK_SIZE         2048
0494 #define PARAM_ID_DATA_LOGGING_CONFIG        0x08001031
0495
0496 struct data_logging_config {
0497     uint32_t log_code;
0498     uint32_t log_tap_point_id;
0499     uint32_t mode;
0500 } __packed;
0501
0502 #define PARAM_ID_MFC_OUTPUT_MEDIA_FORMAT    0x08001024
0503
0504 struct param_id_mfc_media_format {
0505     uint32_t sample_rate;
0506     uint16_t bit_width;
0507     uint16_t num_channels;
0508     uint16_t channel_mapping[];
0509 } __packed;
0510
0511 struct media_format {
0512     uint32_t data_format;
0513     uint32_t fmt_id;
0514     uint32_t payload_size;
0515 } __packed;
0516
0517 struct payload_media_fmt_pcm {
0518     uint32_t sample_rate;
0519     uint16_t bit_width;
0520     uint16_t alignment;
0521     uint16_t bits_per_sample;
0522     uint16_t q_factor;
0523     uint16_t endianness;
0524     uint16_t num_channels;
0525     uint8_t channel_mapping[];
0526 } __packed;
0527
0528 #define PARAM_ID_CODEC_DMA_INTF_CFG     0x08001063
0529
0530 struct param_id_codec_dma_intf_cfg {
0531     /* 1 - RXTX
0532      * 2 - WSA
0533      * 3 - VA
0534      * 4 - AXI
0535      */
0536     uint32_t lpaif_type;
0537     /*
0538      *  RX0 | TX0 = 1
0539      *  RX1 | TX1 = 2
0540      *  RX2 | TX2 = 3... so on
0541      */
0542     uint32_t intf_index;
0543     uint32_t active_channels_mask;
0544 } __packed;
0545
0546 struct audio_hw_clk_cfg {
0547     uint32_t clock_id;
0548     uint32_t clock_freq;
0549     uint32_t clock_attri;
0550     uint32_t clock_root;
0551 } __packed;
0552
0553 struct audio_hw_clk_rel_cfg {
0554     uint32_t clock_id;
0555 } __packed;
0556
0557 #define PARAM_ID_HW_EP_POWER_MODE_CFG   0x8001176
0558 #define AR_HW_EP_POWER_MODE_0   0 /* default */
0559 #define AR_HW_EP_POWER_MODE_1   1 /* XO Shutdown allowed */
0560 #define AR_HW_EP_POWER_MODE_2   2 /* XO Shutdown not allowed */
0561
0562 struct param_id_hw_ep_power_mode_cfg {
0563     uint32_t power_mode;
0564 } __packed;
0565
0566 #define PARAM_ID_HW_EP_DMA_DATA_ALIGN   0x08001233
0567 #define AR_HW_EP_DMA_DATA_ALIGN_MSB 0
0568 #define AR_HW_EP_DMA_DATA_ALIGN_LSB 1
0569 #define AR_PCM_MAX_NUM_CHANNEL      8
0570
0571 struct param_id_hw_ep_dma_data_align {
0572     uint32_t dma_data_align;
0573 } __packed;
0574
0575 #define PARAM_ID_VOL_CTRL_MASTER_GAIN   0x08001035
0576 #define VOL_CTRL_DEFAULT_GAIN       0x2000
0577
0578 struct param_id_vol_ctrl_master_gain {
0579     uint16_t master_gain;
0580     uint16_t reserved;
0581 } __packed;
0582
0583
0584 /* Graph */
0585 struct audioreach_connection {
0586     /* Connections */
0587     uint32_t src_mod_inst_id;
0588     uint32_t src_mod_op_port_id;
0589     uint32_t dst_mod_inst_id;
0590     uint32_t dst_mod_ip_port_id;
0591     struct list_head node;
0592 };
0593
0594 struct audioreach_graph_info {
0595     int id;
0596     uint32_t num_sub_graphs;
0597     struct list_head sg_list;
0598     struct list_head connection_list;
0599 };
0600
0601 struct audioreach_sub_graph {
0602     uint32_t sub_graph_id;
0603     uint32_t perf_mode;
0604     uint32_t direction;
0605     uint32_t scenario_id;
0606     struct list_head node;
0607
0608     struct audioreach_graph_info *info;
0609     uint32_t num_containers;
0610     struct list_head container_list;
0611 };
0612
0613 struct audioreach_container {
0614     uint32_t container_id;
0615     uint32_t capability_id;
0616     uint32_t graph_pos;
0617     uint32_t stack_size;
0618     uint32_t proc_domain;
0619     struct list_head node;
0620
0621     uint32_t num_modules;
0622     struct list_head modules_list;
0623     struct audioreach_sub_graph *sub_graph;
0624 };
0625
0626 struct audioreach_module {
0627     uint32_t module_id;
0628     uint32_t instance_id;
0629
0630     uint32_t max_ip_port;
0631     uint32_t max_op_port;
0632
0633     uint32_t in_port;
0634     uint32_t out_port;
0635
0636     /* Connections */
0637     uint32_t src_mod_inst_id;
0638     uint32_t src_mod_op_port_id;
0639     uint32_t dst_mod_inst_id;
0640     uint32_t dst_mod_ip_port_id;
0641
0642     /* Format specifics */
0643     uint32_t ch_fmt;
0644     uint32_t rate;
0645     uint32_t bit_depth;
0646
0647     /* I2S module */
0648     uint32_t hw_interface_idx;
0649     uint32_t sd_line_idx;
0650     uint32_t ws_src;
0651     uint32_t frame_size_factor;
0652     uint32_t data_format;
0653     uint32_t hw_interface_type;
0654
0655     /* PCM module specific */
0656     uint32_t interleave_type;
0657
0658     /* GAIN/Vol Control Module */
0659     uint16_t gain;
0660
0661     /* Logging */
0662     uint32_t log_code;
0663     uint32_t log_tap_point_id;
0664     uint32_t log_mode;
0665
0666     /* bookkeeping */
0667     struct list_head node;
0668     struct audioreach_container *container;
0669     struct snd_soc_dapm_widget *widget;
0670 };
0671
0672 struct audioreach_module_config {
0673     int direction;
0674     u32 sample_rate;
0675     u16 bit_width;
0676     u16 bits_per_sample;
0677
0678     u16 data_format;
0679     u16 num_channels;
0680     u16 active_channels_mask;
0681     u32 sd_line_mask;
0682     int fmt;
0683     u8 channel_map[AR_PCM_MAX_NUM_CHANNEL];
0684 };
0685
0686 /* Packet Allocation routines */
0687 void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t
0688                     token);
0689 void *audioreach_alloc_cmd_pkt(int payload_size, uint32_t opcode,
0690                    uint32_t token, uint32_t src_port,
0691                    uint32_t dest_port);
0692 void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token,
0693                 uint32_t src_port);
0694 void *audioreach_alloc_pkt(int payload_size, uint32_t opcode,
0695                uint32_t token, uint32_t src_port,
0696                uint32_t dest_port);
0697 void *audioreach_alloc_graph_pkt(struct q6apm *apm,
0698                  struct list_head *sg_list,
0699                   int graph_id);
0700 /* Topology specific */
0701 int audioreach_tplg_init(struct snd_soc_component *component);
0702
0703 /* Module specific */
0704 void audioreach_graph_free_buf(struct q6apm_graph *graph);
0705 int audioreach_map_memory_regions(struct q6apm_graph *graph,
0706                   unsigned int dir, size_t period_sz,
0707                   unsigned int periods,
0708                   bool is_contiguous);
0709 int audioreach_send_cmd_sync(struct device *dev, gpr_device_t *gdev, struct gpr_ibasic_rsp_result_t *result,
0710                  struct mutex *cmd_lock, gpr_port_t *port, wait_queue_head_t *cmd_wait,
0711                  struct gpr_pkt *pkt, uint32_t rsp_opcode);
0712 int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph, struct gpr_pkt *pkt,
0713                    uint32_t rsp_opcode);
0714 int audioreach_set_media_format(struct q6apm_graph *graph,
0715                 struct audioreach_module *module,
0716                 struct audioreach_module_config *cfg);
0717 int audioreach_shared_memory_send_eos(struct q6apm_graph *graph);
0718 int audioreach_gain_set_vol_ctrl(struct q6apm *apm,
0719                  struct audioreach_module *module, int vol);
0720 struct audioreach_module *audioreach_get_container_last_module(
0721                 struct audioreach_container *container);
0722 struct audioreach_module *audioreach_get_container_first_module(
0723                 struct audioreach_container *container);
0724 struct audioreach_module *audioreach_get_container_next_module(
0725                 struct audioreach_container *container,
0726                 struct audioreach_module *module);
0727 #define list_for_each_container_module(mod, cont) \
0728     for (mod = audioreach_get_container_first_module(cont); mod != NULL; \
0729          mod = audioreach_get_container_next_module(cont, mod))
0730 #endif /* __AUDIOREACH_H__ */