soc/meson/g12a-tohdmitx.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (c) 2019 BayLibre, SAS.
0004 // Author: Jerome Brunet <jbrunet@baylibre.com>
0005
0006 #include <linux/bitfield.h>
0007 #include <linux/clk.h>
0008 #include <linux/module.h>
0009 #include <sound/pcm_params.h>
0010 #include <linux/regmap.h>
0011 #include <linux/reset.h>
0012 #include <sound/soc.h>
0013 #include <sound/soc-dai.h>
0014
0015 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
0016 #include "meson-codec-glue.h"
0017
0018 #define G12A_TOHDMITX_DRV_NAME "g12a-tohdmitx"
0019
0020 #define TOHDMITX_CTRL0          0x0
0021 #define  CTRL0_ENABLE_SHIFT     31
0022 #define  CTRL0_I2S_DAT_SEL_SHIFT    12
0023 #define  CTRL0_I2S_DAT_SEL      (0x3 << CTRL0_I2S_DAT_SEL_SHIFT)
0024 #define  CTRL0_I2S_LRCLK_SEL        GENMASK(9, 8)
0025 #define  CTRL0_I2S_BLK_CAP_INV      BIT(7)
0026 #define  CTRL0_I2S_BCLK_O_INV       BIT(6)
0027 #define  CTRL0_I2S_BCLK_SEL     GENMASK(5, 4)
0028 #define  CTRL0_SPDIF_CLK_CAP_INV    BIT(3)
0029 #define  CTRL0_SPDIF_CLK_O_INV      BIT(2)
0030 #define  CTRL0_SPDIF_SEL_SHIFT      1
0031 #define  CTRL0_SPDIF_SEL        (0x1 << CTRL0_SPDIF_SEL_SHIFT)
0032 #define  CTRL0_SPDIF_CLK_SEL        BIT(0)
0033
0034 static const char * const g12a_tohdmitx_i2s_mux_texts[] = {
0035     "I2S A", "I2S B", "I2S C",
0036 };
0037
0038 static int g12a_tohdmitx_i2s_mux_put_enum(struct snd_kcontrol *kcontrol,
0039                    struct snd_ctl_elem_value *ucontrol)
0040 {
0041     struct snd_soc_component *component =
0042         snd_soc_dapm_kcontrol_component(kcontrol);
0043     struct snd_soc_dapm_context *dapm =
0044         snd_soc_dapm_kcontrol_dapm(kcontrol);
0045     struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
0046     unsigned int mux, changed;
0047
0048     mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
0049     changed = snd_soc_component_test_bits(component, e->reg,
0050                           CTRL0_I2S_DAT_SEL,
0051                           FIELD_PREP(CTRL0_I2S_DAT_SEL,
0052                              mux));
0053
0054     if (!changed)
0055         return 0;
0056
0057     /* Force disconnect of the mux while updating */
0058     snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
0059
0060     snd_soc_component_update_bits(component, e->reg,
0061                       CTRL0_I2S_DAT_SEL |
0062                       CTRL0_I2S_LRCLK_SEL |
0063                       CTRL0_I2S_BCLK_SEL,
0064                       FIELD_PREP(CTRL0_I2S_DAT_SEL, mux) |
0065                       FIELD_PREP(CTRL0_I2S_LRCLK_SEL, mux) |
0066                       FIELD_PREP(CTRL0_I2S_BCLK_SEL, mux));
0067
0068     snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
0069
0070     return 1;
0071 }
0072
0073 static SOC_ENUM_SINGLE_DECL(g12a_tohdmitx_i2s_mux_enum, TOHDMITX_CTRL0,
0074                 CTRL0_I2S_DAT_SEL_SHIFT,
0075                 g12a_tohdmitx_i2s_mux_texts);
0076
0077 static const struct snd_kcontrol_new g12a_tohdmitx_i2s_mux =
0078     SOC_DAPM_ENUM_EXT("I2S Source", g12a_tohdmitx_i2s_mux_enum,
0079               snd_soc_dapm_get_enum_double,
0080               g12a_tohdmitx_i2s_mux_put_enum);
0081
0082 static const char * const g12a_tohdmitx_spdif_mux_texts[] = {
0083     "SPDIF A", "SPDIF B",
0084 };
0085
0086 static int g12a_tohdmitx_spdif_mux_put_enum(struct snd_kcontrol *kcontrol,
0087                         struct snd_ctl_elem_value *ucontrol)
0088 {
0089     struct snd_soc_component *component =
0090         snd_soc_dapm_kcontrol_component(kcontrol);
0091     struct snd_soc_dapm_context *dapm =
0092         snd_soc_dapm_kcontrol_dapm(kcontrol);
0093     struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
0094     unsigned int mux, changed;
0095
0096     mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
0097     changed = snd_soc_component_test_bits(component, TOHDMITX_CTRL0,
0098                           CTRL0_SPDIF_SEL,
0099                           FIELD_PREP(CTRL0_SPDIF_SEL, mux));
0100
0101     if (!changed)
0102         return 0;
0103
0104     /* Force disconnect of the mux while updating */
0105     snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
0106
0107     snd_soc_component_update_bits(component, TOHDMITX_CTRL0,
0108                       CTRL0_SPDIF_SEL |
0109                       CTRL0_SPDIF_CLK_SEL,
0110                       FIELD_PREP(CTRL0_SPDIF_SEL, mux) |
0111                       FIELD_PREP(CTRL0_SPDIF_CLK_SEL, mux));
0112
0113     snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
0114
0115     return 0;
0116 }
0117
0118 static SOC_ENUM_SINGLE_DECL(g12a_tohdmitx_spdif_mux_enum, TOHDMITX_CTRL0,
0119                 CTRL0_SPDIF_SEL_SHIFT,
0120                 g12a_tohdmitx_spdif_mux_texts);
0121
0122 static const struct snd_kcontrol_new g12a_tohdmitx_spdif_mux =
0123     SOC_DAPM_ENUM_EXT("SPDIF Source", g12a_tohdmitx_spdif_mux_enum,
0124               snd_soc_dapm_get_enum_double,
0125               g12a_tohdmitx_spdif_mux_put_enum);
0126
0127 static const struct snd_kcontrol_new g12a_tohdmitx_out_enable =
0128     SOC_DAPM_SINGLE_AUTODISABLE("Switch", TOHDMITX_CTRL0,
0129                     CTRL0_ENABLE_SHIFT, 1, 0);
0130
0131 static const struct snd_soc_dapm_widget g12a_tohdmitx_widgets[] = {
0132     SND_SOC_DAPM_MUX("I2S SRC", SND_SOC_NOPM, 0, 0,
0133              &g12a_tohdmitx_i2s_mux),
0134     SND_SOC_DAPM_SWITCH("I2S OUT EN", SND_SOC_NOPM, 0, 0,
0135                 &g12a_tohdmitx_out_enable),
0136     SND_SOC_DAPM_MUX("SPDIF SRC", SND_SOC_NOPM, 0, 0,
0137              &g12a_tohdmitx_spdif_mux),
0138     SND_SOC_DAPM_SWITCH("SPDIF OUT EN", SND_SOC_NOPM, 0, 0,
0139                 &g12a_tohdmitx_out_enable),
0140 };
0141
0142 static const struct snd_soc_dai_ops g12a_tohdmitx_input_ops = {
0143     .hw_params  = meson_codec_glue_input_hw_params,
0144     .set_fmt    = meson_codec_glue_input_set_fmt,
0145 };
0146
0147 static const struct snd_soc_dai_ops g12a_tohdmitx_output_ops = {
0148     .startup    = meson_codec_glue_output_startup,
0149 };
0150
0151 #define TOHDMITX_SPDIF_FORMATS                  \
0152     (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |   \
0153      SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
0154
0155 #define TOHDMITX_I2S_FORMATS                    \
0156     (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |   \
0157      SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE |   \
0158      SNDRV_PCM_FMTBIT_S32_LE)
0159
0160 #define TOHDMITX_STREAM(xname, xsuffix, xfmt, xchmax)       \
0161 {                               \
0162     .stream_name    = xname " " xsuffix,            \
0163     .channels_min   = 1,                    \
0164     .channels_max   = (xchmax),             \
0165     .rate_min       = 8000,                 \
0166     .rate_max   = 192000,               \
0167     .formats    = (xfmt),               \
0168 }
0169
0170 #define TOHDMITX_IN(xname, xid, xfmt, xchmax) {             \
0171     .name = xname,                          \
0172     .id = (xid),                            \
0173     .playback = TOHDMITX_STREAM(xname, "Playback", xfmt, xchmax),   \
0174     .ops = &g12a_tohdmitx_input_ops,                \
0175     .probe = meson_codec_glue_input_dai_probe,          \
0176     .remove = meson_codec_glue_input_dai_remove,            \
0177 }
0178
0179 #define TOHDMITX_OUT(xname, xid, xfmt, xchmax) {            \
0180     .name = xname,                          \
0181     .id = (xid),                            \
0182     .capture = TOHDMITX_STREAM(xname, "Capture", xfmt, xchmax), \
0183     .ops = &g12a_tohdmitx_output_ops,               \
0184 }
0185
0186 static struct snd_soc_dai_driver g12a_tohdmitx_dai_drv[] = {
0187     TOHDMITX_IN("I2S IN A", TOHDMITX_I2S_IN_A,
0188             TOHDMITX_I2S_FORMATS, 8),
0189     TOHDMITX_IN("I2S IN B", TOHDMITX_I2S_IN_B,
0190             TOHDMITX_I2S_FORMATS, 8),
0191     TOHDMITX_IN("I2S IN C", TOHDMITX_I2S_IN_C,
0192             TOHDMITX_I2S_FORMATS, 8),
0193     TOHDMITX_OUT("I2S OUT", TOHDMITX_I2S_OUT,
0194              TOHDMITX_I2S_FORMATS, 8),
0195     TOHDMITX_IN("SPDIF IN A", TOHDMITX_SPDIF_IN_A,
0196             TOHDMITX_SPDIF_FORMATS, 2),
0197     TOHDMITX_IN("SPDIF IN B", TOHDMITX_SPDIF_IN_B,
0198             TOHDMITX_SPDIF_FORMATS, 2),
0199     TOHDMITX_OUT("SPDIF OUT", TOHDMITX_SPDIF_OUT,
0200              TOHDMITX_SPDIF_FORMATS, 2),
0201 };
0202
0203 static int g12a_tohdmi_component_probe(struct snd_soc_component *c)
0204 {
0205     /* Initialize the static clock parameters */
0206     return snd_soc_component_write(c, TOHDMITX_CTRL0,
0207              CTRL0_I2S_BLK_CAP_INV | CTRL0_SPDIF_CLK_CAP_INV);
0208 }
0209
0210 static const struct snd_soc_dapm_route g12a_tohdmitx_routes[] = {
0211     { "I2S SRC", "I2S A", "I2S IN A Playback" },
0212     { "I2S SRC", "I2S B", "I2S IN B Playback" },
0213     { "I2S SRC", "I2S C", "I2S IN C Playback" },
0214     { "I2S OUT EN", "Switch", "I2S SRC" },
0215     { "I2S OUT Capture", NULL, "I2S OUT EN" },
0216     { "SPDIF SRC", "SPDIF A", "SPDIF IN A Playback" },
0217     { "SPDIF SRC", "SPDIF B", "SPDIF IN B Playback" },
0218     { "SPDIF OUT EN", "Switch", "SPDIF SRC" },
0219     { "SPDIF OUT Capture", NULL, "SPDIF OUT EN" },
0220 };
0221
0222 static const struct snd_soc_component_driver g12a_tohdmitx_component_drv = {
0223     .probe          = g12a_tohdmi_component_probe,
0224     .dapm_widgets       = g12a_tohdmitx_widgets,
0225     .num_dapm_widgets   = ARRAY_SIZE(g12a_tohdmitx_widgets),
0226     .dapm_routes        = g12a_tohdmitx_routes,
0227     .num_dapm_routes    = ARRAY_SIZE(g12a_tohdmitx_routes),
0228     .endianness     = 1,
0229 };
0230
0231 static const struct regmap_config g12a_tohdmitx_regmap_cfg = {
0232     .reg_bits   = 32,
0233     .val_bits   = 32,
0234     .reg_stride = 4,
0235 };
0236
0237 static const struct of_device_id g12a_tohdmitx_of_match[] = {
0238     { .compatible = "amlogic,g12a-tohdmitx", },
0239     {}
0240 };
0241 MODULE_DEVICE_TABLE(of, g12a_tohdmitx_of_match);
0242
0243 static int g12a_tohdmitx_probe(struct platform_device *pdev)
0244 {
0245     struct device *dev = &pdev->dev;
0246     void __iomem *regs;
0247     struct regmap *map;
0248     int ret;
0249
0250     ret = device_reset(dev);
0251     if (ret)
0252         return ret;
0253
0254     regs = devm_platform_ioremap_resource(pdev, 0);
0255     if (IS_ERR(regs))
0256         return PTR_ERR(regs);
0257
0258     map = devm_regmap_init_mmio(dev, regs, &g12a_tohdmitx_regmap_cfg);
0259     if (IS_ERR(map)) {
0260         dev_err(dev, "failed to init regmap: %ld\n",
0261             PTR_ERR(map));
0262         return PTR_ERR(map);
0263     }
0264
0265     return devm_snd_soc_register_component(dev,
0266             &g12a_tohdmitx_component_drv, g12a_tohdmitx_dai_drv,
0267             ARRAY_SIZE(g12a_tohdmitx_dai_drv));
0268 }
0269
0270 static struct platform_driver g12a_tohdmitx_pdrv = {
0271     .driver = {
0272         .name = G12A_TOHDMITX_DRV_NAME,
0273         .of_match_table = g12a_tohdmitx_of_match,
0274     },
0275     .probe = g12a_tohdmitx_probe,
0276 };
0277 module_platform_driver(g12a_tohdmitx_pdrv);
0278
0279 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
0280 MODULE_DESCRIPTION("Amlogic G12a To HDMI Tx Control Codec Driver");
0281 MODULE_LICENSE("GPL v2");