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0006 #include <linux/clk.h>
0007 #include <linux/module.h>
0008 #include <linux/of_platform.h>
0009 #include <sound/pcm_params.h>
0010 #include <sound/soc.h>
0011 #include <sound/soc-dai.h>
0012
0013 #include "axg-tdm.h"
0014
0015 enum {
0016 TDM_IFACE_PAD,
0017 TDM_IFACE_LOOPBACK,
0018 };
0019
0020 static unsigned int axg_tdm_slots_total(u32 *mask)
0021 {
0022 unsigned int slots = 0;
0023 int i;
0024
0025 if (!mask)
0026 return 0;
0027
0028
0029 for (i = 0; i < AXG_TDM_NUM_LANES; i++)
0030 slots += hweight32(mask[i]);
0031
0032 return slots;
0033 }
0034
0035 int axg_tdm_set_tdm_slots(struct snd_soc_dai *dai, u32 *tx_mask,
0036 u32 *rx_mask, unsigned int slots,
0037 unsigned int slot_width)
0038 {
0039 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0040 struct axg_tdm_stream *tx = (struct axg_tdm_stream *)
0041 dai->playback_dma_data;
0042 struct axg_tdm_stream *rx = (struct axg_tdm_stream *)
0043 dai->capture_dma_data;
0044 unsigned int tx_slots, rx_slots;
0045 unsigned int fmt = 0;
0046
0047 tx_slots = axg_tdm_slots_total(tx_mask);
0048 rx_slots = axg_tdm_slots_total(rx_mask);
0049
0050
0051 if (!tx_slots && !rx_slots) {
0052 dev_err(dai->dev, "interface has no slot\n");
0053 return -EINVAL;
0054 }
0055
0056 iface->slots = slots;
0057
0058 switch (slot_width) {
0059 case 0:
0060 slot_width = 32;
0061 fallthrough;
0062 case 32:
0063 fmt |= SNDRV_PCM_FMTBIT_S32_LE;
0064 fallthrough;
0065 case 24:
0066 fmt |= SNDRV_PCM_FMTBIT_S24_LE;
0067 fmt |= SNDRV_PCM_FMTBIT_S20_LE;
0068 fallthrough;
0069 case 16:
0070 fmt |= SNDRV_PCM_FMTBIT_S16_LE;
0071 fallthrough;
0072 case 8:
0073 fmt |= SNDRV_PCM_FMTBIT_S8;
0074 break;
0075 default:
0076 dev_err(dai->dev, "unsupported slot width: %d\n", slot_width);
0077 return -EINVAL;
0078 }
0079
0080 iface->slot_width = slot_width;
0081
0082
0083 if (tx) {
0084 tx->mask = tx_mask;
0085 dai->driver->playback.channels_max = tx_slots;
0086 dai->driver->playback.formats = fmt;
0087 }
0088
0089 if (rx) {
0090 rx->mask = rx_mask;
0091 dai->driver->capture.channels_max = rx_slots;
0092 dai->driver->capture.formats = fmt;
0093 }
0094
0095 return 0;
0096 }
0097 EXPORT_SYMBOL_GPL(axg_tdm_set_tdm_slots);
0098
0099 static int axg_tdm_iface_set_sysclk(struct snd_soc_dai *dai, int clk_id,
0100 unsigned int freq, int dir)
0101 {
0102 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0103 int ret = -ENOTSUPP;
0104
0105 if (dir == SND_SOC_CLOCK_OUT && clk_id == 0) {
0106 if (!iface->mclk) {
0107 dev_warn(dai->dev, "master clock not provided\n");
0108 } else {
0109 ret = clk_set_rate(iface->mclk, freq);
0110 if (!ret)
0111 iface->mclk_rate = freq;
0112 }
0113 }
0114
0115 return ret;
0116 }
0117
0118 static int axg_tdm_iface_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
0119 {
0120 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0121
0122 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
0123 case SND_SOC_DAIFMT_BP_FP:
0124 if (!iface->mclk) {
0125 dev_err(dai->dev, "cpu clock master: mclk missing\n");
0126 return -ENODEV;
0127 }
0128 break;
0129
0130 case SND_SOC_DAIFMT_BC_FC:
0131 break;
0132
0133 case SND_SOC_DAIFMT_BP_FC:
0134 case SND_SOC_DAIFMT_BC_FP:
0135 dev_err(dai->dev, "only CBS_CFS and CBM_CFM are supported\n");
0136 fallthrough;
0137 default:
0138 return -EINVAL;
0139 }
0140
0141 iface->fmt = fmt;
0142 return 0;
0143 }
0144
0145 static int axg_tdm_iface_startup(struct snd_pcm_substream *substream,
0146 struct snd_soc_dai *dai)
0147 {
0148 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0149 struct axg_tdm_stream *ts =
0150 snd_soc_dai_get_dma_data(dai, substream);
0151 int ret;
0152
0153 if (!axg_tdm_slots_total(ts->mask)) {
0154 dev_err(dai->dev, "interface has not slots\n");
0155 return -EINVAL;
0156 }
0157
0158
0159 if (snd_soc_component_active(dai->component)) {
0160 ret = snd_pcm_hw_constraint_single(substream->runtime,
0161 SNDRV_PCM_HW_PARAM_RATE,
0162 iface->rate);
0163 if (ret < 0) {
0164 dev_err(dai->dev,
0165 "can't set iface rate constraint\n");
0166 return ret;
0167 }
0168 }
0169
0170 return 0;
0171 }
0172
0173 static int axg_tdm_iface_set_stream(struct snd_pcm_substream *substream,
0174 struct snd_pcm_hw_params *params,
0175 struct snd_soc_dai *dai)
0176 {
0177 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0178 struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
0179 unsigned int channels = params_channels(params);
0180 unsigned int width = params_width(params);
0181
0182
0183 iface->rate = params_rate(params);
0184
0185
0186 if (axg_tdm_slots_total(ts->mask) < channels) {
0187 dev_err(dai->dev, "not enough slots for channels\n");
0188 return -EINVAL;
0189 }
0190
0191 if (iface->slot_width < width) {
0192 dev_err(dai->dev, "incompatible slots width for stream\n");
0193 return -EINVAL;
0194 }
0195
0196
0197 ts->physical_width = params_physical_width(params);
0198 ts->width = params_width(params);
0199 ts->channels = params_channels(params);
0200
0201 return 0;
0202 }
0203
0204 static int axg_tdm_iface_set_lrclk(struct snd_soc_dai *dai,
0205 struct snd_pcm_hw_params *params)
0206 {
0207 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0208 unsigned int ratio_num;
0209 int ret;
0210
0211 ret = clk_set_rate(iface->lrclk, params_rate(params));
0212 if (ret) {
0213 dev_err(dai->dev, "setting sample clock failed: %d\n", ret);
0214 return ret;
0215 }
0216
0217 switch (iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0218 case SND_SOC_DAIFMT_I2S:
0219 case SND_SOC_DAIFMT_LEFT_J:
0220 case SND_SOC_DAIFMT_RIGHT_J:
0221
0222 ratio_num = 1;
0223 break;
0224
0225 case SND_SOC_DAIFMT_DSP_A:
0226 case SND_SOC_DAIFMT_DSP_B:
0227
0228
0229
0230
0231
0232
0233 ratio_num = 0;
0234 break;
0235
0236 default:
0237 return -EINVAL;
0238 }
0239
0240 ret = clk_set_duty_cycle(iface->lrclk, ratio_num, 2);
0241 if (ret) {
0242 dev_err(dai->dev,
0243 "setting sample clock duty cycle failed: %d\n", ret);
0244 return ret;
0245 }
0246
0247
0248 ret = clk_set_phase(iface->lrclk,
0249 axg_tdm_lrclk_invert(iface->fmt) ? 180 : 0);
0250 if (ret) {
0251 dev_err(dai->dev,
0252 "setting sample clock phase failed: %d\n", ret);
0253 return ret;
0254 }
0255
0256 return 0;
0257 }
0258
0259 static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai,
0260 struct snd_pcm_hw_params *params)
0261 {
0262 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0263 unsigned long srate;
0264 int ret;
0265
0266 srate = iface->slots * iface->slot_width * params_rate(params);
0267
0268 if (!iface->mclk_rate) {
0269
0270 clk_set_rate(iface->mclk, 4 * srate);
0271 } else {
0272
0273 if (iface->mclk_rate % srate) {
0274 dev_err(dai->dev,
0275 "can't derive sclk %lu from mclk %lu\n",
0276 srate, iface->mclk_rate);
0277 return -EINVAL;
0278 }
0279 }
0280
0281 ret = clk_set_rate(iface->sclk, srate);
0282 if (ret) {
0283 dev_err(dai->dev, "setting bit clock failed: %d\n", ret);
0284 return ret;
0285 }
0286
0287
0288 ret = clk_set_phase(iface->sclk,
0289 axg_tdm_sclk_invert(iface->fmt) ? 0 : 180);
0290 if (ret) {
0291 dev_err(dai->dev, "setting bit clock phase failed: %d\n", ret);
0292 return ret;
0293 }
0294
0295 return ret;
0296 }
0297
0298 static int axg_tdm_iface_hw_params(struct snd_pcm_substream *substream,
0299 struct snd_pcm_hw_params *params,
0300 struct snd_soc_dai *dai)
0301 {
0302 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0303 int ret;
0304
0305 switch (iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
0306 case SND_SOC_DAIFMT_I2S:
0307 case SND_SOC_DAIFMT_LEFT_J:
0308 case SND_SOC_DAIFMT_RIGHT_J:
0309 if (iface->slots > 2) {
0310 dev_err(dai->dev, "bad slot number for format: %d\n",
0311 iface->slots);
0312 return -EINVAL;
0313 }
0314 break;
0315
0316 case SND_SOC_DAIFMT_DSP_A:
0317 case SND_SOC_DAIFMT_DSP_B:
0318 break;
0319
0320 default:
0321 dev_err(dai->dev, "unsupported dai format\n");
0322 return -EINVAL;
0323 }
0324
0325 ret = axg_tdm_iface_set_stream(substream, params, dai);
0326 if (ret)
0327 return ret;
0328
0329 if ((iface->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) ==
0330 SND_SOC_DAIFMT_BP_FP) {
0331 ret = axg_tdm_iface_set_sclk(dai, params);
0332 if (ret)
0333 return ret;
0334
0335 ret = axg_tdm_iface_set_lrclk(dai, params);
0336 if (ret)
0337 return ret;
0338 }
0339
0340 return 0;
0341 }
0342
0343 static int axg_tdm_iface_hw_free(struct snd_pcm_substream *substream,
0344 struct snd_soc_dai *dai)
0345 {
0346 struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
0347
0348
0349 axg_tdm_stream_stop(ts);
0350
0351 return 0;
0352 }
0353
0354 static int axg_tdm_iface_prepare(struct snd_pcm_substream *substream,
0355 struct snd_soc_dai *dai)
0356 {
0357 struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
0358
0359
0360 return axg_tdm_stream_reset(ts);
0361 }
0362
0363 static int axg_tdm_iface_remove_dai(struct snd_soc_dai *dai)
0364 {
0365 if (dai->capture_dma_data)
0366 axg_tdm_stream_free(dai->capture_dma_data);
0367
0368 if (dai->playback_dma_data)
0369 axg_tdm_stream_free(dai->playback_dma_data);
0370
0371 return 0;
0372 }
0373
0374 static int axg_tdm_iface_probe_dai(struct snd_soc_dai *dai)
0375 {
0376 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
0377
0378 if (dai->capture_widget) {
0379 dai->capture_dma_data = axg_tdm_stream_alloc(iface);
0380 if (!dai->capture_dma_data)
0381 return -ENOMEM;
0382 }
0383
0384 if (dai->playback_widget) {
0385 dai->playback_dma_data = axg_tdm_stream_alloc(iface);
0386 if (!dai->playback_dma_data) {
0387 axg_tdm_iface_remove_dai(dai);
0388 return -ENOMEM;
0389 }
0390 }
0391
0392 return 0;
0393 }
0394
0395 static const struct snd_soc_dai_ops axg_tdm_iface_ops = {
0396 .set_sysclk = axg_tdm_iface_set_sysclk,
0397 .set_fmt = axg_tdm_iface_set_fmt,
0398 .startup = axg_tdm_iface_startup,
0399 .hw_params = axg_tdm_iface_hw_params,
0400 .prepare = axg_tdm_iface_prepare,
0401 .hw_free = axg_tdm_iface_hw_free,
0402 };
0403
0404
0405 static const struct snd_soc_dai_driver axg_tdm_iface_dai_drv[] = {
0406 [TDM_IFACE_PAD] = {
0407 .name = "TDM Pad",
0408 .playback = {
0409 .stream_name = "Playback",
0410 .channels_min = 1,
0411 .channels_max = AXG_TDM_CHANNEL_MAX,
0412 .rates = AXG_TDM_RATES,
0413 .formats = AXG_TDM_FORMATS,
0414 },
0415 .capture = {
0416 .stream_name = "Capture",
0417 .channels_min = 1,
0418 .channels_max = AXG_TDM_CHANNEL_MAX,
0419 .rates = AXG_TDM_RATES,
0420 .formats = AXG_TDM_FORMATS,
0421 },
0422 .id = TDM_IFACE_PAD,
0423 .ops = &axg_tdm_iface_ops,
0424 .probe = axg_tdm_iface_probe_dai,
0425 .remove = axg_tdm_iface_remove_dai,
0426 },
0427 [TDM_IFACE_LOOPBACK] = {
0428 .name = "TDM Loopback",
0429 .capture = {
0430 .stream_name = "Loopback",
0431 .channels_min = 1,
0432 .channels_max = AXG_TDM_CHANNEL_MAX,
0433 .rates = AXG_TDM_RATES,
0434 .formats = AXG_TDM_FORMATS,
0435 },
0436 .id = TDM_IFACE_LOOPBACK,
0437 .ops = &axg_tdm_iface_ops,
0438 .probe = axg_tdm_iface_probe_dai,
0439 .remove = axg_tdm_iface_remove_dai,
0440 },
0441 };
0442
0443 static int axg_tdm_iface_set_bias_level(struct snd_soc_component *component,
0444 enum snd_soc_bias_level level)
0445 {
0446 struct axg_tdm_iface *iface = snd_soc_component_get_drvdata(component);
0447 enum snd_soc_bias_level now =
0448 snd_soc_component_get_bias_level(component);
0449 int ret = 0;
0450
0451 switch (level) {
0452 case SND_SOC_BIAS_PREPARE:
0453 if (now == SND_SOC_BIAS_STANDBY)
0454 ret = clk_prepare_enable(iface->mclk);
0455 break;
0456
0457 case SND_SOC_BIAS_STANDBY:
0458 if (now == SND_SOC_BIAS_PREPARE)
0459 clk_disable_unprepare(iface->mclk);
0460 break;
0461
0462 case SND_SOC_BIAS_OFF:
0463 case SND_SOC_BIAS_ON:
0464 break;
0465 }
0466
0467 return ret;
0468 }
0469
0470 static const struct snd_soc_dapm_widget axg_tdm_iface_dapm_widgets[] = {
0471 SND_SOC_DAPM_SIGGEN("Playback Signal"),
0472 };
0473
0474 static const struct snd_soc_dapm_route axg_tdm_iface_dapm_routes[] = {
0475 { "Loopback", NULL, "Playback Signal" },
0476 };
0477
0478 static const struct snd_soc_component_driver axg_tdm_iface_component_drv = {
0479 .dapm_widgets = axg_tdm_iface_dapm_widgets,
0480 .num_dapm_widgets = ARRAY_SIZE(axg_tdm_iface_dapm_widgets),
0481 .dapm_routes = axg_tdm_iface_dapm_routes,
0482 .num_dapm_routes = ARRAY_SIZE(axg_tdm_iface_dapm_routes),
0483 .set_bias_level = axg_tdm_iface_set_bias_level,
0484 };
0485
0486 static const struct of_device_id axg_tdm_iface_of_match[] = {
0487 { .compatible = "amlogic,axg-tdm-iface", },
0488 {}
0489 };
0490 MODULE_DEVICE_TABLE(of, axg_tdm_iface_of_match);
0491
0492 static int axg_tdm_iface_probe(struct platform_device *pdev)
0493 {
0494 struct device *dev = &pdev->dev;
0495 struct snd_soc_dai_driver *dai_drv;
0496 struct axg_tdm_iface *iface;
0497 int ret, i;
0498
0499 iface = devm_kzalloc(dev, sizeof(*iface), GFP_KERNEL);
0500 if (!iface)
0501 return -ENOMEM;
0502 platform_set_drvdata(pdev, iface);
0503
0504
0505
0506
0507
0508
0509 dai_drv = devm_kcalloc(dev, ARRAY_SIZE(axg_tdm_iface_dai_drv),
0510 sizeof(*dai_drv), GFP_KERNEL);
0511 if (!dai_drv)
0512 return -ENOMEM;
0513
0514 for (i = 0; i < ARRAY_SIZE(axg_tdm_iface_dai_drv); i++)
0515 memcpy(&dai_drv[i], &axg_tdm_iface_dai_drv[i],
0516 sizeof(*dai_drv));
0517
0518
0519 iface->sclk = devm_clk_get(dev, "sclk");
0520 if (IS_ERR(iface->sclk))
0521 return dev_err_probe(dev, PTR_ERR(iface->sclk), "failed to get sclk\n");
0522
0523
0524 iface->lrclk = devm_clk_get(dev, "lrclk");
0525 if (IS_ERR(iface->lrclk))
0526 return dev_err_probe(dev, PTR_ERR(iface->lrclk), "failed to get lrclk\n");
0527
0528
0529
0530
0531
0532
0533
0534 iface->mclk = devm_clk_get(dev, "mclk");
0535 if (IS_ERR(iface->mclk)) {
0536 ret = PTR_ERR(iface->mclk);
0537 if (ret == -ENOENT)
0538 iface->mclk = NULL;
0539 else
0540 return dev_err_probe(dev, ret, "failed to get mclk\n");
0541 }
0542
0543 return devm_snd_soc_register_component(dev,
0544 &axg_tdm_iface_component_drv, dai_drv,
0545 ARRAY_SIZE(axg_tdm_iface_dai_drv));
0546 }
0547
0548 static struct platform_driver axg_tdm_iface_pdrv = {
0549 .probe = axg_tdm_iface_probe,
0550 .driver = {
0551 .name = "axg-tdm-iface",
0552 .of_match_table = axg_tdm_iface_of_match,
0553 },
0554 };
0555 module_platform_driver(axg_tdm_iface_pdrv);
0556
0557 MODULE_DESCRIPTION("Amlogic AXG TDM interface driver");
0558 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
0559 MODULE_LICENSE("GPL v2");