soc/meson/aiu.h

0001 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
0002 /*
0003  * Copyright (c) 2018 BayLibre, SAS.
0004  * Author: Jerome Brunet <jbrunet@baylibre.com>
0005  */
0006
0007 #ifndef _MESON_AIU_H
0008 #define _MESON_AIU_H
0009
0010 struct clk;
0011 struct clk_bulk_data;
0012 struct device;
0013 struct of_phandle_args;
0014 struct snd_soc_dai;
0015 struct snd_soc_dai_ops;
0016
0017 enum aiu_clk_ids {
0018     PCLK = 0,
0019     AOCLK,
0020     MCLK,
0021     MIXER
0022 };
0023
0024 struct aiu_interface {
0025     struct clk_bulk_data *clks;
0026     unsigned int clk_num;
0027     int irq;
0028 };
0029
0030 struct aiu_platform_data {
0031     bool has_acodec;
0032     bool has_clk_ctrl_more_i2s_div;
0033 };
0034
0035 struct aiu {
0036     struct clk *pclk;
0037     struct clk *spdif_mclk;
0038     struct aiu_interface i2s;
0039     struct aiu_interface spdif;
0040     const struct aiu_platform_data *platform;
0041 };
0042
0043 #define AIU_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |  \
0044              SNDRV_PCM_FMTBIT_S20_LE |  \
0045              SNDRV_PCM_FMTBIT_S24_LE)
0046
0047 int aiu_of_xlate_dai_name(struct snd_soc_component *component,
0048               const struct of_phandle_args *args,
0049               const char **dai_name,
0050               unsigned int component_id);
0051
0052 int aiu_hdmi_ctrl_register_component(struct device *dev);
0053 int aiu_acodec_ctrl_register_component(struct device *dev);
0054
0055 int aiu_fifo_i2s_dai_probe(struct snd_soc_dai *dai);
0056 int aiu_fifo_spdif_dai_probe(struct snd_soc_dai *dai);
0057
0058 extern const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops;
0059 extern const struct snd_soc_dai_ops aiu_fifo_spdif_dai_ops;
0060 extern const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops;
0061 extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops;
0062
0063 #define AIU_IEC958_BPF          0x000
0064 #define AIU_958_MISC            0x010
0065 #define AIU_IEC958_DCU_FF_CTRL      0x01c
0066 #define AIU_958_CHSTAT_L0       0x020
0067 #define AIU_958_CHSTAT_L1       0x024
0068 #define AIU_958_CTRL            0x028
0069 #define AIU_I2S_SOURCE_DESC     0x034
0070 #define AIU_I2S_DAC_CFG         0x040
0071 #define AIU_I2S_SYNC            0x044
0072 #define AIU_I2S_MISC            0x048
0073 #define AIU_RST_SOFT            0x054
0074 #define AIU_CLK_CTRL            0x058
0075 #define AIU_CLK_CTRL_MORE       0x064
0076 #define AIU_CODEC_DAC_LRCLK_CTRL    0x0a0
0077 #define AIU_HDMI_CLK_DATA_CTRL      0x0a8
0078 #define AIU_ACODEC_CTRL         0x0b0
0079 #define AIU_958_CHSTAT_R0       0x0c0
0080 #define AIU_958_CHSTAT_R1       0x0c4
0081 #define AIU_MEM_I2S_START       0x180
0082 #define AIU_MEM_I2S_MASKS       0x18c
0083 #define AIU_MEM_I2S_CONTROL     0x190
0084 #define AIU_MEM_IEC958_START        0x194
0085 #define AIU_MEM_IEC958_CONTROL      0x1a4
0086 #define AIU_MEM_I2S_BUF_CNTL        0x1d8
0087 #define AIU_MEM_IEC958_BUF_CNTL     0x1fc
0088
0089 #endif /* _MESON_AIU_H */