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0006 #include <linux/bitfield.h>
0007 #include <linux/clk.h>
0008 #include <linux/dma-mapping.h>
0009 #include <sound/pcm_params.h>
0010 #include <sound/soc.h>
0011 #include <sound/soc-dai.h>
0012
0013 #include "aiu-fifo.h"
0014
0015 #define AIU_MEM_START 0x00
0016 #define AIU_MEM_RD 0x04
0017 #define AIU_MEM_END 0x08
0018 #define AIU_MEM_MASKS 0x0c
0019 #define AIU_MEM_MASK_CH_RD GENMASK(7, 0)
0020 #define AIU_MEM_MASK_CH_MEM GENMASK(15, 8)
0021 #define AIU_MEM_CONTROL 0x10
0022 #define AIU_MEM_CONTROL_INIT BIT(0)
0023 #define AIU_MEM_CONTROL_FILL_EN BIT(1)
0024 #define AIU_MEM_CONTROL_EMPTY_EN BIT(2)
0025
0026 static struct snd_soc_dai *aiu_fifo_dai(struct snd_pcm_substream *ss)
0027 {
0028 struct snd_soc_pcm_runtime *rtd = ss->private_data;
0029
0030 return asoc_rtd_to_cpu(rtd, 0);
0031 }
0032
0033 snd_pcm_uframes_t aiu_fifo_pointer(struct snd_soc_component *component,
0034 struct snd_pcm_substream *substream)
0035 {
0036 struct snd_soc_dai *dai = aiu_fifo_dai(substream);
0037 struct aiu_fifo *fifo = dai->playback_dma_data;
0038 struct snd_pcm_runtime *runtime = substream->runtime;
0039 unsigned int addr;
0040
0041 addr = snd_soc_component_read(component, fifo->mem_offset + AIU_MEM_RD);
0042
0043 return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr);
0044 }
0045
0046 static void aiu_fifo_enable(struct snd_soc_dai *dai, bool enable)
0047 {
0048 struct snd_soc_component *component = dai->component;
0049 struct aiu_fifo *fifo = dai->playback_dma_data;
0050 unsigned int en_mask = (AIU_MEM_CONTROL_FILL_EN |
0051 AIU_MEM_CONTROL_EMPTY_EN);
0052
0053 snd_soc_component_update_bits(component,
0054 fifo->mem_offset + AIU_MEM_CONTROL,
0055 en_mask, enable ? en_mask : 0);
0056 }
0057
0058 int aiu_fifo_trigger(struct snd_pcm_substream *substream, int cmd,
0059 struct snd_soc_dai *dai)
0060 {
0061 switch (cmd) {
0062 case SNDRV_PCM_TRIGGER_START:
0063 case SNDRV_PCM_TRIGGER_RESUME:
0064 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
0065 aiu_fifo_enable(dai, true);
0066 break;
0067 case SNDRV_PCM_TRIGGER_SUSPEND:
0068 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
0069 case SNDRV_PCM_TRIGGER_STOP:
0070 aiu_fifo_enable(dai, false);
0071 break;
0072 default:
0073 return -EINVAL;
0074 }
0075
0076 return 0;
0077 }
0078
0079 int aiu_fifo_prepare(struct snd_pcm_substream *substream,
0080 struct snd_soc_dai *dai)
0081 {
0082 struct snd_soc_component *component = dai->component;
0083 struct aiu_fifo *fifo = dai->playback_dma_data;
0084
0085 snd_soc_component_update_bits(component,
0086 fifo->mem_offset + AIU_MEM_CONTROL,
0087 AIU_MEM_CONTROL_INIT,
0088 AIU_MEM_CONTROL_INIT);
0089 snd_soc_component_update_bits(component,
0090 fifo->mem_offset + AIU_MEM_CONTROL,
0091 AIU_MEM_CONTROL_INIT, 0);
0092 return 0;
0093 }
0094
0095 int aiu_fifo_hw_params(struct snd_pcm_substream *substream,
0096 struct snd_pcm_hw_params *params,
0097 struct snd_soc_dai *dai)
0098 {
0099 struct snd_pcm_runtime *runtime = substream->runtime;
0100 struct snd_soc_component *component = dai->component;
0101 struct aiu_fifo *fifo = dai->playback_dma_data;
0102 dma_addr_t end;
0103
0104
0105 end = runtime->dma_addr + runtime->dma_bytes - fifo->fifo_block;
0106 snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_START,
0107 runtime->dma_addr);
0108 snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_RD,
0109 runtime->dma_addr);
0110 snd_soc_component_write(component, fifo->mem_offset + AIU_MEM_END,
0111 end);
0112
0113
0114 snd_soc_component_update_bits(component,
0115 fifo->mem_offset + AIU_MEM_MASKS,
0116 AIU_MEM_MASK_CH_RD | AIU_MEM_MASK_CH_MEM,
0117 FIELD_PREP(AIU_MEM_MASK_CH_RD, 0xff) |
0118 FIELD_PREP(AIU_MEM_MASK_CH_MEM, 0xff));
0119
0120 return 0;
0121 }
0122
0123 static irqreturn_t aiu_fifo_isr(int irq, void *dev_id)
0124 {
0125 struct snd_pcm_substream *playback = dev_id;
0126
0127 snd_pcm_period_elapsed(playback);
0128
0129 return IRQ_HANDLED;
0130 }
0131
0132 int aiu_fifo_startup(struct snd_pcm_substream *substream,
0133 struct snd_soc_dai *dai)
0134 {
0135 struct aiu_fifo *fifo = dai->playback_dma_data;
0136 int ret;
0137
0138 snd_soc_set_runtime_hwparams(substream, fifo->pcm);
0139
0140
0141
0142
0143
0144 ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
0145 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
0146 fifo->fifo_block);
0147 if (ret)
0148 return ret;
0149
0150 ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
0151 SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
0152 fifo->fifo_block);
0153 if (ret)
0154 return ret;
0155
0156 ret = clk_prepare_enable(fifo->pclk);
0157 if (ret)
0158 return ret;
0159
0160 ret = request_irq(fifo->irq, aiu_fifo_isr, 0, dev_name(dai->dev),
0161 substream);
0162 if (ret)
0163 clk_disable_unprepare(fifo->pclk);
0164
0165 return ret;
0166 }
0167
0168 void aiu_fifo_shutdown(struct snd_pcm_substream *substream,
0169 struct snd_soc_dai *dai)
0170 {
0171 struct aiu_fifo *fifo = dai->playback_dma_data;
0172
0173 free_irq(fifo->irq, substream);
0174 clk_disable_unprepare(fifo->pclk);
0175 }
0176
0177 int aiu_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd,
0178 struct snd_soc_dai *dai)
0179 {
0180 struct snd_card *card = rtd->card->snd_card;
0181 struct aiu_fifo *fifo = dai->playback_dma_data;
0182 size_t size = fifo->pcm->buffer_bytes_max;
0183 int ret;
0184
0185 ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
0186 if (ret)
0187 return ret;
0188
0189 snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
0190 card->dev, size, size);
0191
0192 return 0;
0193 }
0194
0195 int aiu_fifo_dai_probe(struct snd_soc_dai *dai)
0196 {
0197 struct aiu_fifo *fifo;
0198
0199 fifo = kzalloc(sizeof(*fifo), GFP_KERNEL);
0200 if (!fifo)
0201 return -ENOMEM;
0202
0203 dai->playback_dma_data = fifo;
0204
0205 return 0;
0206 }
0207
0208 int aiu_fifo_dai_remove(struct snd_soc_dai *dai)
0209 {
0210 kfree(dai->playback_dma_data);
0211
0212 return 0;
0213 }
0214